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ee2b9a4e6d
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backport-85353-to-v4.0-branch
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backport-86662-to-v4.0-branch
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backport-87080-to-v4.1-branch
backport-87152-to-v4.1-branch
backport-87235-to-v4.0-branch
backport-87871-to-v3.7-branch
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backport-91294-to-v4.1-branch
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backport-91949-to-v3.7-branch
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backport-92569-to-v4.1-branch
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collab-hwm
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collab-rust
collab-safety
collab-sdk-0.18-dev
collab-sdk-dev
main
v1.10-branch
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${ noResults }
19 Commits (ee2b9a4e6d68da2d3f94b0de247b91dd244d7a19)
Author | SHA1 | Message | Date |
---|---|---|---|
|
c25e31512c |
drivers: clock_control: Place API into iterable section
Add wrapper DEVICE_API macro to all clock_control_driver_api instances. Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be> |
7 months ago |
|
dc5527721a |
drivers: clock_control: remove '&' when assigning `clock_control_xxx_init`
Remove address-of operator ('&') when assigning `clock_control_xxx_init` function pointer in `DEVICE_DT_INST_DEFINE` macro. This change aims to maintain consistency among the drivers in `drivers/clock_control`, ensuring that all function pointer assignments follow the same pattern. Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com> |
1 year ago |
|
302422ad9d |
everywhere: replace double words
import os import re common_words = set([ 'about', 'after', 'all', 'also', 'an', 'and', 'any', 'are', 'as', 'at', 'be', 'because', 'but', 'by', 'can', 'come', 'could', 'day', 'do', 'even', 'first', 'for', 'get', 'give', 'go', 'has', 'have', 'he', 'her', 'him', 'his', 'how', 'I', 'in', 'into', 'it', 'its', 'just', 'know', 'like', 'look', 'make', 'man', 'many', 'me', 'more', 'my', 'new', 'no', 'not', 'now', 'of', 'one', 'only', 'or', 'other', 'our', 'out', 'over', 'people', 'say', 'see', 'she', 'so', 'some', 'take', 'tell', 'than', 'their', 'them', 'then', 'there', 'these', 'they', 'think', 'this', 'time', 'two', 'up', 'use', 'very', 'want', 'was', 'way', 'we', 'well', 'what', 'when', 'which', 'who', 'will', 'with', 'would', 'year', 'you', 'your' ]) valid_extensions = set([ 'c', 'h', 'yaml', 'cmake', 'conf', 'txt', 'overlay', 'rst', 'dtsi', 'Kconfig', 'dts', 'defconfig', 'yml', 'ld', 'sh', 'py', 'soc', 'cfg' ]) def filter_repeated_words(text): # Split the text into lines lines = text.split('\n') # Combine lines into a single string with unique separator combined_text = '/*sep*/'.join(lines) # Replace repeated words within a line def replace_within_line(match): return match.group(1) # Regex for matching repeated words within a line within_line_pattern = re.compile(r'\b(' + '|'.join(map(re.escape, common_words)) + r')\b\s+\b\1\b') combined_text = within_line_pattern. sub(replace_within_line, combined_text) # Replace repeated words across line boundaries def replace_across_lines(match): return match.group(1) + match.group(2) # Regex for matching repeated words across line boundaries across_lines_pattern = re. compile(r'\b(' + '|'.join( map(re.escape, common_words)) + r')\b(\s*[*\/\n\s]*)\b\1\b') combined_text = across_lines_pattern. sub(replace_across_lines, combined_text) # Split the text back into lines filtered_text = combined_text.split('/*sep*/') return '\n'.join(filtered_text) def process_file(file_path): with open(file_path, 'r', encoding='utf-8') as file: text = file.read() new_text = filter_repeated_words(text) with open(file_path, 'w', encoding='utf-8') as file: file.write(new_text) def process_directory(directory_path): for root, dirs, files in os.walk(directory_path): dirs[:] = [d for d in dirs if not d.startswith('.')] for file in files: # Filter out hidden files if file.startswith('.'): continue file_extension = file.split('.')[-1] if file_extension in valid_extensions: # 只处理指定后缀的文件 file_path = os.path.join(root, file) print(f"Processed file: {file_path}") process_file(file_path) directory_to_process = "/home/mi/works/github/zephyrproject/zephyr" process_directory(directory_to_process) Signed-off-by: Lingao Meng <menglingao@xiaomi.com> |
1 year ago |
|
6403280142 |
drivers: clock_control: make driver API and conf structs const
Save precious RAM by making sure driver API and config structs are declared as const Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org> |
1 year ago |
|
8dc3f85622 |
hwmv2: Introduce Hardware model version 2 and convert devices
This is a squash of the ``collab-hwm`` branch which converts all in-tree boards to hardware model version 2 including build system changes, board updates and soc conversions. This squash is a combination of the following commits: ca214745a1 soc: Remove soc_legacy folder and move ARM Kconfig |
1 year ago |
|
9c961571a2 |
modules: cmsis: move glue code to modules/cmsis
The CMSIS module glue code was part of arch/ directory. Move it to modules/cmsis, and provide a single entry point for it: cmsis_core.h. This entry header will include the right CMSIS header (M or A/R). To make this change possible, CMSIS module Kconfig/CMake are declared as external, allowing us to add a new Zephyr include directory. All files including CMSIS have been updated. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no> |
2 years ago |
|
6f3a13d974 |
barriers: Move __ISB() to the new API
Remove the arch-specific ARM-centric __ISB() macro and use the new barrier API instead. Signed-off-by: Carlo Caione <ccaione@baylibre.com> |
2 years ago |
|
cb11b2e84b |
barriers: Move __DSB() to the new API
Remove the arch-specific ARM-centric __DSB() macro and use the new barrier API instead. Signed-off-by: Carlo Caione <ccaione@baylibre.com> |
2 years ago |
|
519477fbf1 |
drivers: i2c: microchip: I2C reset fix
Updated the code to to invoke reset using PCR block z_mchp_xec_pcr_periph_reset() instead of resetting using I2C Configuration register Signed-off-by: Manimaran A <manimaran.a@microchip.com> |
2 years ago |
|
388d522c32 |
drivers: clock: Microchip XEC: Fix enum usage
We get a compiler warning in this code with arm clang due to using the wrong enum type for the variable. The enum should be of type `enum periph_clk32k_src` so replace VBR_CLK32K_SRC_PIN_XTAL with PERIPH_CLK32K_SRC_PIN_XTAL. Signed-off-by: Kumar Gala <kumar.gala@intel.com> |
2 years ago |
|
6bd7f781a3 |
mec150x: clk ctrl: fix clock trim register update
Program the right trim control register for mec150x. This fixes uart debug console output issue. Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com> |
3 years ago |
|
c7e0d727d7 |
drivers: clock: Microchip XEC clock driver add MEC15xx support
Add support for Microchip MEC15xx to the XEC clock control driver. MEC15xx 32KHz clock support uses the same 32KHz source for both the PLL and peripherals. MEC152x does not include the PCR clock monitor present in MEC172x. MEC15xx and MEC172x support internal silicon oscillator, parallel and single ended crystal inputs, and the 32KHZ_PIN input. MEC152x supports fall back to internal silicon OSC when VTR and 32KHZ_PIN are turned off. Therefore in MEC152x the internal silicon oscillator can only be disabled if using an external 32KHz which is always on. For MEC152x the driver will only use the PLL source clock device tree value. Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com> |
3 years ago |
|
ed52729a4b |
drivers: clock: Microchip MEC172x clock control driver support all modes
Fix Microchip XEC clock control driver single-ended XTAL2 pin initialization. Add support for external 32KHZ_IN pin as a clock source including PINTRL to switch the GPIO to 32KHZ_IN function. Add device tree option to disable internal silicon oscillator if it is not required by the configuration. Add device tree tuning options based on crystal and board layout. Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com> |
3 years ago |
|
49e22b825a |
drivers: clock-control: Microchip MEC172x adjust clock based on OTP
Microchip MEC172x CPU and fast peripheral (QMSPI and PK) are clock source is based upon an OTP setting. Add logic to adjust clock source based on OTP value. If the OTP value is ever changed this fix will allow calcluation of correct clock rate. Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com> |
3 years ago |
|
acc8cb4bc8 |
include: add missing irq.h include
Some modules use the IRQ API without including the necessary headers. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no> |
3 years ago |
|
fb60aab245 |
drivers: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all drivers to the new prefix <zephyr/...>. Note that the conversion has been scripted, refer to #45388 for more details. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no> |
3 years ago |
|
f483b1bc4c |
everywhere: fix typos
Fix a lot of typos Signed-off-by: Nazar Kazakov <nazar.kazakov.work@gmail.com> |
3 years ago |
|
ed9cb841c3 |
drivers: clock_control: Refactor drivers to use shared init priority
Refactors all of the clock control drivers to use a shared driver class initialization priority configuration, CONFIG_CLOCK_CONTROL_INIT_PRIORITY, to allow configuring clock control drivers separately from other devices. This is similar to other driver classes like I2C and SPI. Most drivers previously used CONFIG_KERNEL_INIT_PRIORITY_OBJECTS or CONFIG_KERNEL_INIT_PRIORITY_DEVICE, therefore the default for this new option is the lower of the two, which means earlier initialization. The even lower defaults for STM32 and Arm Beetle are preserved by SoC-family level overrides. Signed-off-by: Maureen Helm <maureen.helm@intel.com> |
4 years ago |
|
d3f6b54f8e |
Microchip: MEC172x clock control driver
Implement a clock control driver for Microchip MEC172x handling configuring the 32 KHz input sources for the PLL and peripheral-32k clock domains. MEC172x differs from MEC152x. MEC152x had one 32K source for both PLL and peripherals. MEC172x allows the two domains to use independent 32 KHz sources. Device tree updated to provide addresses of hardware used by the driver. Signed-off-by: Scott Worley <scott.worley@microchip.com> |
4 years ago |