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boards: arm: arty_a7: Convert to v2

Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
pull/69687/head
Jamie McCrae 1 year ago committed by Carles Cufi
parent
commit
94024d940e
  1. 12
      boards/boards_legacy/arm/arty/Kconfig.board
  2. 24
      boards/boards_legacy/arm/arty/Kconfig.defconfig
  3. 2
      boards/digilent/arty_a7/CMakeLists.txt
  4. 2
      boards/digilent/arty_a7/Kconfig
  5. 8
      boards/digilent/arty_a7/Kconfig.arty_a7
  6. 20
      boards/digilent/arty_a7/Kconfig.defconfig
  7. 0
      boards/digilent/arty_a7/arty_a7_designstart_fpga_cortex_m1.dts
  8. 2
      boards/digilent/arty_a7/arty_a7_designstart_fpga_cortex_m1.yaml
  9. 3
      boards/digilent/arty_a7/arty_a7_designstart_fpga_cortex_m1_defconfig
  10. 0
      boards/digilent/arty_a7/arty_a7_designstart_fpga_cortex_m3.dts
  11. 2
      boards/digilent/arty_a7/arty_a7_designstart_fpga_cortex_m3.yaml
  12. 3
      boards/digilent/arty_a7/arty_a7_designstart_fpga_cortex_m3_defconfig
  13. 0
      boards/digilent/arty_a7/board.c
  14. 13
      boards/digilent/arty_a7/board.cmake
  15. 0
      boards/digilent/arty_a7/board.h
  16. 6
      boards/digilent/arty_a7/board.yml
  17. 0
      boards/digilent/arty_a7/doc/arty_a7-35.jpg
  18. 16
      boards/digilent/arty_a7/doc/index.rst
  19. 0
      boards/digilent/arty_a7/dts/arty_a7_arm_designstart.dtsi
  20. 0
      boards/digilent/arty_a7/dts/bindings/arm,daplink-qspi-mux.yaml
  21. 0
      boards/digilent/arty_a7/support/openocd_arty_a7_arm_designstart.cfg
  22. 0
      boards/digilent/arty_a7/support/openocd_arty_a7_arm_designstart_m1.cfg
  23. 0
      boards/digilent/arty_a7/support/openocd_arty_a7_arm_designstart_m3.cfg

12
boards/boards_legacy/arm/arty/Kconfig.board

@ -1,12 +0,0 @@ @@ -1,12 +0,0 @@
# Digilent Arty board configuration
# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
# SPDX-License-Identifier: Apache-2.0
config BOARD_ARTY_A7_ARM_DESIGNSTART_M1
bool "Digilent Arty A7 ARM DesignStart Cortex-M1"
depends on SOC_SERIES_ARM_DESIGNSTART
config BOARD_ARTY_A7_ARM_DESIGNSTART_M3
bool "Digilent Arty A7 ARM DesignStart Cortex-M3"
depends on SOC_SERIES_ARM_DESIGNSTART

24
boards/boards_legacy/arm/arty/Kconfig.defconfig

@ -1,24 +0,0 @@ @@ -1,24 +0,0 @@
# Digilent Arty board configuration
# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
# SPDX-License-Identifier: Apache-2.0
if BOARD_ARTY_A7_ARM_DESIGNSTART_M1 || BOARD_ARTY_A7_ARM_DESIGNSTART_M3
config BOARD
default "arty_a7_arm_designstart_m1" if BOARD_ARTY_A7_ARM_DESIGNSTART_M1
default "arty_a7_arm_designstart_m3" if BOARD_ARTY_A7_ARM_DESIGNSTART_M3
config CPU_CORTEX_M_HAS_SYSTICK
default y
config CPU_HAS_ARM_MPU
default y if BOARD_ARTY_A7_ARM_DESIGNSTART_M3
config NUM_IRQS
default 7
config GPIO
default y if "$(dt_nodelabel_enabled,daplink_qspi_mux)"
endif # BOARD_ARTY_A7_ARM_DESIGNSTART_M1 || BOARD_ARTY_A7_ARM_DESIGNSTART_M3

2
boards/boards_legacy/arm/arty/CMakeLists.txt → boards/digilent/arty_a7/CMakeLists.txt

@ -3,7 +3,7 @@ @@ -3,7 +3,7 @@
zephyr_library()
zephyr_library_sources(board.c)
if((CONFIG_BOARD_ARTY_A7_ARM_DESIGNSTART_M1) AND (CONFIG_BUILD_OUTPUT_BIN))
if((CONFIG_BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M1) AND (CONFIG_BUILD_OUTPUT_BIN))
# Generate zephyr.mem verilog memory hex dump file for initialising ITCM in
# Xilinx Vivado.
#

2
boards/boards_legacy/arm/arty/Kconfig → boards/digilent/arty_a7/Kconfig

@ -6,7 +6,7 @@ @@ -6,7 +6,7 @@
config BOARD_INIT_PRIORITY
int "Board initialization priority"
default 50
depends on BOARD_ARTY_A7_ARM_DESIGNSTART_M1 || BOARD_ARTY_A7_ARM_DESIGNSTART_M3
depends on BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M1 || BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M3
depends on "$(dt_nodelabel_enabled,daplink_qspi_mux)"
help
Board initialization priority. The board initialization must take

8
boards/digilent/arty_a7/Kconfig.arty_a7

@ -0,0 +1,8 @@ @@ -0,0 +1,8 @@
# Digilent Arty board configuration
# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
# SPDX-License-Identifier: Apache-2.0
config BOARD_ARTY_A7
select SOC_ARM_DESIGNSTART_FPGA_CORTEX_M1 if BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M1
select SOC_ARM_DESIGNSTART_FPGA_CORTEX_M3 if BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M3

20
boards/digilent/arty_a7/Kconfig.defconfig

@ -0,0 +1,20 @@ @@ -0,0 +1,20 @@
# Digilent Arty board configuration
# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
# SPDX-License-Identifier: Apache-2.0
if BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M1 || BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M3
config CPU_CORTEX_M_HAS_SYSTICK
default y
config CPU_HAS_ARM_MPU
default y if BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M3
config NUM_IRQS
default 7
config GPIO
default y if "$(dt_nodelabel_enabled,daplink_qspi_mux)"
endif # BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M1 || BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M3

0
boards/boards_legacy/arm/arty/arty_a7_arm_designstart_m1.dts → boards/digilent/arty_a7/arty_a7_designstart_fpga_cortex_m1.dts

2
boards/boards_legacy/arm/arty/arty_a7_arm_designstart_m1.yaml → boards/digilent/arty_a7/arty_a7_designstart_fpga_cortex_m1.yaml

@ -1,4 +1,4 @@ @@ -1,4 +1,4 @@
identifier: arty_a7_arm_designstart_m1
identifier: arty_a7/designstart_fpga_cortex_m1
name: Digilent Arty A7 ARM DesignStart Cortex-M1
type: mcu
arch: arm

3
boards/boards_legacy/arm/arty/arty_a7_arm_designstart_m1_defconfig → boards/digilent/arty_a7/arty_a7_designstart_fpga_cortex_m1_defconfig

@ -1,8 +1,5 @@ @@ -1,8 +1,5 @@
# SPDX-License-Identifier: Apache-2.0
CONFIG_SOC_SERIES_ARM_DESIGNSTART=y
CONFIG_SOC_ARM_DESIGNSTART_FPGA_CORTEX_M1=y
CONFIG_BOARD_ARTY_A7_ARM_DESIGNSTART_M1=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=100000000
CONFIG_SERIAL=y

0
boards/boards_legacy/arm/arty/arty_a7_arm_designstart_m3.dts → boards/digilent/arty_a7/arty_a7_designstart_fpga_cortex_m3.dts

2
boards/boards_legacy/arm/arty/arty_a7_arm_designstart_m3.yaml → boards/digilent/arty_a7/arty_a7_designstart_fpga_cortex_m3.yaml

@ -1,4 +1,4 @@ @@ -1,4 +1,4 @@
identifier: arty_a7_arm_designstart_m3
identifier: arty_a7/designstart_fpga_cortex_m3
name: Digilent Arty A7 ARM DesignStart Cortex-M3
type: mcu
arch: arm

3
boards/boards_legacy/arm/arty/arty_a7_arm_designstart_m3_defconfig → boards/digilent/arty_a7/arty_a7_designstart_fpga_cortex_m3_defconfig

@ -1,8 +1,5 @@ @@ -1,8 +1,5 @@
# SPDX-License-Identifier: Apache-2.0
CONFIG_SOC_SERIES_ARM_DESIGNSTART=y
CONFIG_SOC_ARM_DESIGNSTART_FPGA_CORTEX_M3=y
CONFIG_BOARD_ARTY_A7_ARM_DESIGNSTART_M3=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=50000000
CONFIG_ARM_MPU=y

0
boards/boards_legacy/arm/arty/board.c → boards/digilent/arty_a7/board.c

13
boards/boards_legacy/arm/arty/board.cmake → boards/digilent/arty_a7/board.cmake

@ -1,15 +1,12 @@ @@ -1,15 +1,12 @@
# SPDX-License-Identifier: Apache-2.0
if(CONFIG_BOARD_ARTY_A7_ARM_DESIGNSTART_M1)
if(CONFIG_BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M1)
board_runner_args(openocd "--use-elf" "--config=${BOARD_DIR}/support/openocd_arty_a7_arm_designstart_m1.cfg")
board_runner_args(jlink "--device=Cortex-M1" "--reset-after-load")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
elseif(CONFIG_BOARD_ARTY_A7_ARM_DESIGNSTART_M3)
elseif(CONFIG_BOARD_ARTY_A7_DESIGNSTART_FPGA_CORTEX_M3)
board_runner_args(openocd "--use-elf" "--config=${BOARD_DIR}/support/openocd_arty_a7_arm_designstart_m3.cfg")
board_runner_args(jlink "--device=Cortex-M3" "--reset-after-load")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
endif()
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

0
boards/boards_legacy/arm/arty/board.h → boards/digilent/arty_a7/board.h

6
boards/digilent/arty_a7/board.yml

@ -0,0 +1,6 @@ @@ -0,0 +1,6 @@
board:
name: arty_a7
vendor: Digilent
socs:
- name: designstart_fpga_cortex_m1
- name: designstart_fpga_cortex_m3

0
boards/boards_legacy/arm/arty/doc/arty_a7-35.jpg → boards/digilent/arty_a7/doc/arty_a7-35.jpg

Before

Width:  |  Height:  |  Size: 31 KiB

After

Width:  |  Height:  |  Size: 31 KiB

16
boards/boards_legacy/arm/arty/doc/index.rst → boards/digilent/arty_a7/doc/index.rst

@ -44,7 +44,7 @@ following websites: @@ -44,7 +44,7 @@ following websites:
Supported Features
==================
The ``arty_a7_arm_designstart_m1`` board configuration supports the following
The ``arty_a7/designstart_fpga_cortex_m1`` board configuration supports the following
hardware features of the Cortex-M1 reference design:
+-----------+------------+-------------------------------------+
@ -63,9 +63,9 @@ hardware features of the Cortex-M1 reference design: @@ -63,9 +63,9 @@ hardware features of the Cortex-M1 reference design:
+-----------+------------+-------------------------------------+
The default configuration for the Cortex-M1 can be found in the defconfig file:
:file:`boards/arm/arty/arty_a7_arm_designstart_m1_defconfig`.
:file:`boards/digilent/arty_a7/arty_a7_designstart_fpga_cortex_m1_defconfig`.
In addition to the above, the ``arty_a7_arm_designstart_m3`` board configuration
In addition to the above, the ``arty_a7/designstart_fpga_cortex_m3`` board configuration
supports the following hardware features of the Cortex-M3 reference design:
+-----------+------------+-------------------------------------+
@ -75,7 +75,7 @@ supports the following hardware features of the Cortex-M3 reference design: @@ -75,7 +75,7 @@ supports the following hardware features of the Cortex-M3 reference design:
+-----------+------------+-------------------------------------+
The default configuration for the Cortex-M3 can be found in the defconfig file:
:file:`boards/arm/arty/arty_a7_arm_designstart_m3_defconfig`.
:file:`boards/digilent/arty_a7/arty_a7_designstart_fpga_cortex_m3_defconfig`.
Other hardware features are not currently supported by the port.
@ -164,7 +164,7 @@ for the Cortex-M1 reference design: @@ -164,7 +164,7 @@ for the Cortex-M1 reference design:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: arty_a7_arm_designstart_m1
:board: arty_a7/designstart_fpga_cortex_m1
:goals: flash
After flashing, you should see message similar to the following in the terminal:
@ -172,7 +172,7 @@ After flashing, you should see message similar to the following in the terminal: @@ -172,7 +172,7 @@ After flashing, you should see message similar to the following in the terminal:
.. code-block:: console
*** Booting Zephyr OS build zephyr-v2.3.99 ***
Hello World! arty_a7_arm_designstart_m1
Hello World! arty_a7
The same procedure can be used for the Cortex-M3 reference design.
@ -195,7 +195,7 @@ Here is an example for the :ref:`hello_world` application. @@ -195,7 +195,7 @@ Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: arty_a7_arm_designstart_m1
:board: arty_a7/designstart_fpga_cortex_m1
:goals: debug
Step through the application in your debugger, and you should see a message
@ -204,7 +204,7 @@ similar to the following in the terminal: @@ -204,7 +204,7 @@ similar to the following in the terminal:
.. code-block:: console
*** Booting Zephyr OS build zephyr-v2.3.99 ***
Hello World! arty_a7_arm_designstart_m1
Hello World! arty_a7
.. _Digilent Arty:
https://store.digilentinc.com/arty

0
boards/boards_legacy/arm/arty/dts/arty_a7_arm_designstart.dtsi → boards/digilent/arty_a7/dts/arty_a7_arm_designstart.dtsi

0
boards/boards_legacy/arm/arty/dts/bindings/arm,daplink-qspi-mux.yaml → boards/digilent/arty_a7/dts/bindings/arm,daplink-qspi-mux.yaml

0
boards/boards_legacy/arm/arty/support/openocd_arty_a7_arm_designstart.cfg → boards/digilent/arty_a7/support/openocd_arty_a7_arm_designstart.cfg

0
boards/boards_legacy/arm/arty/support/openocd_arty_a7_arm_designstart_m1.cfg → boards/digilent/arty_a7/support/openocd_arty_a7_arm_designstart_m1.cfg

0
boards/boards_legacy/arm/arty/support/openocd_arty_a7_arm_designstart_m3.cfg → boards/digilent/arty_a7/support/openocd_arty_a7_arm_designstart_m3.cfg

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