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boards: Fix invalid documentation links

Fixes issues with links in documentation

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
pull/69687/head
Jamie McCrae 1 year ago committed by Carles Cufi
parent
commit
126e1a4e72
  1. 4
      boards/ambiq/apollo4p_blue_kxr_evb/doc/index.rst
  2. 4
      boards/ambiq/apollo4p_evb/doc/index.rst
  3. 5
      boards/cypress/cy8cproto_063_ble/doc/index.rst
  4. 4
      boards/fanke/fk7b0m1_vbt6/doc/index.rst
  5. 2
      boards/seeed_studio/seeeduino_xiao/doc/index.rst
  6. 2
      boards/seeed_studio/wio_terminal/doc/index.rst
  7. 2
      boards/telink/tlsr9518adk80d/doc/index.rst

4
boards/ambiq/apollo4p_blue_kxr_evb/doc/index.rst

@ -58,8 +58,8 @@ The Apollo4 Blue Plus KXR EVB board configuration supports the following hardwar @@ -58,8 +58,8 @@ The Apollo4 Blue Plus KXR EVB board configuration supports the following hardwar
| RADIO | on-chip | bluetooth |
+-----------+------------+-------------------------------------+
The default configuration can be found in the defconfig file:
``boards/arm/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb_defconfig``.
The default configuration can be found in
:zephyr_file:`boards/ambiq/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb_defconfig`
Programming and Debugging
=========================

4
boards/ambiq/apollo4p_evb/doc/index.rst

@ -53,8 +53,8 @@ The Apollo4P EVB board configuration supports the following hardware features: @@ -53,8 +53,8 @@ The Apollo4P EVB board configuration supports the following hardware features:
| I2C(M) | on-chip | i2c |
+-----------+------------+-------------------------------------+
The default configuration can be found in the defconfig file:
``boards/arm/apollo4p_evb/apollo4p_evb_defconfig``.
The default configuration can be found in
:zephyr_file:`boards/ambiq/apollo4p_evb/apollo4p_evb_defconfig`
Programming and Debugging
=========================

5
boards/cypress/cy8cproto_063_ble/doc/index.rst

@ -58,9 +58,8 @@ The board configuration supports the following hardware features: @@ -58,9 +58,8 @@ The board configuration supports the following hardware features:
+-----------+------------+-----------------------+
The default configurations can be found in the Kconfig
:zephyr_file:`boards/arm/cy8cproto_063_ble/cy8cproto_063_ble_defconfig`
The default configurations can be found in
:zephyr_file:`boards/cypress/cy8cproto_063_ble/cy8cproto_063_ble_defconfig`
System Clock
============

4
boards/fanke/fk7b0m1_vbt6/doc/index.rst

@ -78,8 +78,8 @@ features: @@ -78,8 +78,8 @@ features:
Other hardware features are not yet supported on this Zephyr port.
The default configuration per core can be found in the defconfig files:
:zephyr_file:`boards/fanke/fk7b0m1-vbt6/fk7b0m1_vbt6_defconfig`
The default configuration per core can be found in
:zephyr_file:`boards/fanke/fk7b0m1_vbt6/fk7b0m1_vbt6_defconfig`
Connections and IOs
===================

2
boards/seeed_studio/seeeduino_xiao/doc/index.rst

@ -59,7 +59,7 @@ features: @@ -59,7 +59,7 @@ features:
Other hardware features are not currently supported by Zephyr.
The default configuration can be found in the Kconfig file
:zephyr_file:`boards/seeed/seeeduino_xiao/seeeduino_xiao_defconfig`.
:zephyr_file:`boards/seeed_studio/seeeduino_xiao/seeeduino_xiao_defconfig`.
Connections and IOs
===================

2
boards/seeed_studio/wio_terminal/doc/index.rst

@ -92,7 +92,7 @@ The wio_terminal board configuration supports the following hardware features: @@ -92,7 +92,7 @@ The wio_terminal board configuration supports the following hardware features:
Other hardware features are not currently supported by Zephyr.
The default configuration can be found in the Kconfig file
:zephyr_file:`boards/seeed/wio_terminal/wio_terminal_defconfig`.
:zephyr_file:`boards/seeed_studio/wio_terminal/wio_terminal_defconfig`.
Zephyr can use the default Cortex-M SYSTICK timer or the SAM0 specific RTC.
To use the RTC, set :kconfig:option:`CONFIG_CORTEX_M_SYSTICK=n` and set

2
boards/telink/tlsr9518adk80d/doc/index.rst

@ -102,7 +102,7 @@ System Clock @@ -102,7 +102,7 @@ System Clock
The TLSR9518ADK80D board is configured to use the 24 MHz external crystal oscillator
with the on-chip PLL/DIV generating the 48 MHz system clock.
The following values also could be assigned to the system clock in the board DTS file
`zephyr_file:`boards/telink/tlsr9518adk80d/tlsr9518adk80d.dts`:
:zephyr_file:`boards/telink/tlsr9518adk80d/tlsr9518adk80d.dts`:
- 16000000
- 24000000

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