soc: Add include guards

Adds include guards to prevent contamination of bleeding
Kconfigs from irrelevent devices

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>

soc/andes/Kconfig

@@ -1,4 +1,8 @@
 # Copyright (c) 2024 Nordic Semiconductor ASA
 # SPDX-License-Identifier: Apache-2.0
 
+if SOC_FAMILY_ANDES_V5
+
 rsource "*/Kconfig"
+
+endif # SOC_FAMILY_ANDES_V5

soc/arm/Kconfig

@@ -1,4 +1,8 @@
 # Copyright (c) 2024 Nordic Semiconductor ASA
 # SPDX-License-Identifier: Apache-2.0
 
+if SOC_FAMILY_ARM || SOC_FAMILY_ARM64
+
 rsource "*/Kconfig"
+
+endif # SOC_FAMILY_ARM || SOC_FAMILY_ARM64

soc/aspeed/Kconfig

@@ -5,4 +5,8 @@
 config SOC_FAMILY_ASPEED
 	select PLATFORM_SPECIFIC_INIT
 
+if SOC_FAMILY_ASPEED
+
 rsource "*/Kconfig"
+
+endif # SOC_FAMILY_ASPEED

soc/aspeed/Kconfig.defconfig

@@ -2,4 +2,8 @@
 #
 # Copyright (c) 2021 ASPEED Technology Inc.
 
+if SOC_FAMILY_ASPEED
+
 rsource "*/Kconfig.defconfig"
+
+endif # SOC_FAMILY_ASPEED

soc/broadcom/bcm_vk/Kconfig.defconfig

@@ -3,4 +3,8 @@
 # Copyright 2020 Broadcom.
 #
 
+if SOC_FAMILY_BCMVK
+
 rsource "*/Kconfig.defconfig"
+
+endif # SOC_FAMILY_BCMVK

soc/broadcom/bcm_vk/Kconfig.soc

@@ -7,7 +7,6 @@ config SOC_FAMILY_BCMVK
 	bool
 
 config SOC_FAMILY
-	string
 	default "bcm_vk" if SOC_FAMILY_BCMVK
 
 rsource "*/Kconfig.soc"

soc/gd/gd32/Kconfig

@@ -6,4 +6,8 @@ config SOC_FAMILY_GD_GD32
 	select BUILD_OUTPUT_HEX
 	select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
 
+if SOC_FAMILY_GD_GD32
+
 rsource "*/Kconfig"
+
+endif # SOC_FAMILY_GD_GD32

soc/gd/gd32/gd32a50x/Kconfig

@@ -7,7 +7,6 @@ config SOC_SERIES_GD32A50X
 	select CPU_HAS_FPU
 	select ARMV8_M_DSP
 	select CPU_CORTEX_M33
-	select SOC_FAMILY_GD_GD32
 	select GD32_HAS_AF_PINMUX
 	select GD32_HAS_IRC_40K
 	select PLATFORM_SPECIFIC_INIT

soc/gd/gd32/gd32a50x/Kconfig.soc

@@ -3,6 +3,7 @@
 
 config SOC_SERIES_GD32A50X
 	bool
+	select SOC_FAMILY_GD_GD32
 	help
 	  Enable support for GigaDevice GD32A50X MCU series
 

soc/gd/gd32/gd32e10x/Kconfig

@@ -7,6 +7,5 @@ config SOC_SERIES_GD32E10X
 	select CPU_CORTEX_M4
 	select CPU_CORTEX_M_HAS_SYSTICK
 	select CPU_CORTEX_M_HAS_VTOR
-	select SOC_FAMILY_GD_GD32
 	select GD32_HAS_AFIO_PINMUX
 	select GD32_HAS_IRC_40K

soc/gd/gd32/gd32e10x/Kconfig.soc

@@ -3,6 +3,7 @@
 
 config SOC_SERIES_GD32E10X
 	bool
+	select SOC_FAMILY_GD_GD32
 	help
 	  Enable support for GigaDevice GD32E10X MCU series
 

soc/gd/gd32/gd32e50x/Kconfig

@@ -7,6 +7,5 @@ config SOC_SERIES_GD32E50X
 	select CPU_HAS_FPU
 	select CPU_CORTEX_M33
 	select ARMV8_M_DSP
-	select SOC_FAMILY_GD_GD32
 	select GD32_HAS_AFIO_PINMUX
 	select GD32_HAS_IRC_40K

soc/gd/gd32/gd32e50x/Kconfig.soc

@@ -3,6 +3,7 @@
 
 config SOC_SERIES_GD32E50X
 	bool
+	select SOC_FAMILY_GD_GD32
 	help
 	  Enable support for GigaDevice GD32E50X MCU series
 

soc/gd/gd32/gd32f3x0/Kconfig

@@ -5,6 +5,5 @@ config SOC_SERIES_GD32F3X0
 	select ARM
 	select CPU_HAS_FPU
 	select CPU_CORTEX_M4
-	select SOC_FAMILY_GD_GD32
 	select GD32_HAS_AF_PINMUX
 	select GD32_HAS_IRC_40K

soc/gd/gd32/gd32f3x0/Kconfig.soc

@@ -3,6 +3,7 @@
 
 config SOC_SERIES_GD32F3X0
 	bool
+	select SOC_FAMILY_GD_GD32
 	help
 	  Enable support for GigaDevice GD32F3X0 MCU series
 

soc/gd/gd32/gd32f403/Kconfig

@@ -8,6 +8,5 @@ config SOC_SERIES_GD32F403
 	select CPU_CORTEX_M4
 	select CPU_CORTEX_M_HAS_SYSTICK
 	select CPU_CORTEX_M_HAS_VTOR
-	select SOC_FAMILY_GD_GD32
 	select GD32_HAS_AFIO_PINMUX
 	select GD32_HAS_IRC_40K

soc/gd/gd32/gd32f403/Kconfig.soc

@@ -3,6 +3,7 @@
 
 config SOC_SERIES_GD32F403
 	bool
+	select SOC_FAMILY_GD_GD32
 	help
 	  Enable support for GigaDevice GD32F403 MCU series
 

soc/gd/gd32/gd32f4xx/Kconfig

@@ -6,6 +6,5 @@ config SOC_SERIES_GD32F4XX
 	select CPU_HAS_ARM_MPU
 	select CPU_HAS_FPU
 	select CPU_CORTEX_M4
-	select SOC_FAMILY_GD_GD32
 	select GD32_HAS_AF_PINMUX
 	select GD32_HAS_IRC_32K

soc/gd/gd32/gd32f4xx/Kconfig.soc

@@ -4,6 +4,7 @@
 
 config SOC_SERIES_GD32F4XX
 	bool
+	select SOC_FAMILY_GD_GD32
 	help
 	  Enable support for GigaDevice GD32F4XX MCU series
 

soc/gd/gd32/gd32l23x/Kconfig

@@ -6,6 +6,5 @@ config SOC_SERIES_GD32L23X
 	select CPU_CORTEX_M23
 	select CPU_CORTEX_M_HAS_SYSTICK
 	select CPU_CORTEX_M_HAS_VTOR
-	select SOC_FAMILY_GD_GD32
 	select GD32_HAS_AF_PINMUX
 	select GD32_HAS_IRC_32K

soc/gd/gd32/gd32l23x/Kconfig.soc

@@ -3,6 +3,7 @@
 
 config SOC_SERIES_GD32L23X
 	bool
+	select SOC_FAMILY_GD_GD32
 	help
 	  Enable support for GigaDevice GD32L23X MCU series
 

soc/infineon/xmc/Kconfig.defconfig

@@ -3,10 +3,10 @@
 # Copyright (c) 2020 Linumiz
 # Author: Parthiban Nallathambi <parthiban@linumiz.com>
 
-rsource "*/Kconfig.defconfig"
-
 if SOC_FAMILY_INFINEON_XMC
 
+rsource "*/Kconfig.defconfig"
+
 config PINCTRL
 	default y
 

soc/intel/intel_niosv/Kconfig

@@ -3,4 +3,8 @@
 #
 # SPDX-License-Identifier: Apache-2.0
 
+if SOC_FAMILY_INTEL_NIOSV
+
 rsource "*/Kconfig"
+
+endif # SOC_FAMILY_INTEL_NIOSV

soc/ite/ec/Kconfig

@@ -1,4 +1,8 @@
 # Copyright (c) 2020 ITE Corporation. All Rights Reserved.
 # SPDX-License-Identifier: Apache-2.0
 
+if SOC_FAMILY_ITE_EC
+
 rsource "*/Kconfig"
+
+endif # SOC_FAMILY_ITE_EC

soc/ite/ec/Kconfig.defconfig

@@ -1,4 +1,8 @@
 # Copyright (c) 2020 ITE Corporation. All Rights Reserved.
 # SPDX-License-Identifier: Apache-2.0
 
+if SOC_FAMILY_ITE_EC
+
 rsource "*/Kconfig.defconfig.series"
+
+endif # SOC_FAMILY_ITE_EC

soc/native/inf_clock/Kconfig

@@ -5,6 +5,8 @@ config SOC_POSIX
 	select ARCH_POSIX
 	select CPU_HAS_FPU
 
+if SOC_POSIX
+
 config NATIVE_SIMULATOR_MCU_N
 	int "CPU Number this image targets"
 	range 0 15
@@ -51,3 +53,5 @@ config NATIVE_SIMULATOR_AUTOSTART_MCU
 	  another core is meant to release its reset).
 	  If that MCU was, by HW design, going to start at HW boot anyhow, this option does nothing.
 	  This option is meant to facilitate development.
+
+endif # SOC_POSIX

soc/nuvoton/npcx/Kconfig.defconfig

@@ -3,4 +3,8 @@
 # Copyright (c) 2020 Nuvoton Technology Corporation.
 # SPDX-License-Identifier: Apache-2.0
 
+if SOC_FAMILY_NPCX
+
 rsource "*/Kconfig.defconfig"
+
+endif # SOC_FAMILY_NPCX

soc/nuvoton/numaker/Kconfig

@@ -5,4 +5,8 @@
 config SOC_FAMILY_NUMAKER
 	select PLATFORM_SPECIFIC_INIT
 
+if SOC_FAMILY_NUMAKER
+
 rsource "*/Kconfig"
+
+endif # SOC_FAMILY_NUMAKER

soc/nuvoton/numaker/Kconfig.defconfig

@@ -2,10 +2,10 @@
 #
 # SPDX-License-Identifier: Apache-2.0
 
-rsource "*/Kconfig.defconfig"
-
 if SOC_FAMILY_NUMAKER
 
+rsource "*/Kconfig.defconfig"
+
 config RESET
 	default y
 

soc/nuvoton/numicro/Kconfig

@@ -6,4 +6,8 @@
 config SOC_FAMILY_NUMICRO
 	select PLATFORM_SPECIFIC_INIT
 
+if SOC_FAMILY_NUMICRO
+
 rsource "*/Kconfig"
+
+endif # SOC_FAMILY_NUMICRO

soc/nuvoton/numicro/Kconfig.defconfig

@@ -3,4 +3,8 @@
 # Copyright (c) 2020 Linumiz
 # Author: Saravanan Sekar <saravanan@linumiz.com>
 
+if SOC_FAMILY_NUMICRO
+
 rsource "*/Kconfig.defconfig"
+
+endif # SOC_FAMILY_NUMICRO

soc/raspberry_pi/Kconfig

@@ -4,4 +4,8 @@
 # Copyright (c) 2021 Yonatan Schachter
 # SPDX-License-Identifier: Apache-2.0
 
+if SOC_FAMILY_RPI_PICO
+
 rsource "*/Kconfig"
+
+endif # SOC_FAMILY_RPI_PICO

soc/rockchip/Kconfig

@@ -4,4 +4,8 @@
 # SPDX-License-Identifier: Apache-2.0
 #
 
+if SOC_FAMILY_ROCKCHIP
+
 rsource "*/Kconfig"
+
+endif # SOC_FAMILY_ROCKCHIP

soc/ti/k3/Kconfig

@@ -1,5 +1,8 @@
 # Copyright (c) 2024 Nordic Semiconductor ASA
 # SPDX-License-Identifier: Apache-2.0
 
+if SOC_FAMILY_TI_K3
+
 rsource "*/Kconfig"
 
+endif # SOC_FAMILY_TI_K3

soc/ti/simplelink/Kconfig.defconfig

@@ -1,3 +1,7 @@
 # SPDX-License-Identifier: Apache-2.0
 
+if SOC_FAMILY_TI_SIMPLELINK
+
 rsource "*/Kconfig.defconfig"
+
+endif # SOC_FAMILY_TI_SIMPLELINK

soc/xilinx/zynq7000/Kconfig.defconfig

@@ -3,10 +3,10 @@
 # SPDX-License-Identifier: Apache-2.0
 #
 
-rsource "*/Kconfig.defconfig"
-
 if SOC_FAMILY_XILINX_ZYNQ7000
 
+rsource "*/Kconfig.defconfig"
+
 config NUM_IRQS
 	int
 	# must be >= the highest interrupt number used