include: add missing irq.h include

Some modules use the IRQ API without including the necessary headers.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

arch/common/sw_isr_common.c

@@ -6,6 +6,7 @@
 
 #include <zephyr/sw_isr_table.h>
 #include <zephyr/arch/cpu.h>
+#include <zephyr/irq.h>
 #include <zephyr/sys/__assert.h>
 /*
  * Common code for arches that use software ISR tables (CONFIG_GEN_ISR_TABLES)

drivers/clock_control/beetle_clock_control.c

@@ -16,6 +16,7 @@
 
 #include <soc.h>
 #include <zephyr/drivers/clock_control.h>
+#include <zephyr/irq.h>
 #include <zephyr/sys/util.h>
 #include <zephyr/drivers/clock_control/arm_clock_control.h>
 

drivers/clock_control/clock_control_mchp_xec.c

@@ -12,7 +12,7 @@
 #include <zephyr/drivers/clock_control.h>
 #include <zephyr/drivers/clock_control/mchp_xec_clock_control.h>
 #include <zephyr/dt-bindings/clock/mchp_xec_pcr.h>
-
+#include <zephyr/irq.h>
 #include <zephyr/logging/log.h>
 LOG_MODULE_REGISTER(clock_control_xec, LOG_LEVEL_ERR);
 

drivers/clock_control/clock_control_r8a7795_cpg_mssr.c

@@ -15,6 +15,7 @@
 #include <zephyr/drivers/clock_control/renesas_cpg_mssr.h>
 #include <zephyr/dt-bindings/clock/renesas_cpg_mssr.h>
 #include <zephyr/dt-bindings/clock/r8a7795_cpg_mssr.h>
+#include <zephyr/irq.h>
 #include "clock_control_renesas_cpg_mssr.h"
 
 #define LOG_LEVEL CONFIG_CLOCK_CONTROL_LOG_LEVEL

drivers/clock_control/clock_control_renesas_cpg_mssr.c

@@ -7,6 +7,7 @@
 #include <zephyr/drivers/clock_control.h>
 #include <zephyr/drivers/clock_control/renesas_cpg_mssr.h>
 #include <zephyr/dt-bindings/clock/renesas_cpg_mssr.h>
+#include <zephyr/irq.h>
 #include "clock_control_renesas_cpg_mssr.h"
 
 static void rcar_cpg_reset(uint32_t base_address, uint32_t reg, uint32_t bit)

drivers/counter/counter_mcux_ctimer.c

@@ -10,6 +10,8 @@
 #include <zephyr/logging/log.h>
 #include <zephyr/drivers/clock_control.h>
 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
+#include <zephyr/irq.h>
+
 LOG_MODULE_REGISTER(mcux_ctimer, CONFIG_COUNTER_LOG_LEVEL);
 
 #ifdef CONFIG_COUNTER_MCUX_CTIMER_RESERVE_CHANNEL_FOR_SETTOP

drivers/counter/counter_mcux_gpt.c

@@ -8,6 +8,7 @@
 
 #include <zephyr/drivers/counter.h>
 #include <zephyr/drivers/clock_control.h>
+#include <zephyr/irq.h>
 #include <fsl_gpt.h>
 #include <zephyr/logging/log.h>
 

drivers/counter/counter_mcux_pit.c

@@ -7,6 +7,7 @@
 #define DT_DRV_COMPAT nxp_kinetis_pit
 
 #include <zephyr/drivers/counter.h>
+#include <zephyr/irq.h>
 #include <fsl_pit.h>
 
 #define LOG_MODULE_NAME counter_pit

drivers/counter/counter_mcux_rtc.c

@@ -8,6 +8,7 @@
 #define DT_DRV_COMPAT nxp_kinetis_rtc
 
 #include <zephyr/drivers/counter.h>
+#include <zephyr/irq.h>
 #include <fsl_rtc.h>
 #include <zephyr/logging/log.h>
 

drivers/counter/counter_mcux_snvs.c

@@ -17,6 +17,7 @@ LOG_MODULE_REGISTER(mcux_snvs, CONFIG_COUNTER_LOG_LEVEL);
 #endif
 
 #include <zephyr/drivers/counter.h>
+#include <zephyr/irq.h>
 #include <fsl_snvs_hp.h>
 
 #ifdef MCUX_SNVS_SRTC

drivers/counter/counter_xlnx_axi_timer.c

@@ -9,6 +9,7 @@
 #include <zephyr/arch/cpu.h>
 #include <zephyr/device.h>
 #include <zephyr/drivers/counter.h>
+#include <zephyr/irq.h>
 #include <zephyr/sys/sys_io.h>
 #include <zephyr/logging/log.h>
 LOG_MODULE_REGISTER(xlnx_axi_timer, CONFIG_COUNTER_LOG_LEVEL);

drivers/counter/timer_dtmr_cmsdk_apb.c

@@ -10,8 +10,10 @@
 #include <zephyr/device.h>
 #include <errno.h>
 #include <zephyr/init.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 #include <zephyr/drivers/clock_control/arm_clock_control.h>
+#include <zephyr/irq.h>
 
 #include "dualtimer_cmsdk_apb.h"
 

drivers/counter/timer_tmr_cmsdk_apb.c

@@ -10,6 +10,7 @@
 #include <zephyr/device.h>
 #include <errno.h>
 #include <zephyr/init.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 #include <zephyr/drivers/clock_control/arm_clock_control.h>
 

drivers/flash/flash_mcux_flexspi_mx25um51345g.c

@@ -8,6 +8,7 @@
 
 #include <zephyr/drivers/flash.h>
 #include <zephyr/logging/log.h>
+#include <zephyr/irq.h>
 #include <zephyr/sys/util.h>
 #include "spi_nor.h"
 #include "memc_mcux_flexspi.h"

drivers/flash/flash_mcux_flexspi_nor.c

@@ -7,6 +7,7 @@
 #define DT_DRV_COMPAT	nxp_imx_flexspi_nor
 
 #include <zephyr/drivers/flash.h>
+#include <zephyr/irq.h>
 #include <zephyr/logging/log.h>
 #include <zephyr/sys/util.h>
 #include "spi_nor.h"

drivers/gpio/gpio_b91.c

@@ -8,6 +8,7 @@
 
 #include <zephyr/device.h>
 #include <zephyr/drivers/gpio.h>
+#include <zephyr/irq.h>
 #include "gpio_utils.h"
 
 

drivers/gpio/gpio_eos_s3.c

@@ -8,6 +8,7 @@
 
 #include <errno.h>
 #include <zephyr/drivers/gpio.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 #include <eoss3_hal_gpio.h>
 #include <eoss3_hal_pads.h>

drivers/gpio/gpio_gecko.c

@@ -8,6 +8,7 @@
 
 #include <errno.h>
 #include <zephyr/drivers/gpio.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 #include <em_gpio.h>
 

drivers/gpio/gpio_imx.c

@@ -9,6 +9,7 @@
 #include <errno.h>
 #include <zephyr/device.h>
 #include <zephyr/drivers/gpio.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 #include <zephyr/sys/util.h>
 #include <gpio_imx.h>

drivers/gpio/gpio_ite_it8xxx2.c

@@ -10,6 +10,7 @@
 #include <zephyr/drivers/gpio.h>
 #include <zephyr/dt-bindings/gpio/ite-it8xxx2-gpio.h>
 #include <zephyr/dt-bindings/interrupt-controller/ite-intc.h>
+#include <zephyr/irq.h>
 #include <zephyr/types.h>
 #include <zephyr/sys/util.h>
 #include <string.h>

drivers/gpio/gpio_litex.c

@@ -10,6 +10,7 @@
 #include <errno.h>
 #include <zephyr/device.h>
 #include <zephyr/drivers/gpio.h>
+#include <zephyr/irq.h>
 #include <zephyr/types.h>
 #include <zephyr/sys/util.h>
 #include <string.h>

drivers/gpio/gpio_lpc11u6x.c

@@ -18,6 +18,7 @@
 
 #include <zephyr/drivers/clock_control.h>
 #include <zephyr/drivers/gpio.h>
+#include <zephyr/irq.h>
 
 #include <soc.h>
 

drivers/gpio/gpio_mchp_xec_v2.c

@@ -13,6 +13,7 @@
 #include <zephyr/dt-bindings/pinctrl/mchp-xec-pinctrl.h>
 #include <soc.h>
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/irq.h>
 
 #include "gpio_utils.h"
 

drivers/gpio/gpio_mcux.c

@@ -11,6 +11,7 @@
 #include <zephyr/device.h>
 #include <zephyr/drivers/gpio.h>
 #include <zephyr/dt-bindings/gpio/nxp-kinetis-gpio.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 #include <fsl_common.h>
 #include <fsl_port.h>

drivers/gpio/gpio_mcux_igpio.c

@@ -9,6 +9,7 @@
 #include <errno.h>
 #include <zephyr/device.h>
 #include <zephyr/drivers/gpio.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 #include <fsl_common.h>
 #include <fsl_gpio.h>

drivers/gpio/gpio_mcux_lpc.c

@@ -17,6 +17,7 @@
 #include <errno.h>
 #include <zephyr/device.h>
 #include <zephyr/drivers/gpio.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 #include <fsl_common.h>
 #include "gpio_utils.h"

drivers/gpio/gpio_mmio32.c

@@ -27,6 +27,7 @@
  */
 
 #include <zephyr/drivers/gpio/gpio_mmio32.h>
+#include <zephyr/irq.h>
 #include <errno.h>
 
 static int gpio_mmio32_config(const struct device *dev,

drivers/gpio/gpio_neorv32.c

@@ -10,6 +10,7 @@
 #include <zephyr/device.h>
 #include <zephyr/drivers/gpio.h>
 #include <zephyr/drivers/syscon.h>
+#include <zephyr/irq.h>
 #include <zephyr/sys/sys_io.h>
 #include <zephyr/logging/log.h>
 LOG_MODULE_REGISTER(gpio_neorv32, CONFIG_GPIO_LOG_LEVEL);

drivers/gpio/gpio_rpi_pico.c

@@ -6,6 +6,7 @@
 
 #include <errno.h>
 #include <zephyr/drivers/gpio.h>
+#include <zephyr/irq.h>
 
 /* pico-sdk includes */
 #include <hardware/gpio.h>

drivers/gpio/gpio_rv32m1.c

@@ -11,6 +11,7 @@
 #include <errno.h>
 #include <zephyr/device.h>
 #include <zephyr/drivers/gpio.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 #include <fsl_common.h>
 #include <fsl_port.h>

drivers/gpio/gpio_smartbond.c

@@ -10,6 +10,7 @@
 
 #include <stdint.h>
 #include <zephyr/drivers/gpio.h>
+#include <zephyr/irq.h>
 
 #include <DA1469xAB.h>
 

drivers/gpio/gpio_stellaris.c

@@ -10,6 +10,7 @@
 #include <zephyr/arch/cpu.h>
 #include <zephyr/device.h>
 #include <zephyr/drivers/gpio.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 #include <zephyr/sys/sys_io.h>
 #include "gpio_utils.h"

drivers/i2c/i2c_ite_enhance.c

@@ -9,6 +9,7 @@
 #include <zephyr/drivers/gpio.h>
 #include <zephyr/drivers/i2c.h>
 #include <zephyr/drivers/pinctrl.h>
+#include <zephyr/irq.h>
 #include <zephyr/pm/policy.h>
 #include <errno.h>
 #include <soc.h>

drivers/i2c/i2c_ite_it8xxx2.c

@@ -9,6 +9,7 @@
 #include <zephyr/drivers/gpio.h>
 #include <zephyr/drivers/i2c.h>
 #include <zephyr/drivers/pinctrl.h>
+#include <zephyr/irq.h>
 #include <errno.h>
 #include <soc.h>
 #include <soc_dt.h>

drivers/i2c/i2c_nios2.c

@@ -8,6 +8,7 @@
 
 #include <errno.h>
 #include <zephyr/drivers/i2c.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 #include <zephyr/sys/util.h>
 #include <altera_common.h>

drivers/interrupt_controller/intc_cavs.c

@@ -8,6 +8,7 @@
 
 #include <zephyr/arch/cpu.h>
 #include <zephyr/device.h>
+#include <zephyr/irq.h>
 #include <zephyr/irq_nextlevel.h>
 #include "intc_cavs.h"
 

drivers/interrupt_controller/intc_gd32_exti.c

@@ -11,6 +11,7 @@
 #include <zephyr/device.h>
 #include <zephyr/drivers/interrupt_controller/gd32_exti.h>
 #include <zephyr/sys/__assert.h>
+#include <zephyr/irq.h>
 #include <zephyr/sys/util_macro.h>
 
 #include <gd32_exti.h>

drivers/interrupt_controller/intc_sam0_eic.c

@@ -7,6 +7,7 @@
 #define DT_DRV_COMPAT atmel_sam0_eic
 
 #include <zephyr/device.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 #include <zephyr/drivers/interrupt_controller/sam0_eic.h>
 #include "intc_sam0_eic_priv.h"

drivers/pwm/pwm_mcux_ftm.c

@@ -10,6 +10,7 @@
 #include <zephyr/drivers/clock_control.h>
 #include <errno.h>
 #include <zephyr/drivers/pwm.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 #include <fsl_ftm.h>
 #include <fsl_clock.h>

drivers/pwm/pwm_mcux_pwt.c

@@ -9,6 +9,7 @@
 #include <zephyr/drivers/clock_control.h>
 #include <errno.h>
 #include <zephyr/drivers/pwm.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 #include <fsl_pwt.h>
 #include <fsl_clock.h>

drivers/sdhc/mcux_sdif.c

@@ -11,6 +11,7 @@
 #include <zephyr/drivers/pinctrl.h>
 #include <zephyr/drivers/clock_control.h>
 #include <zephyr/logging/log.h>
+#include <zephyr/irq.h>
 #include <fsl_sdif.h>
 
 LOG_MODULE_REGISTER(sdif, CONFIG_SDHC_LOG_LEVEL);

drivers/serial/uart_apbuart.c

@@ -7,6 +7,7 @@
 #define DT_DRV_COMPAT gaisler_apbuart
 
 #include <zephyr/drivers/uart.h>
+#include <zephyr/irq.h>
 #include <errno.h>
 
 /* APBUART registers

drivers/serial/uart_b91.c

@@ -10,6 +10,7 @@
 #include <zephyr/device.h>
 #include <zephyr/drivers/uart.h>
 #include <zephyr/drivers/pinctrl.h>
+#include <zephyr/irq.h>
 
 
 /* Driver dts compatibility: telink,b91_uart */

drivers/serial/uart_lpc11u6x.c

@@ -9,6 +9,7 @@
 
 #include <zephyr/drivers/uart.h>
 #include <zephyr/drivers/clock_control.h>
+#include <zephyr/irq.h>
 
 #include "uart_lpc11u6x.h"
 

drivers/serial/uart_mcux.c

@@ -11,6 +11,7 @@
 #include <zephyr/device.h>
 #include <zephyr/drivers/uart.h>
 #include <zephyr/drivers/clock_control.h>
+#include <zephyr/irq.h>
 #include <fsl_uart.h>
 #include <soc.h>
 #ifdef CONFIG_PINCTRL

drivers/serial/uart_mcux_flexcomm.c

@@ -18,6 +18,7 @@
 #include <zephyr/device.h>
 #include <zephyr/drivers/uart.h>
 #include <zephyr/drivers/clock_control.h>
+#include <zephyr/irq.h>
 #include <fsl_usart.h>
 #include <soc.h>
 #include <fsl_device_registers.h>

drivers/serial/uart_mcux_iuart.c

@@ -9,6 +9,7 @@
 #include <zephyr/device.h>
 #include <zephyr/drivers/uart.h>
 #include <zephyr/drivers/clock_control.h>
+#include <zephyr/irq.h>
 #include <errno.h>
 #include <fsl_uart.h>
 #include <zephyr/drivers/pinctrl.h>

drivers/serial/uart_mcux_lpuart.c

@@ -13,6 +13,7 @@
 #include <zephyr/device.h>
 #include <zephyr/drivers/uart.h>
 #include <zephyr/drivers/clock_control.h>
+#include <zephyr/irq.h>
 #include <zephyr/pm/policy.h>
 #ifdef CONFIG_PINCTRL
 #include <zephyr/drivers/pinctrl.h>

drivers/serial/uart_rcar.c

@@ -13,6 +13,7 @@
 #include <zephyr/drivers/clock_control.h>
 #include <zephyr/drivers/clock_control/renesas_cpg_mssr.h>
 #include <zephyr/drivers/pinctrl.h>
+#include <zephyr/irq.h>
 #include <zephyr/spinlock.h>
 
 struct uart_rcar_cfg {

drivers/serial/uart_rpi_pico.c

@@ -8,6 +8,7 @@
 #include <zephyr/drivers/uart.h>
 #include <zephyr/drivers/reset.h>
 #include <zephyr/drivers/pinctrl.h>
+#include <zephyr/irq.h>
 
 /* pico-sdk includes */
 #include <hardware/uart.h>

drivers/serial/uart_rv32m1_lpuart.c

@@ -11,6 +11,7 @@
 #include <zephyr/device.h>
 #include <zephyr/drivers/uart.h>
 #include <zephyr/drivers/clock_control.h>
+#include <zephyr/irq.h>
 #include <fsl_lpuart.h>
 #include <soc.h>
 #ifdef CONFIG_PINCTRL

drivers/serial/uart_sam.c

@@ -21,6 +21,7 @@
 #include <soc.h>
 #include <zephyr/drivers/uart.h>
 #include <zephyr/drivers/pinctrl.h>
+#include <zephyr/irq.h>
 
 /* Device constant configuration parameters */
 struct uart_sam_dev_cfg {

drivers/serial/uart_xlnx_uartlite.c

@@ -11,6 +11,7 @@
 
 #include <zephyr/device.h>
 #include <zephyr/drivers/uart.h>
+#include <zephyr/irq.h>
 #include <zephyr/sys/sys_io.h>
 
 /* AXI UART Lite v2 registers offsets (See Xilinx PG142 for details) */

drivers/serial/usart_gd32.c

@@ -12,6 +12,7 @@
 #include <zephyr/drivers/pinctrl.h>
 #include <zephyr/drivers/reset.h>
 #include <zephyr/drivers/uart.h>
+#include <zephyr/irq.h>
 
 #include <gd32_usart.h>
 

drivers/serial/usart_sam.c

@@ -21,6 +21,7 @@
 #include <soc.h>
 #include <zephyr/drivers/uart.h>
 #include <zephyr/drivers/pinctrl.h>
+#include <zephyr/irq.h>
 
 /* Device constant configuration parameters */
 struct usart_sam_dev_cfg {

drivers/timer/arm_arch_timer.c

@@ -6,6 +6,7 @@
 #include <zephyr/device.h>
 #include <zephyr/drivers/timer/arm_arch_timer.h>
 #include <zephyr/drivers/timer/system_timer.h>
+#include <zephyr/irq.h>
 #include <zephyr/sys_clock.h>
 #include <zephyr/spinlock.h>
 #include <zephyr/arch/cpu.h>

drivers/timer/cc13x2_cc26x2_rtc_timer.c

@@ -19,6 +19,7 @@
 #include <soc.h>
 #include <zephyr/drivers/clock_control.h>
 #include <zephyr/drivers/timer/system_timer.h>
+#include <zephyr/irq.h>
 #include <zephyr/sys_clock.h>
 
 #include <driverlib/interrupt.h>

drivers/timer/leon_gptimer.c

@@ -14,6 +14,7 @@
 
 #include <zephyr/device.h>
 #include <zephyr/drivers/timer/system_timer.h>
+#include <zephyr/irq.h>
 #include <zephyr/sys_clock.h>
 
 /* GPTIMER subtimer increments each microsecond. */

drivers/timer/mchp_xec_rtos_timer.c

@@ -13,6 +13,7 @@
 #include <zephyr/sys_clock.h>
 #include <zephyr/spinlock.h>
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/irq.h>
 
 BUILD_ASSERT(!IS_ENABLED(CONFIG_SMP), "XEC RTOS timer doesn't support SMP");
 BUILD_ASSERT(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC == 32768,

drivers/timer/mcux_gpt_timer.c

@@ -12,7 +12,7 @@
 #include <zephyr/sys_clock.h>
 #include <zephyr/spinlock.h>
 #include <zephyr/sys/time_units.h>
-
+#include <zephyr/irq.h>
 
 
 /* GPT is a 32 bit counter, but we use a lower value to avoid integer overflow */

drivers/timer/mcux_os_timer.c

@@ -8,6 +8,7 @@
 
 #include <zephyr/device.h>
 #include <zephyr/drivers/timer/system_timer.h>
+#include <zephyr/irq.h>
 #include <zephyr/sys_clock.h>
 #include <zephyr/spinlock.h>
 #include "fsl_ostimer.h"

drivers/timer/mips_cp0_timer.c

@@ -9,6 +9,7 @@
 
 #include <zephyr/device.h>
 #include <zephyr/drivers/timer/system_timer.h>
+#include <zephyr/irq.h>
 #include <zephyr/sys_clock.h>
 #include <zephyr/spinlock.h>
 #include <soc.h>

drivers/timer/rcar_cmt_timer.c

@@ -10,6 +10,7 @@
 #include <zephyr/drivers/timer/system_timer.h>
 #include <zephyr/drivers/clock_control.h>
 #include <zephyr/drivers/clock_control/renesas_cpg_mssr.h>
+#include <zephyr/irq.h>
 
 #define DT_DRV_COMPAT renesas_rcar_cmt
 

drivers/timer/stm32_lptim_timer.c

@@ -16,6 +16,7 @@
 #include <zephyr/drivers/clock_control/stm32_clock_control.h>
 #include <zephyr/drivers/timer/system_timer.h>
 #include <zephyr/sys_clock.h>
+#include <zephyr/irq.h>
 
 #include <zephyr/spinlock.h>
 

drivers/timer/xlnx_psttc_timer.c

@@ -9,6 +9,7 @@
 
 #include <zephyr/arch/cpu.h>
 #include <zephyr/device.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 #include <zephyr/drivers/timer/system_timer.h>
 #include "xlnx_psttc_timer_priv.h"

drivers/usb/device/usb_dc_sam_usbhs.c

@@ -7,6 +7,7 @@
 #define DT_DRV_COMPAT atmel_sam_usbhs
 
 #include <zephyr/usb/usb_device.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 #include <string.h>
 

drivers/watchdog/wdt_mcux_wdog.c

@@ -9,6 +9,7 @@
 
 #include <zephyr/drivers/watchdog.h>
 #include <zephyr/drivers/clock_control.h>
+#include <zephyr/irq.h>
 #include <fsl_wdog.h>
 
 #define LOG_LEVEL CONFIG_WDT_LOG_LEVEL

drivers/watchdog/wdt_mcux_wwdt.c

@@ -11,6 +11,7 @@
 #define DT_DRV_COMPAT nxp_lpc_wwdt
 
 #include <zephyr/drivers/watchdog.h>
+#include <zephyr/irq.h>
 #include <fsl_wwdt.h>
 #include <fsl_clock.h>
 

drivers/watchdog/wdt_sam.c

@@ -20,6 +20,7 @@
  */
 
 #include <zephyr/drivers/watchdog.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 
 #define LOG_LEVEL CONFIG_WDT_LOG_LEVEL

drivers/watchdog/wdt_wwdg_stm32.c

@@ -15,6 +15,7 @@
 #include <zephyr/sys/__assert.h>
 #include <zephyr/drivers/clock_control/stm32_clock_control.h>
 #include <zephyr/drivers/clock_control.h>
+#include <zephyr/irq.h>
 
 #include "wdt_wwdg_stm32.h"
 

drivers/watchdog/wdt_wwdgt_gd32.c

@@ -10,6 +10,7 @@
 #include <zephyr/drivers/clock_control/gd32.h>
 #include <zephyr/drivers/reset.h>
 #include <zephyr/drivers/watchdog.h>
+#include <zephyr/irq.h>
 #include <zephyr/logging/log.h>
 
 #include <gd32_wwdgt.h>

soc/arm/atmel_sam/sam3x/soc.c

@@ -19,6 +19,7 @@
 #include <soc.h>
 #include <zephyr/arch/cpu.h>
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/irq.h>
 
 /*
  * PLL clock = Main * (MULA + 1) / DIVA

soc/arm/atmel_sam/sam4e/soc.c

@@ -20,6 +20,7 @@
 #include <soc.h>
 #include <zephyr/arch/cpu.h>
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/irq.h>
 
 /**
  * @brief Setup various clock on SoC at boot time.

soc/arm/atmel_sam/sam4l/soc.c

@@ -15,6 +15,7 @@
 #include <zephyr/init.h>
 #include <soc.h>
 #include <zephyr/arch/cpu.h>
+#include <zephyr/irq.h>
 
 /** Watchdog control register first write keys */
 #define WDT_FIRST_KEY     0x55ul

soc/arm/atmel_sam/sam4s/soc.c

@@ -19,6 +19,7 @@
 #include <soc.h>
 #include <zephyr/arch/cpu.h>
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/irq.h>
 
 /**
  * @brief Setup various clock on SoC at boot time.

soc/arm/atmel_sam/same70/soc.c

@@ -16,6 +16,7 @@
 #include <soc.h>
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
 #include <zephyr/logging/log.h>
+#include <zephyr/irq.h>
 
 #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
 LOG_MODULE_REGISTER(soc);

soc/arm/atmel_sam/samv71/soc.c

@@ -17,6 +17,7 @@
 #include <soc.h>
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
 #include <zephyr/logging/log.h>
+#include <zephyr/irq.h>
 
 #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
 LOG_MODULE_REGISTER(soc);

soc/arm/bcm_vk/valkyrie/soc.c

@@ -7,6 +7,7 @@
 #include <zephyr/init.h>
 #include <soc.h>
 #include <zephyr/arch/cpu.h>
+#include <zephyr/irq.h>
 
 /**
  * @brief Perform basic hardware initialization at boot.

soc/arm/bcm_vk/viper/soc.c

@@ -8,6 +8,7 @@
 #include <zephyr/init.h>
 #include <soc.h>
 #include <zephyr/arch/cpu.h>
+#include <zephyr/irq.h>
 
 /**
  * @brief Perform basic hardware initialization at boot.

soc/arm/gigadevice/gd32e10x/soc.c

@@ -5,6 +5,7 @@
 
 #include <zephyr/device.h>
 #include <zephyr/init.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 
 static int gd32e10x_soc_init(const struct device *dev)

soc/arm/gigadevice/gd32f3x0/soc.c

@@ -5,6 +5,7 @@
 
 #include <zephyr/device.h>
 #include <zephyr/init.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 
 static int gd32f3x0_init(const struct device *dev)

soc/arm/gigadevice/gd32f403/soc.c

@@ -13,6 +13,7 @@
 
 #include <zephyr/device.h>
 #include <zephyr/init.h>
+#include <zephyr/irq.h>
 
 /**
  * @brief Perform basic hardware initialization at boot.

soc/arm/gigadevice/gd32f4xx/soc.c

@@ -5,6 +5,7 @@
 
 #include <zephyr/device.h>
 #include <zephyr/init.h>
+#include <zephyr/irq.h>
 
 static int gd32f4xx_soc_init(const struct device *dev)
 {

soc/arm/nxp_imx/mcimx6x_m4/soc.c

@@ -5,6 +5,7 @@
  */
 
 #include <zephyr/init.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 #include <zephyr/dt-bindings/rdc/imx_rdc.h>
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>

soc/arm/nxp_imx/rt5xx/soc.c

@@ -14,6 +14,7 @@
 
 #include <zephyr/init.h>
 #include <zephyr/devicetree.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 #include "flash_clock_setup.h"
 #include "fsl_power.h"

soc/arm/st_stm32/stm32f0/soc.c

@@ -14,6 +14,7 @@
 #include <stm32_ll_system.h>
 #include <zephyr/arch/cpu.h>
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/irq.h>
 #include <zephyr/linker/linker-defs.h>
 #include <string.h>
 

soc/arm/st_stm32/stm32f1/soc.c

@@ -13,6 +13,7 @@
 #include <zephyr/init.h>
 #include <zephyr/arch/cpu.h>
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/irq.h>
 
 /**
  * @brief Perform basic hardware initialization at boot.

soc/arm/st_stm32/stm32f2/soc.c

@@ -17,6 +17,7 @@
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
 #include <stm32_ll_system.h>
 #include <zephyr/linker/linker-defs.h>
+#include <zephyr/irq.h>
 #include <string.h>
 
 /**

soc/arm/st_stm32/stm32f3/soc.c

@@ -13,6 +13,7 @@
 #include <zephyr/init.h>
 #include <zephyr/arch/cpu.h>
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/irq.h>
 
 /**
  * @brief Perform basic hardware initialization at boot.

soc/arm/st_stm32/stm32f4/soc.c

@@ -14,6 +14,8 @@
 #include <zephyr/init.h>
 #include <zephyr/arch/cpu.h>
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/irq.h>
+
 #include <stm32_ll_system.h>
 
 /**

soc/arm/st_stm32/stm32f7/soc.c

@@ -15,6 +15,7 @@
 #include <soc.h>
 #include <zephyr/arch/cpu.h>
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/irq.h>
 #include <stm32_ll_system.h>
 
 /**

soc/arm/st_stm32/stm32g0/soc.c

@@ -14,6 +14,7 @@
 #include <zephyr/init.h>
 #include <zephyr/arch/cpu.h>
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/irq.h>
 #include <zephyr/linker/linker-defs.h>
 #include <string.h>
 #if defined(SYSCFG_CFGR1_UCPD1_STROBE) || defined(SYSCFG_CFGR1_UCPD2_STROBE)

soc/arm/st_stm32/stm32g4/soc.c

@@ -14,6 +14,7 @@
 #include <stm32_ll_system.h>
 #include <zephyr/arch/cpu.h>
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/irq.h>
 
 #if defined(PWR_CR3_UCPD_DBDIS)
 #include <stm32_ll_bus.h>

soc/arm/st_stm32/stm32h7/soc_m4.c

@@ -12,6 +12,7 @@
 #include <zephyr/kernel.h>
 #include <zephyr/device.h>
 #include <zephyr/init.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 #include <stm32_ll_bus.h>
 #include <stm32_ll_cortex.h>

soc/arm/st_stm32/stm32h7/soc_m7.c

@@ -12,6 +12,7 @@
 #include <zephyr/kernel.h>
 #include <zephyr/device.h>
 #include <zephyr/init.h>
+#include <zephyr/irq.h>
 #include <soc.h>
 #include <stm32_ll_bus.h>
 #include <stm32_ll_pwr.h>

soc/arm/st_stm32/stm32l0/soc.c

@@ -13,6 +13,7 @@
 #include <zephyr/init.h>
 #include <zephyr/arch/cpu.h>
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/irq.h>
 #include <zephyr/linker/linker-defs.h>
 #include <string.h>
 #include <stm32_ll_bus.h>

soc/arm/st_stm32/stm32l1/soc.c

@@ -13,6 +13,7 @@
 #include <zephyr/init.h>
 #include <zephyr/arch/cpu.h>
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/irq.h>
 #include <zephyr/linker/linker-defs.h>
 #include <string.h>
 #include <stm32_ll_bus.h>

soc/arm/st_stm32/stm32l4/soc.c

@@ -14,6 +14,7 @@
 #include <zephyr/init.h>
 #include <zephyr/arch/cpu.h>
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/irq.h>
 #include <zephyr/logging/log.h>
 
 #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL

soc/arm/st_stm32/stm32l5/soc.c

@@ -15,6 +15,7 @@
 #include <stm32_ll_pwr.h>
 #include <zephyr/arch/cpu.h>
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/irq.h>
 #include <stm32l5xx_ll_icache.h>
 #include <zephyr/logging/log.h>
 

soc/arm/st_stm32/stm32mp1/soc.c

@@ -16,6 +16,7 @@
 #include <stm32_ll_bus.h>
 #include <zephyr/arch/cpu.h>
 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/irq.h>
 
 /**
  * @brief Perform basic hardware initialization at boot.