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soc: telink_tlsr: Port to HWMv2

Ports the SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
pull/69687/head
Jamie McCrae 1 year ago committed by Carles Cufi
parent
commit
c579770e1d
  1. 4
      soc/soc_legacy/riscv/telink_tlsr/Kconfig.defconfig
  2. 4
      soc/soc_legacy/riscv/telink_tlsr/Kconfig.soc
  3. 23
      soc/soc_legacy/riscv/telink_tlsr/tlsr951x/Kconfig.soc
  4. 0
      soc/telink/tlsr/CMakeLists.txt
  5. 7
      soc/telink/tlsr/Kconfig
  6. 9
      soc/telink/tlsr/Kconfig.defconfig
  7. 10
      soc/telink/tlsr/Kconfig.soc
  8. 6
      soc/telink/tlsr/soc.yml
  9. 2
      soc/telink/tlsr/tlsr951x/CMakeLists.txt
  10. 20
      soc/telink/tlsr/tlsr951x/Kconfig
  11. 10
      soc/telink/tlsr/tlsr951x/Kconfig.defconfig
  12. 20
      soc/telink/tlsr/tlsr951x/Kconfig.soc
  13. 0
      soc/telink/tlsr/tlsr951x/init.ld
  14. 0
      soc/telink/tlsr/tlsr951x/linker.ld
  15. 0
      soc/telink/tlsr/tlsr951x/pinctrl_soc.h
  16. 0
      soc/telink/tlsr/tlsr951x/soc.c
  17. 0
      soc/telink/tlsr/tlsr951x/soc.h
  18. 0
      soc/telink/tlsr/tlsr951x/soc_context.h
  19. 0
      soc/telink/tlsr/tlsr951x/soc_irq.S
  20. 0
      soc/telink/tlsr/tlsr951x/soc_offsets.h
  21. 0
      soc/telink/tlsr/tlsr951x/start.S

4
soc/soc_legacy/riscv/telink_tlsr/Kconfig.defconfig

@ -1,4 +0,0 @@ @@ -1,4 +0,0 @@
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
source "soc/soc_legacy/riscv/telink_tlsr/*/Kconfig.defconfig.series"

4
soc/soc_legacy/riscv/telink_tlsr/Kconfig.soc

@ -1,4 +0,0 @@ @@ -1,4 +0,0 @@
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
source "soc/soc_legacy/riscv/telink_tlsr/*/Kconfig.series"

23
soc/soc_legacy/riscv/telink_tlsr/tlsr951x/Kconfig.soc

@ -1,23 +0,0 @@ @@ -1,23 +0,0 @@
# Copyright (c) 2021 Telink Semiconductor
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_TELINK_TLSR951X
choice
prompt "Telink TLSR951X SoC implementation"
config SOC_TELINK_TLSR9518
bool "Telink TLSR9518"
endchoice
config TELINK_B91_HWDSP
bool "Support Hardware DSP"
select RISCV_SOC_CONTEXT_SAVE
config TELINK_B91_PFT_ARCH
bool "Support performance throttling"
default y
select RISCV_SOC_CONTEXT_SAVE
endif # SOC_SERIES_TELINK_TLSR951X

0
soc/soc_legacy/riscv/telink_tlsr/CMakeLists.txt → soc/telink/tlsr/CMakeLists.txt

7
soc/soc_legacy/riscv/telink_tlsr/tlsr951x/Kconfig.defconfig.tlsr9518 → soc/telink/tlsr/Kconfig

@ -1,5 +1,8 @@ @@ -1,5 +1,8 @@
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
config SOC
default "tlsr9518" if SOC_TELINK_TLSR9518
if SOC_FAMILY_TELINK_TLSR
rsource "*/Kconfig"
endif # SOC_FAMILY_TELINK_TLSR

9
soc/soc_legacy/riscv/telink_tlsr/Kconfig → soc/telink/tlsr/Kconfig.defconfig

@ -1,15 +1,8 @@ @@ -1,15 +1,8 @@
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
config SOC_FAMILY_TELINK_TLSR
bool
if SOC_FAMILY_TELINK_TLSR
config SOC_FAMILY
string
default "telink_tlsr"
source "soc/soc_legacy/riscv/telink_tlsr/*/Kconfig.soc"
rsource "*/Kconfig.defconfig"
endif # SOC_FAMILY_TELINK_TLSR

10
soc/telink/tlsr/Kconfig.soc

@ -0,0 +1,10 @@ @@ -0,0 +1,10 @@
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
config SOC_FAMILY_TELINK_TLSR
bool
config SOC_FAMILY
default "telink_tlsr" if SOC_FAMILY_TELINK_TLSR
rsource "*/Kconfig.soc"

6
soc/telink/tlsr/soc.yml

@ -0,0 +1,6 @@ @@ -0,0 +1,6 @@
family:
- name: telink_tlsr
series:
- name: tlsr951x
socs:
- name: tlsr9518

2
soc/soc_legacy/riscv/telink_tlsr/tlsr951x/CMakeLists.txt → soc/telink/tlsr/tlsr951x/CMakeLists.txt

@ -7,6 +7,8 @@ zephyr_sources( @@ -7,6 +7,8 @@ zephyr_sources(
soc.c
)
zephyr_include_directories(.)
# Force using BFD-LD
zephyr_ld_options(-fuse-ld=bfd)

20
soc/soc_legacy/riscv/telink_tlsr/tlsr951x/Kconfig.series → soc/telink/tlsr/tlsr951x/Kconfig

@ -1,8 +1,8 @@ @@ -1,8 +1,8 @@
# Copyright (c) 2021 Telink Semiconductor
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_TELINK_TLSR951X
bool "Telink TLSR951X"
config SOC_SERIES_TLSR951X
bool
select RISCV
select RISCV_ISA_RV32I
select RISCV_ISA_EXT_M
@ -16,6 +16,16 @@ config SOC_SERIES_TELINK_TLSR951X @@ -16,6 +16,16 @@ config SOC_SERIES_TELINK_TLSR951X
select ATOMIC_OPERATIONS_BUILTIN
select CPU_HAS_FPU
select INCLUDE_RESET_VECTOR
select SOC_FAMILY_TELINK_TLSR
help
Enable support for Telink TLSR951X
if SOC_SERIES_TLSR951X
config TELINK_B91_HWDSP
bool "Support Hardware DSP"
select RISCV_SOC_CONTEXT_SAVE
config TELINK_B91_PFT_ARCH
bool "Support performance throttling"
default y
select RISCV_SOC_CONTEXT_SAVE
endif # SOC_SERIES_TLSR951X

10
soc/soc_legacy/riscv/telink_tlsr/tlsr951x/Kconfig.defconfig.series → soc/telink/tlsr/tlsr951x/Kconfig.defconfig

@ -1,11 +1,7 @@ @@ -1,11 +1,7 @@
# Copyright (c) 2021 Telink Semiconductor
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_TELINK_TLSR951X
config SOC_SERIES
string
default "tlsr951x"
if SOC_SERIES_TLSR951X
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
@ -48,6 +44,4 @@ config 2ND_LVL_INTR_00_OFFSET @@ -48,6 +44,4 @@ config 2ND_LVL_INTR_00_OFFSET
config HAS_FLASH_LOAD_OFFSET
default y if BOOTLOADER_MCUBOOT
source "soc/soc_legacy/riscv/telink_tlsr/tlsr951x/Kconfig.defconfig.tlsr*"
endif # SOC_SERIES_TELINK_TLSR951X
endif # SOC_SERIES_TLSR951X

20
soc/telink/tlsr/tlsr951x/Kconfig.soc

@ -0,0 +1,20 @@ @@ -0,0 +1,20 @@
# Copyright (c) 2021 Telink Semiconductor
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_TLSR951X
bool
select SOC_FAMILY_TELINK_TLSR
help
Telink TLSR951X
config SOC_TLSR9518
bool
select SOC_SERIES_TLSR951X
help
Telink TLSR9518
config SOC_SERIES
default "tlsr951x" if SOC_SERIES_TLSR951X
config SOC
default "tlsr9518" if SOC_TLSR9518

0
soc/soc_legacy/riscv/telink_tlsr/tlsr951x/init.ld → soc/telink/tlsr/tlsr951x/init.ld

0
soc/soc_legacy/riscv/telink_tlsr/tlsr951x/linker.ld → soc/telink/tlsr/tlsr951x/linker.ld

0
soc/soc_legacy/riscv/telink_tlsr/tlsr951x/pinctrl_soc.h → soc/telink/tlsr/tlsr951x/pinctrl_soc.h

0
soc/soc_legacy/riscv/telink_tlsr/tlsr951x/soc.c → soc/telink/tlsr/tlsr951x/soc.c

0
soc/soc_legacy/riscv/telink_tlsr/tlsr951x/soc.h → soc/telink/tlsr/tlsr951x/soc.h

0
soc/soc_legacy/riscv/telink_tlsr/tlsr951x/soc_context.h → soc/telink/tlsr/tlsr951x/soc_context.h

0
soc/soc_legacy/riscv/telink_tlsr/tlsr951x/soc_irq.S → soc/telink/tlsr/tlsr951x/soc_irq.S

0
soc/soc_legacy/riscv/telink_tlsr/tlsr951x/soc_offsets.h → soc/telink/tlsr/tlsr951x/soc_offsets.h

0
soc/soc_legacy/riscv/telink_tlsr/tlsr951x/start.S → soc/telink/tlsr/tlsr951x/start.S

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