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boards: xtensa: m5stack_core2: Convert to v2

Converts the board to hwmv2

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
pull/69687/head
Sylvio Alves 1 year ago committed by Carles Cufi
parent
commit
c296672720
  1. 6
      boards/m5stack/m5stack_core2/Kconfig
  2. 18
      boards/m5stack/m5stack_core2/Kconfig.defconfig
  3. 7
      boards/m5stack/m5stack_core2/Kconfig.m5stack_core2
  4. 0
      boards/m5stack/m5stack_core2/board.cmake
  5. 5
      boards/m5stack/m5stack_core2/board.yml
  6. 0
      boards/m5stack/m5stack_core2/doc/img/m5stack_core2.webp
  7. 4
      boards/m5stack/m5stack_core2/doc/index.rst
  8. 0
      boards/m5stack/m5stack_core2/grove_connectors.dtsi
  9. 0
      boards/m5stack/m5stack_core2/m5stack_core2-pinctrl.dtsi
  10. 74
      boards/m5stack/m5stack_core2/m5stack_core2_esp32_appcpu.dts
  11. 27
      boards/m5stack/m5stack_core2/m5stack_core2_esp32_appcpu.yaml
  12. 5
      boards/m5stack/m5stack_core2/m5stack_core2_esp32_appcpu_defconfig
  13. 2
      boards/m5stack/m5stack_core2/m5stack_core2_esp32_procpu.dts
  14. 2
      boards/m5stack/m5stack_core2/m5stack_core2_esp32_procpu.yaml
  15. 4
      boards/m5stack/m5stack_core2/m5stack_core2_esp32_procpu_defconfig
  16. 0
      boards/m5stack/m5stack_core2/m5stack_mbus_connectors.dtsi
  17. 0
      boards/m5stack/m5stack_core2/support/openocd.cfg

6
boards/m5stack/m5stack_core2/Kconfig

@ -0,0 +1,6 @@ @@ -0,0 +1,6 @@
# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
# SPDX-License-Identifier: Apache-2.0
config BOARD_M5STACK_CORE2
select SOC_ESP32_PROCPU if BOARD_M5STACK_CORE2_ESP32_PROCPU
select SOC_ESP32_APPCPU if BOARD_M5STACK_CORE2_ESP32_APPCPU

18
boards/boards_legacy/xtensa/m5stack_core2/Kconfig.defconfig → boards/m5stack/m5stack_core2/Kconfig.defconfig

@ -3,14 +3,7 @@ @@ -3,14 +3,7 @@
# Copyright (c) 2023 Martin Kiepfer <m.kiepfer@teleschirm.org>
# SPDX-License-Identifier: Apache-2.0
if BOARD_M5STACK_CORE2
config BOARD
default "m5stack_core2"
depends on BOARD_M5STACK_CORE2
config ENTROPY_GENERATOR
default y
if BOARD_M5STACK_CORE2_ESP32_PROCPU
config HEAP_MEM_POOL_ADD_SIZE_BOARD
int
@ -50,4 +43,11 @@ config MIPI_DBI_INIT_PRIORITY @@ -50,4 +43,11 @@ config MIPI_DBI_INIT_PRIORITY
endif # MIPI_DBI
endif # BOARD_M5STACK_CORE2
endif # BOARD_M5STACK_CORE2_ESP32_PROCPU
if BOARD_M5STACK_CORE2_ESP32_APPCPU
config HEAP_MEM_POOL_ADD_SIZE_BOARD
default 256
endif # BOARD_M5STACK_CORE2_ESP32_APPCPU

7
boards/boards_legacy/xtensa/m5stack_core2/Kconfig.board → boards/m5stack/m5stack_core2/Kconfig.m5stack_core2

@ -4,9 +4,4 @@ @@ -4,9 +4,4 @@
# SPDX-License-Identifier: Apache-2.0
config BOARD_M5STACK_CORE2
bool "M5Stack Core2 Development Board"
depends on SOC_SERIES_ESP32
choice SOC_PART_NUMBER
default SOC_ESP32_D0WD_V3
endchoice
select SOC_ESP32_D0WD_V3

0
boards/boards_legacy/xtensa/m5stack_core2/board.cmake → boards/m5stack/m5stack_core2/board.cmake

5
boards/m5stack/m5stack_core2/board.yml

@ -0,0 +1,5 @@ @@ -0,0 +1,5 @@
board:
name: m5stack_core2
vendor: m5stack
socs:
- name: esp32

0
boards/boards_legacy/xtensa/m5stack_core2/doc/img/m5stack_core2.webp → boards/m5stack/m5stack_core2/doc/img/m5stack_core2.webp

Before

Width:  |  Height:  |  Size: 87 KiB

After

Width:  |  Height:  |  Size: 87 KiB

4
boards/boards_legacy/xtensa/m5stack_core2/doc/index.rst → boards/m5stack/m5stack_core2/doc/index.rst

@ -152,7 +152,7 @@ Build and flash applications as usual (see :ref:`build_an_application` and @@ -152,7 +152,7 @@ Build and flash applications as usual (see :ref:`build_an_application` and
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: m5stack_core2
:board: m5stack_core2/esp32/procpu
:goals: build
The usual ``flash`` target will work with the ``m5stack_core2`` board
@ -161,7 +161,7 @@ application. @@ -161,7 +161,7 @@ application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: m5stack_core2
:board: m5stack_core2/esp32/procpu
:goals: flash
The baud rate of 921600bps is set by default. If experiencing issues when flashing,

0
boards/boards_legacy/xtensa/m5stack_core2/grove_connectors.dtsi → boards/m5stack/m5stack_core2/grove_connectors.dtsi

0
boards/boards_legacy/xtensa/m5stack_core2/m5stack_core2-pinctrl.dtsi → boards/m5stack/m5stack_core2/m5stack_core2-pinctrl.dtsi

74
boards/m5stack/m5stack_core2/m5stack_core2_esp32_appcpu.dts

@ -0,0 +1,74 @@ @@ -0,0 +1,74 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <espressif/esp32/esp32_appcpu.dtsi>
/ {
model = "M5Stack Core2 APPCPU";
compatible = "espressif,esp32";
chosen {
zephyr,sram = &sram0;
zephyr,ipc_shm = &shm0;
zephyr,ipc = &ipm0;
};
};
&cpu0 {
clock-frequency = <ESP32_CLK_CPU_240M>;
};
&cpu1 {
clock-frequency = <ESP32_CLK_CPU_240M>;
};
&ipm0 {
status = "okay";
};
&trng0 {
status = "okay";
};
&flash0 {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserve 60kB for the bootloader */
boot_partition: partition@1000 {
label = "mcuboot";
reg = <0x00001000 0x0000F000>;
read-only;
};
/* Reserve 1024kB for the application in slot 0 */
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00100000>;
};
/* Reserve 1024kB for the application in slot 1 */
slot1_partition: partition@110000 {
label = "image-1";
reg = <0x00110000 0x00100000>;
};
/* Reserve 256kB for the scratch partition */
scratch_partition: partition@210000 {
label = "image-scratch";
reg = <0x00210000 0x00040000>;
};
storage_partition: partition@250000 {
label = "storage";
reg = <0x00250000 0x00006000>;
};
};
};

27
boards/m5stack/m5stack_core2/m5stack_core2_esp32_appcpu.yaml

@ -0,0 +1,27 @@ @@ -0,0 +1,27 @@
identifier: m5stack_core2/esp32/appcpu
name: M5Stack Core2
type: mcu
arch: xtensa
toolchain:
- zephyr
supported:
- uart
testing:
ignore_tags:
- net
- bluetooth
- flash
- cpp
- posix
- watchdog
- logging
- kernel
- pm
- gpio
- crypto
- eeprom
- heap
- cmsis_rtos
- jwt
- zdsp
vendor: m5stack

5
boards/m5stack/m5stack_core2/m5stack_core2_esp32_appcpu_defconfig

@ -0,0 +1,5 @@ @@ -0,0 +1,5 @@
# SPDX-License-Identifier: Apache-2.0
CONFIG_MAIN_STACK_SIZE=2048
CONFIG_CLOCK_CONTROL=y
CONFIG_MINIMAL_LIBC=y

2
boards/boards_legacy/xtensa/m5stack_core2/m5stack_core2.dts → boards/m5stack/m5stack_core2/m5stack_core2_esp32_procpu.dts

@ -13,7 +13,7 @@ @@ -13,7 +13,7 @@
#include <zephyr/dt-bindings/regulator/axp192.h>
/ {
model = "M5Stack Core2";
model = "M5Stack Core2 PROCPU";
compatible = "m5stack,core2";
aliases {

2
boards/boards_legacy/xtensa/m5stack_core2/m5stack_core2.yaml → boards/m5stack/m5stack_core2/m5stack_core2_esp32_procpu.yaml

@ -1,4 +1,4 @@ @@ -1,4 +1,4 @@
identifier: m5stack_core2
identifier: m5stack_core2/esp32/procpu
name: M5Stack Core2
type: mcu
arch: xtensa

4
boards/boards_legacy/xtensa/m5stack_core2/m5stack_core2_defconfig → boards/m5stack/m5stack_core2/m5stack_core2_esp32_procpu_defconfig

@ -1,9 +1,5 @@ @@ -1,9 +1,5 @@
# SPDX-License-Identifier: Apache-2.0
CONFIG_BOARD_M5STACK_CORE2=y
CONFIG_SOC_SERIES_ESP32=y
CONFIG_MAIN_STACK_SIZE=2048
CONFIG_ESP_HEAP_MEM_POOL_REGION_1_SIZE=0

0
boards/boards_legacy/xtensa/m5stack_core2/m5stack_mbus_connectors.dtsi → boards/m5stack/m5stack_core2/m5stack_mbus_connectors.dtsi

0
boards/boards_legacy/xtensa/m5stack_core2/support/openocd.cfg → boards/m5stack/m5stack_core2/support/openocd.cfg

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