zephyr

Commit Graph

Author	SHA1	Message	Date
Torsten Rasmussen	8dc3f85622	hwmv2: Introduce Hardware model version 2 and convert devices This is a squash of the ``collab-hwm`` branch which converts all in-tree boards to hardware model version 2 including build system changes, board updates and soc conversions. This squash is a combination of the following commits: ca214745a1 soc: Remove soc_legacy folder and move ARM Kconfig `f12cb0979f` scripts: ci: check_compliance: remove HWMv1 checks `1807bcf4d4` boards: mimx8mq_evk: port to HWMv2 `3ec2299c62` soc: nxp: port imx8mq SOC to HWMv2 `8ea02f4e63` boards: verdin_imx8mp: convert to HVMv2 `f2eb7652ce` boards: phyboard_pollux: move to HVMv2 `ab509a5ee0` boards: nxp: mimx8mp_evk: port M7 core to HWMv2 `06ad037f99` soc: nxp: imx8mp: port M7 core to HWMv2 `3f9e706859` boards: mimx8mm_phyboard: convert to HVMv2 `204372d264` boards: imx8mm_evk: port CM4 core to HWMv2 `f82c961a46` soc: nxp: imx8mm: port iMX8MM M4 core to HVMv2 `6987b2e305` boards: pico_pi: convert to HVMv2 `84484e6707` boards: warp7: convert to HWMv2 `ae443d1e3c` boards: meerkat96: port to HWMv2 `e3629c64e6` boards: colibri_imx7d: port to HWMv2 `fc835d893d` soc: nxp: convert iMX7 Dual core to HWMv2 `29ef2f23eb` boards: udoo_neo_full: convert to HWMv2 `fd49b1749e` soc: nxp: convert iMX6 SoloX core to HWMv2 `1e59b7a3fd` soc: nxp: imxrt11xx: only set CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION for M7 `69bb0eb258` hwmv2: MAINTAINERS: Fix NXP maintainer yaml `1c4458890f` boards: firefly: roc_rk3568_pc: Fix SMP configuration `651a4370ad` boards: Fix variants and revisions `196cfda66d` tests/samples: Drop default revision identifiers `6ec6b1d75a` boards: Drop revision from twister identifiers for default revisions `b774cdd59f` scripts: utils: board_v1_to_v2: drop board_legacy prefix `7aa36e6640` boards: riscv: esp32c3_luatos_core: make usb variant `fe25709a9c` twister: add unit_testing soc and board `f88f211b4e` scripts: ci: check_compliance: improve the "not sorted" command `b21a455dfb` bluetooth: controller: Fix openisa checks `fdc76c48a7` workflow: compliance: Add rename limit `14ecafc67d` dts: bindings: vendor-prefixes: Sort entries `dbc366c3c7` soc: nxp: lpc: Move wrong configurations `8e02c08f96` maintainers: Fix invalid paths `b1b85e2495` boards: up: Fix spaces `58cc4013b3` maintainers: Fix xen path `66ce5c0b09` boards/soc: Add missing copyright headers `bb47243254` boards: qemu: x86: Remove pointless file `2e816a8a3a` samples: tests: update esp32-based board naming `9aeab17139` samples: tests: remove platform_exclude of esp32 boards `a4fe97b9de` boards: shields: m5stack_core2_ext: update board name `615fcab94a` samples: ipm_esp32: fix board labels and skip testing `7752f69b7f` boards: legacy: remove index entry for xtensa/riscv boards. `3eba827956` MAINTAINERS: update Espressif entries `914362bbd5` boards: xtensa: yd_esp32: Convert to v2 `a62278fd23` boards: xtensa: xiao_esp32s3: Convert to v2 `b6a11ccec4` boards: xtensa: olimex_esp32_evb: Convert to v2 `c1067c16d2` boards: xtensa: odroid_go: Convert to v2 `b8340b0109` boards: xtensa: m5stickc_plus: Convert to v2 `9d81e417be` boards: xtensa: m5stack_stamps3: Convert to v2 `c296672720` boards: xtensa: m5stack_core2: Convert to v2 `fada12aa9d` boards: xtensa: m5stack_atoms3_lite: Convert to v2 `fe37ebac1e` boards: xtensa: m5stack_atoms3: Convert to v2 `d32828fe6a` boards: xtensa: kincony_kc868_a32: Convert to v2 `5afba7855b` boards: xtensa: heltec_wireless_stick_lite_v3: Convert to v2 `ca48c17723` boards: xtensa: heltec_wifi_lora32_v2: Convert to v2 `db1fd4d229` boards: xtensa: esp32s3_luatos_core: Convert to v2 `a78b2552eb` boards: xtensa: esp32s3_devkitm: Convert to v2 `cc96061d96` boards: xtensa: esp32s2_saola: Convert to v2 `ed854e05d1` boards: xtensa: esp32s2_lolin_mini: Convert to v2 `4fa1ae8110` boards: xtensa: esp32s2_franzininho: Convert to v2 `5543040a18` boards: xtensa: esp_wrover_kit: Convert to v2 `2335ae79b3` boards: xtensa: esp32_ethernet_kit: Convert to v2 `f910b7ad4f` boards: xtensa: esp32_devkitc_wrover: Convert to v2 `32104db555` boards: xtensa: esp32_devkitc_wroom: Convert to v2 `e23a41200d` boards: riscv: icev_wireless: Convert to v2 `3c670e4e53` boards: riscv: xiao_esp32c3: Convert to v2 `fc7c6a060b` boards: riscv: stamp_c3: Convert to v2 `22c2edb89c` boards: riscv: esp32c3_luatos_core: Convert to v2 `0a96dcb778` boards: riscv: esp32c3_devkitm: Convert to v2 `be1ee1c446` vendors: update vendors lists `5e6c62137f` soc: espressif_esp32: Port to HWMv2 `037a3b52a4` boards: Raspberry Pi pico pwm led adjustment `7277cae6fa` samples: blinky_pwm: enable pwm_leds in rpi_pico overlay `da3e49d34e` boards: nxp: update selection of FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET `bc8424dd3b` soc: nxp: imxrt: move FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET to SOC level `041cb52939` soc: brcm: bcm_vk: Rename to bcnvk `576b43a95c` soc: Fix SOC_FAMILY name mismatches `e8f3e6494d` hwmv2: boards: intel: adsp: Fix runner after paths renamed `550399e927` boards: weact: stm32g431_core: Add wrongly deleted file back `08708c909e` tests: drivers: flash: Renamed missed board rename `06dac41e68` hwmv2: Convert Seagate Faze board to hwmv2 `dd8f842b40` hwmv2: nxp: update MAINTAINER paths for hwmv2 `b4d1c04978` hwmv2: lpc: updated overlay and conf files in samples and tests `067c69089e` boards: nxp: convert lpcxpresso55s69 to hwmv2 `097205b40a` hwmv2: Global fix of lpc54114_m4 overlay and conf files `d8cfa6fb29` boards: nxp: convert lpcxpresso54114 to hwmv2 `c29ed228c6` boards: nxp: convert lpcxpresso55s36 to hwmv2 `88cfd3d6ac` boards: nxp: convert lpcxpresso55s28 to hwmv2 `ad30c940ee` boards: nxp: convert lpcxpresso55s16 to hwmv2 `9e5a10ec80` boards: nxp: convert lpcxpresso55s06 to hwmv2 `5650c83268` boards: nxp: convert lpcxpresso51u68 to hwmv2 `82cf44be45` boards: nxp: convert lpcxpresso11u68 to hwmv2 `1a9c405a6f` soc: nxp: convert LPC SOC family to hardware model V2 `f2b536d253` boards: intel: doc: hwmv2: Fix some renamed paths `5ee6058710` samples/tests: Use board revisions `b76687602f` boards: Add yaml files for boards missing revisions `32ae4918d0` boards: nordic: Fix board names `cc1dabca65` MAINTAINERS: Update for renamed folders `a37ddce659` soc: xilinx: Rename to xlnx `a1393a07f6` soc: xenvm: Rename to xen `813ed00f67` soc: raspberry_pi: Rename to raspberrypi `71317d6798` soc: cadence: Rename to cdns `8cb0c51ec6` soc: broadcom: Rename to brcm `2b9db15c69` soc: andes: Rename to andestech `0101216ce1` soc: altera: Rename to altr `4b4c3ca65d` boards: wurth_elektronik: Rename to we `cdc3ef499f` boards: ublox: Rename to u-blox `cabdd4ad05` boards: space_cubics: Rename to sc `4b5bd7ae8a` boards: seeed_studio: Rename to seeed `a992785ceb` boards: raspberry_pi: Rename to raspberrypi `3c1cdc20fe` boards: laird_connect: Rename to lairdconnect `291c7cde2b` boards: cadence: Rename to cdns `95db897526` boards: broadcom: Rename to brcm `0a47b94879` boards: beagleboard: Change to beagle `9f9f221c24` boards: andes: Rename to andestech `e7869ca38a` boards: altera: Rename to altr `bf2fb5eca3` various: Change SOC_FAMILY_NRF to SOC_FAMILY_NORDIC_NRF `e25730ba56` modules: tf-m: Rename from nordic_nrf to nordic `9e3466606a` boards: nordic_nrf: Rename to nordic `09a398dcc8` soc: nordic_nrf: Rename to nordic `cb8ffc74f8` boards: renode: Add documentation index `2291ff4b55` boards: arm: riscv32_virtual: Convert to v2 `484b7f1996` soc: riscv_renode_virtual: Port to HWMv2 `cc5c2fb0c7` soc: raspberry_pi: Fix SOC_SERIES and SOC mismatch `59cb580513` soc: arm: designstart: Fix SOC_SERIES and SOC mismatch `aa9e0de7af` samples: Fix invalid links `a1480cf1cf` maintainers: Fix paths `0d719e004b` boards: Update documentation links `eb5c3e6f79` boards: wurth_elektronik: Drop duplicate prefix `a34a3640b7` boards: waveshare: Drop duplicate prefix `cf50e950e7` boards: weact: Drop duplicate prefix `737cfb548f` boards: sparkfun: Drop duplicate prefix `505494c97a` boards: segger: Drop duplicate prefix `4eaf69f37a` boards: ruuvi: Drop duplicate prefix `a1335caeae` boards: ronoth: Drop duplicate prefix `a9f7f30bf6` boards: raytac: Drop duplicate prefix `80db4c81b3` boards: qemu: Drop duplicate prefix `433d7e9976` boards: particle: Drop duplicate prefix `4ea79d19e7` boards: olimex: Drop duplicate prefix `fd4ae6f6a8` boards: mikroe: Drop duplicate prefix `36080549bd` boards: khados: Drop duplicate prefix `169bf8ae1d` boards: intel: Drop duplicate prefix `25f04d5222` boards: holyiot: Drop duplicate prefix `11c2af0de8` boards: google: Drop duplicate prefix `d5128f4016` boards: ebyte: Drop duplicate prefix `44fbc68cad` boards: dragino: Drop duplicate prefix `f7fe431b44` boards: contextual_electronics: Drop duplicate prefix `9094fea63b` boards: circuit_dojo: Drop duplicate prefix `b632acc1fc` boards: blue_clover: Drop duplicate prefix `1a3316ebdc` boards: bbc: Drop duplicate prefix `71c0344f8c` boards: arduino: Drop duplicate prefix `f0176fc25f` boards: altera: Drop duplicate prefix `36b920ed0f` boards: adi: Drop duplicate prefix `22520368d9` boards: adafruit: Drop duplicate prefix `296acfb2bc` boards: actinius: Drop duplicate prefix `55063380b7` boards: 96boards: Drop duplicate prefix `1f93394b55` boards: nxp: convert mimxrt595_evk to hardware model v2 `e7a4fd2ec1` soc: nxp: rt5xx: convert RT5xx SOC to HWMv2 `01942f1d11` twister: normalize platform name when storing files/data `477c8b84dd` twister: tests: test with slashes in platform names `64e3e816c4` soc: Add include guards `3a7aa2fa49` gitignore: update the compliance file list `84e1c17ad9` scripts: ci: check_compliance: add a check for board yml file `a90f53ad57` boards: sync up the vendor tags and vendor-list `af9aa65299` dts: vendor-prefixes: add keep-sorted markers `50f0bf05a3` dts: vendor-prefixes: sort the vendor list `a10b614aa4` dts: vendor-prefixes: ensure all prefixes are lowercase `5abe735e93` manifest: update SOF sha for NXP HWMv2 `9ab8f64ca9` modules: rename SOC_FAMILY_IMX `483ff8dd4d` modules: mcux: remove SOC_FAMILY_NXP_ADSP `f113dd5342` samples: update board name `39b31287d9` boards: nxp: Convert i.MX ADSP boards to hardware model v2 `1511e356a2` soc: nxp: Port i.MX ADSP family to hardware model v2 `c91e25ab47` soc: mec: rename all mec1501x reference to mec15xx `1c231fd939` hwmv2: boards: Convert IMXRT boards `417cff1e60` hwmv2: soc: Port IMXRT family to HWMV2 `28d4e41b1b` hwmv2: clean up arm64 soc and board empty directory `2b520f83cb` hwmv2: port NXP SoC LS1046A to V2 `bf7899c645` hwmv2: port nxp_ls1046ardb board to V2 `33f7b61866` samples/tests: Rename numaker boards `8f20ea6e93` boards: nuvoton: numaker_pfm: Split into 2 boards `7cf4ff43a1` drivers: pinctrl: imx: align with hwm v2 `c68e1fea4e` drivers: clock_control: ccm_rev2: align with hwm v2 update `3b49014a0f` hwmv2: move imx8mn EVK board to V2 `14f344eeab` hwmv2: move imx8mp EVK board to V2 `40f3f8f22d` hwmv2: move imx8mm EVK board to V2 `10bf79ea51` hwmv2: move imx8m soc for a-core to V2 `8727d5ca80` hwmv2: move imx93 EVK board to V2 `c81ef01563` hwmv2: move imx93 soc to V2 `5836c1b699` modules: mcux: introduce CONFIG_MCUX_CORE_SUFFIX `338f6f2bf1` doc: update board porting guide to match new hardware model `9639a1b5dc` soc: silabs: drop useless defconfigs `981807444e` soc: silabs: introduce SOC_GECKO_SDID `5d07e82485` soc: silabs: SOC_FAMILY_* replace SOC_GECKO_SERIES* `2fd081ac86` soc: silabs: align comments with soc tree `66d425f571` soc: silabs: split in families `5bd38f47a9` arch: arch: kconfig: Fix wrong placement of endmenu `00c6ef25be` tests/samples: Rename overlay files for renamed boards `0c639b8378` boards: Fix bools and selections `c2ef907d1d` drivers: flash: it8xxx2: Add missing Kconfigs `553de2ebc9` soc: ite: ec: it8xxx2: Fix SOC_SERIES being in wrong file `b8ec0080c2` boards: Documentation link fixes `eb7025e50f` tests: Update board names for hwmv2 `10ef3d4bd2` boards: silab: Add documentation index file `ba9fdaa1d6` boards: arm: efr32_radio: Convert to v2 `86c8d4a0ca` boards: arm: efm32pg_stk3402a: Convert to v2 `575ac5cafb` manifest: Update hal_silabs `87b2907304` boards: arm: efr32_thunderboard: Convert to v2 `14b30055ab` boards: arm: efr32mg_sltb004a: Convert to v2 `0012bfc15d` boards: arm: efr32xg24_dk2601b: Convert to v2 `f526225ead` boards: arm: efm32wg_stk3800: Convert to v2 `19e7df29df` boards: arm: efm32pg_stk3401a: Convert to v2 `0bd7d963d6` boards: arm: efm32hg_slstk3400a: Convert to v2 `795a90f9bf` boards: arm: efm32gg_stk3701a: Convert to v2 `43d5540be7` boards: arm: efm32gg_slwstk6121a: Convert to v2 `065148d856` boards: arm: efm32gg_sltb009a: Convert to v2 `1dc9a8aa17` soc: silabs_exx32: Port to HWMv2 `763571e878` tests: Expand names `dae301b8a3` boards: xen: xenvm: Expand name `19e60eef36` boards: qemu: qemu_cortex_a53: Expand names `a0a7c30f28` soc: intel: intel_adsp: Fix issues `df9a4223fe` scripts: ci: introduce soc name check in check_compliance `ed401abaff` soc: emsdsp: align SoC name defined in soc.yml to Kconfig SOC setting `fc78e5eaa4` MAINTAINERS: update RISC-V arch area paths `4e586958ff` boards: convert QEMU RISC-V 64 bit board to Zephyr HWMv2 `f4c31a2b86` boards: convert QEMU RV32E board to Zephyr HWMv2 `5b2ffc652b` boards: convert QEMU RISC-V 32 bit board to Zephyr HWMv2 `5db061a4c6` soc/riscv: convert the QEMU virt RISCV-32 SoC to HWMv2 `6547845e9d` boards: convert SparkFun RED-V Things Plus to Zephyr HWMv2 `95a1f96399` boards: convert SiFive HiFive Unmatched to Zephyr HWMv2 `e563eb0a62` soc/sifive/sifive_freedom: add SiFive Freedom FU740 SoC `8914bc58b6` boards: convert SiFive HiFive Unleashed to Zephyr HWMv2 `7e8de1e781` soc/sifive/sifive_freedom: add SiFive Freedom U540 SoC `bfcc2ed18f` boards: convert SiFive HiFive1 Rev. B to Zephyr HWMv2 `330fc38f9f` boards: convert SiFive HiFive1 to Zephyr HWMv2 `b9e06f4c38` soc/sifive/sifive_freedom: add SiFive Freedom E310 SoC `4b90b30b9d` scripts: west_commands: completion: Add hwmv2 complete to fish `0f6842e2fa` scripts: west_commands: completion: Add hwmv2 complete to zsh `b2af1e1737` scripts: west: list_boards: Fix hwmv2 output `686a4b78b8` scripts: west_commands: completion: Add hwmv2 complete to bash `396b6bb856` soc: nxp: fix typo in SoC name `765299c627` soc: broadcom: align SoC names defined in soc.yml to Kconfig SOC setting `7efd46eb41` soc: arm: align SoC names defined in soc.yml to Kconfig SOC setting `505cbc5c42` soc: mec: align SoC names defined in soc.yml to Kconfig SOC setting `951a140701` soc: ti: define SOC name in Kconfig `a795d28810` snippets: Initial HWMv2 support `f9a957e6f6` boards: nordic: nrf9160dk: Fix missing nrf52840 config `df994e7ee8` soc: xilinx: zync7000: Remove xilinx from soc series name `8dfabd56ca` soc: cypress: Add protection guard to file `447b951593` tests: kernel: tickless: Remove old board name `bad5dfa71f` boards: nordic: nrf5340dk: Fix board names `ad2e863f39` soc: atmel: Use new family prefix `3f08e714b2` soc: intel_adsp: hwmv2: Align SOC_SERIES_INTEL_ACE name and value `6734597a76` soc: intel_adsp_cavs: hwmv2: Align SOC_SERIES name and value `2908af0bcc` boards: nrf51dk/dongle: change SoC to nRF51822 `d1ceb29fca` soc: align CONFIG_SOC values to match soc.yml names `4768ccaf70` tests: drivers: gpio: gpio_api_1pin: exclude hifive1 `ebdb0879ad` boards: nxp: s32z2xxdc2: convert to hwmv2 `ae82580d08` boards: nxp: mr_canhubk3: convert to hwmv2 `c5f0defbae` boards: nxp: ucans32k1sic: convert to hwmv2 `1e46cabce6` soc: nxp: convert NXP S32 family to hwmv2 `f2f85133f2` soc: stm32: Rename series path `86642f4e78` soc: stm32: Rename Kconfig SOC_SERIES symbols `c61e807896` soc: stm32: Cleanup Kconfig.defconfig files `ca46c8abc9` tests: Fix board names `fbfed5f48f` maintainers: Update synopsys entries `8cd8b1cc47` boards: synopsys: Add documentation index `6f6cc57a04` boards: arc: hsdk4xd: Convert to v2 `c4c14a54ca` soc: snps_arc_hsdk4xd: Port to HWMv2 `06c2054e5c` boards: arc: iotdk: Convert to v2 `ff0e0fce1b` soc: snps_arc_iot: Port to HWMv2 `334264c46a` boards: arc: emsdp: Convert to v2 `8b947a0e91` soc: snps_emsdp: Port to HWMv2 `990417bbde` tests: Update board names for hwmv2 `e12719154a` boards: arc: em_starterkit: Convert to v2 `437a430fbe` soc: snps_emsk: Port to HWMv2 `f93387f968` boards: arc: hsdk: Convert to v2 `1cf2498b13` soc: snps_arc_hsdk: Port to HWMv2 `47abe81256` boards: arc: nsim: Convert to v2 `1e33786dc4` soc: snps_nsim: Port to HWMv2 `7f081914db` boards: arc: qemu_arc: Convert to v2 `bc97349dbd` soc: snps_qemu: Port to HWMv2 `a9902ff58e` boards: Use zephyr_file for file links `126e1a4e72` boards: Fix invalid documentation links `899f0257c3` boards: stm32wb: Restore missing .defconfig files `790c10b1ee` soc: x86/atom: imply mmu, do not select it `faee62088d` boards: x86: remove qemu_x86_tiny_768 `c34d186a57` x86: atom: remove soc.h with unused content `1be3a9e9d3` x86: remove legacy ia32, use atom instead `60e6b400f9` boards: qemu: move qemu_x86 -> x86 `c4fbac27e8` boards: infineon: Add documentation index `b4dd29a9c4` maintainers: Update paths for hwmv2 `380f5fdb2b` boards: cypress: Add documentation index `9de981be05` boards: arm: xmc47_relax_kit: Convert to v2 `6394e8a348` boards: arm: xmc45_relax_kit: Convert to v2 `04dbf17e19` soc: xmc_4xxx: Port to HWMv2 `c9731f1bce` boards: arm: cy8cproto_063_ble: Convert to v2 `53d41869d1` boards: arm: cy8cproto_062_4343w: Convert to v2 `46c4f01427` boards: arm: cy8ckit_062s4: Convert to v2 `d285e19cf2` boards: arm: cy8ckit_062_wifi_bt: Convert to v2 `2bebd7298c` boards: arm: cy8ckit_062_ble: Convert to v2 `af243274c2` soc: psoc6 and psoc_6: Port to HWMv2 `105a2bae84` cmake: modules: boards: Fix board deprecation for HWMv2 `dca54e000a` cmake: modules: boards: Enhance board aliases for HWMv2 `fc314e8e3f` cmake: modules: boards: Fix BOARD_ALIAS `9a7c2ce6d5` soc: gaisler: Move Kconfig file `1ac56d0501` soc: soc_legacy: mips: Remove out file `c054381a7a` boards: adjust few boards/ paths `4d93b8d9fd` boards: convert all microchip MEC boards to hwmv2 `ab2fcb1245` soc: convert microchip_mec to hwmv2 `ead4b57a7b` soc: arm64: intel_socfpga: hwmv2: Rename SoCs `d4c143d306` MAINTAINERS: intel_socfpga: Adjust to HWMv2 move `70a66ac03a` boards: arm64: intel_socfpga: Move boards to subdirectories `8a85c07799` boards: arm64: intel_socfpga_agilex5_socdk: move to HWMv2 `8c253a99fc` boards: arm64: intel_socfpga_agilex_socdk: move to HWMv2 `ab883b8019` soc: arm64: intel_socfpga: Move and convert to HWMv2 `7c8b7a153b` soc: arm: intel_socfpga_std: Rename with HWMv2 `8dc2b911f6` soc: board: intel_socfpga_std: Align names to 'Cyclone V' `402366117a` soc: arm: intel_socfpga_std: Align board subdirectory `f0a8d12745` boards: arm: cyclonev_socdk: Move to HWMv2 `2271f17a86` soc: arm: intel_socfpga_std: Move and convert to HWMv2 `841c2a9d99` boards: riscv: beaglev_fire: Convert to v2 `3b314531ab` boards: riscv: mpfs_icicle: Convert to v2 `d4ea2bf70b` boards: riscv: m2gl025_miv: Convert to v2 `5256e9fcc3` soc: microchip_miv: Port to HWMv2 `18e5cf1d51` maintainers: Update path for hwmv2 `eab8628f98` boards: arm: qemu_cortex_m3: Convert to v2 `1532f2fee1` soc: ti_lm3s6965: Port to HWMv2 `430ca6a475` maintainers: Update ambiq paths `a9b9b41b91` boards: ambiq: Add index `db0271ecbb` boards: arm: apollo4p_blue_kxr_evb: Convert to v2 `957e2b2061` boards: arm: apollo4p_evb: Convert to v2 `5a90a44454` soc: ambiq: Port to HWMv2 `a20c113fbd` boards: nxp: convert ip_k66f to hwmv2 `34e3852a54` boards: nxp: convert usb_kw24d512 to hwmv2 `20ad604de6` boards: nxp: convert twr_kv58f220m to hwmv2 `2e2a7b7656` boards: nxp: twr_ke18f: convert to hwmv2 `f7dcc2eb5e` boards: nxp: convert rddrone_fmuk66 to hwmv2 `b58e90a2e9` boards: nxp: convert hexiwear to hwmv2 `aae6e9e454` boards: nxp: frdm_kw41z: convert to hwmv2 `1d3baac2d6` boards: nxp: convert frdm_kl25z to hwmv2 `3b1d21483f` boards: nxp: frdm_k82f: port to hwmv2 `6046e6ded9` boards: nxp: port frdm_k64f to hwmv2 `0a7bf9fd79` boards: nxp: port frdm_k22f to hwmv2 `dce697c823` boards: nxp: add toctree placeholder `666a353409` soc: nxp: kinetis: convert kinetis SOC family to hardware model V2 `89f0a6034b` maintainers: Update paths for renesas boards/socs `004bd43c48` tests/samples/snippets: Update board names for hwmv2 `a6d756923d` boards: arm and arm64: rcar_h3ulcb: Convert to v2 `3801216b8d` boards: arm64: rcar_salvator_xs_m3: Convert to v2 `b7cc30aaea` boards: arm: rcar_h3_salvatorx_cr7: Convert to v2 `866427ea29` boards: arm: arduino_uno_r4: Convert to v2 `2689b3f0ee` soc: ra: Port to HWMv2 `e7ebc727c8` boards: arm: da1469x_dk_pro: Convert to v2 `903265b2bb` boards: arm: da14695_dk_usb: Convert to v2 `529a78ed51` soc: smartbond: Port to HWMv2 `97cf636ae0` boards: arm: rcar_spider_cr52: Convert to v2 `6d0c53f3a1` soc: rcar: Port to HWMv2 `44e0aa0668` soc: renesas: rzt2m: Move folder structure for more SoCs `85238fc205` boards: misc: Fixed STM32 based boards doc links `dffc08af56` boards: riscv: niosv_m: move and convert to HWMv2 `545093abe4` boards: riscv: niosv_g: move and convert to HWMv2 `ecfa192f1b` soc: riscv: intel_niosv: move and convert to HWMv2 `fd1e8cdc30` hwmv2: sof: intel_adsp: submanifest provisional link `8bf067e625` doc: boards: intel_adsp: Re-order pages `4833275ccd` MAINTAINERS: intel_adsp: Adjust to HWMv2 move `b9a70e5ea2` soc: intel_adsp: tools: pylint compliance workaround `18c70cc4bf` hwmv2: tests: boards: intel_adsp: Adjust board names `ca52baf9de` hwmv2: boards: intel_adsp: Overhaul board configurations `d1b3bcce64` soc: boards: xtensa: intel_adsp_ace: Rename with HWMv2 `f362a8ae2c` doc: soc: boards: intel_adsp_cavs25: Rename with HWMv2 `51dee5da92` tests: samples: boards: intel_adsp_cavs25: Rename with HWMv2 `e66c35e0d0` boards: xtensa: intel_adsp_cavs25: Rename board with HWMv2 `d1491a4810` soc: boards: xtensa: intel_adsp_cavs25: Rename with HWMv2 `fa0fca79c4` scripts: west: runners: intel_adsp: Adjust path to HWMv2 `acd18bfaf7` boards: xtensa: intel_adsp_ace20_lnl: move and convert to HWMv2 `546c94b958` boards: xtensa: intel_adsp_ace15_mtpm: move and convert to HWMv2 `8aab718c3e` boards: xtensa: intel_adsp_cavs25_tgph: change to board variant `30f17424a4` boards: xtensa: intel_adsp_cavs25: move and convert to HWMv2 `35a97cb524` soc: xtensa: intel_adsp: HWMv2 workaround for SOF config `fdc20fdff6` soc: xtensa: intel_adsp: move and convert to HWMv2 `22dc2b6391` cmake: improved board handling for revisions `2f1e33a2e6` cmake: improve arch error message for invalid arch selection `c47c37d3db` sample: basic: blinky_pwm: Exclude rpi_pico w variant `7a788b9a18` boards: raspberry_pi: rpi_pico: Use full name for w variant `7046b92d41` tests: atmel_sam: adc: Fix sam4e_xpro adc build `253ee9638c` tests: atmel_sam0: Update platform name `ccb4c63324` samples: atmel_sam0: Update platform name `2d4acf9230` boards: arduino_nano_33_iot: Convert to HWMv2 `a60d28969a` boards: arduino_mkrzero: Convert to HWMv2 `0409e51d3f` boards: arduino_zero: Convert to HWMv2 `1b2528df1b` boards: wio_terminal: Convert to HWMv2 `af1096e7ca` boards: ev11l78a: Convert to HWMv2 `0b1db9c53d` boards: adafruit_trinket_m0: Convert to HWMv2 `e9874671e2` boards: adafruit_itsybitsy_m4_express: Convert to HWMv2 `ba6c014071` boards: adafruit_grand_central_m4_express: Convert to HWMv2 `33ad4a51ca` boards: adafruit_feather_m0_lora: Convert to HWMv2 `9812f3d54e` boards: adafruit_feather_m0_basic_proto: Convert to HWMv2 `c76b1fbeca` boards: serpente: Convert to HWMv2 `649789e433` boards: seeeduino_xiao: Convert to HWMv2 `6b3bdb7364` boards: same54_xpro: Convert to HWMv2 `93dda5ee4b` boards: samr34_xpro: Convert to HWMv2 `e48e1f5d5b` boards: samc21n_xpro: Convert to HWMv2 `f11cf73df1` boards: saml21_xpro: Convert to HWMv2 `ac73ed6dcd` boards: samd20_xpro: Convert to HWMv2 `0fdbe3552e` boards: samd21_xpro: Convert to HWMv2 `854cff3905` boards: samr21_xpro: Convert to HWMv2 `a87ea5bc0a` soc: atmel: sam0: Port to HWMv2 `706e5d27cd` boards: riscv: neorv32: Convert to v2 `d1edcdd088` soc: neorv32: Port to HWMv2 `0f7add89ca` boards: native_sim/posix: Add 64bit versions as variants `b6edad8d68` soc: soc_legacy: remove the arm/st_stm32 folder `c58e0822a6` boards: Convert nucleo_f207zg to HWM v2 `b987093a80` soc: v2: stm32: Migrate STM32F2 series `2096fd4652` samples: bluetooth: hci_uart: Fix wrongly converted board names `830f9c5a82` MAINTAINERS: Update Atmel entries `527cd9d8cd` CODEOWNERS: Update Atmel entries `83af7d0c1c` samples: atmel_sam: Update platform name `fd9b84d457` tests: atmel_sam: Update platform name `3c72fe863c` boards: arduino_due: Convert to HWMv2 `37dfacbf9e` boards: RoboKit1: Convert to HWMv2 `1108d7b0ed` boards: sam_v71_xult: Convert to HWMv2 `bed44a5c28` boards: sam_e70_xplained: Convert to HWMv2 `40448c5a9f` boards: sam4s_xplained: Convert to HWMv2 `31273692c0` boards: sam4l_ek: Convert to HWMv2 `35b5d33ef0` boards: sam4e_xpro: Convert to HWMv2 `3b84b9910a` soc: atmel: Port SAM family to HWMv2 `da00d0e7b9` boards: Convert nucleo_wba55cg to HWM v2 `fb2103f89e` boards: Convert nucleo_wba52cg to HWM v2 `1f9a533fbc` soc: st: stm32: Migrate STM32WBA series `3f92f65b28` boards: fix documentation for alientek and blues boards `7646b74aaf` boards: stm32l4: doc: add zephyr_file to defconfig path `fea54ddcd9` boards: Convert adi_eval_adin2111ebz to HWM v2 `d47f1878b1` boards: Convert adi_eval_adin1110ebz to HWM v2 `ae42be236b` boards: Convert swan_r5 to HWM v2 `83bd1a9ecc` boards: Convert stm32l4r9i_disco to HWM v2 `39c26f09ed` boards: Convert stm32l496g_disco to HWM v2 `29d03c970b` boards: Convert stm32l476g_disco to HWM v2 `74acec315c` boards: Convert sensortile_box to HWM v2 `fee6d8676e` boards: Convert pandora_stm32l475 to HWM v2 `008b5d9392` boards: Convert nucleo_l4r5zi to HWM v2 `24e357d623` boards: Convert nucleo_l4a6zg to HWM v2 `2c5f9dcce0` boards: Convert nucleo_l496zg to HWM v2 `4da061646f` boards: Convert nucleo_l476rg to HWM v2 `15956a69b8` tests: drivers: flash: stm32: update platform name `80324f7707` boards: Convert nucleo_l452re_p to HWM v2 `9893e0d111` boards: Convert nucleo_l452re to HWM v2 `46f92b227b` boards: Convert nucleo_l433rc_p to HWM v2 `ed5d1bb4cd` boards: Convert nucleo_l432kc to HWM v2 `325f95ec20` boards: Convert nucleo_l412rb_p to HWM v2 `d055676307` boards: Convert disco_l475_iot1 to HWM v2 `c7a415d92c` boards: Convert b_l4s5i_iot01a to HWM v2 `d15144f582` soc: st: stm32: Migrate STM32L4 series `a63ff71bcb` boards: nrf_bsim: Add new nrf5340 board definitions `b53c6f412c` boards: nrf_bsim: Remove redundant option setting `83eb4fc069` MAINTAINERS: intel_ish: Adjust to HWMv2 move `715685b19f` boards: x86: intel_ish: move and convert intel_ish boards to HWMv2 `5b9ef94106` soc: x86: intel_ish: move and convert to HWMv2 `12b297707a` boards: Convert stm32wb5mmg to HWM v2 `cdcea932bc` boards: Convert stm32wb5mm_dk to HWM v2 `0a3ae2b223` boards: Convert nucleo_wb55rg to HWM v2 `20b4ce17d5` soc: st: stm32: Migrate STM32WB series `47c65400d6` soc: st: stm32: fix stm32l0 family `59ec56f9e6` boards: Convert stm32h573i_dk to HWM v2 `dc5977dbba` boards: Convert nucleo_h563zi to HWM v2 `a6e4928543` soc: st: stm32: Migrate STM32H5 series `99f248e048` soc: stm32u5: Fix references after conversion to hw modelv2 `15f16834e6` boards: Convert stm32u5a9j_dk to HWM v2 `c1ee449ef1` boards: Convert sensortile_box_pro to HWM v2 `db4deddf9d` boards: Convert nucleo_u5a5zj_q to HWM v2 `2fd3ed43d2` boards: Convert nucleo_u575zi_q to HWM v2 `902fceb173` boards: Convert b_u585i_iot02a to HWM v2 `d716ca1a10` soc: st: Migrate stm32u5 series to new hw model `b7abc89428` hwmv2: boards: x86: doc: Adjust common docs to new locations `69b334f54b` MAINTAINERS: Change paths to native and nrfbsim boards `614611a528` boards: nrf_bsim: Convert to HW model v2 `5821b9ec2e` board: native_sim/posix: Convert to hwmv2 `04cbad174e` soc: native: Convert to HWMv2 `24ca0febfc` boards: nrf_bsim: Fix path to pinctrl_soc.h `9a32559a2d` cmake: FindHostTools: Fix for hwmv2 for host based targets `c4b11e0251` boards: longan_nano: port to HWMv2 `97edd05be3` boards: gd32vf103c_starter: port to HWMv2 `9cf624c410` boards: gd32vf103v_eval: port to HWMv2 `b40bf25e5e` soc: gd_gd32: reorganize folders `71600d7e95` soc: gd_gd32: move pinctrl_soc.h content back to soc folder `2bd84a1bc5` soc: gd_gd32: port gd32vf103 series to HWMv2 `9dc342143b` boards: doc: fix a bunch of broken reference `10392d693d` doc: boards: split out shields `b2def8ed3a` boards: acrn: fix title `bf7d3efe78` boards: riscv: tlsr9518adk80d: Convert to v2 `c579770e1d` soc: telink_tlsr: Port to HWMv2 `9131540109` soc: stm32h7: Couple of tests fixes following migration `2efcefc089` boards: Convert stm32h7b3i_dk to HWM v2 `d9b295a85b` boards: Convert stm32h750b_dk to HWM v2 `a2f56bdcd5` boards: Convert stm32h747i_disco to HWM v2 `00314155df` boards: Convert stm32h735g_disco to HWM v2 `b08819dff7` boards: Convert nucleo_h7a3zi_q to HWM v2 `56456c16e5` boards: Convert nucleo_h753zi to HWM v2 `91f9198dc4` boards: Convert nucleo_h745zi_q to HWM v2 `96f1bafbf9` boards: Convert nucleo_h743zi to HWM v2 `b290f25baa` boards: Convert nucleo_h723zg to HWM v2 `9fbe6bf191` boards: Convert fk7b0m1_vbt6 to HWM v2 `44bcfe57c7` boards: Convert arduino_portenta_h7 to HWM v2 `4c86af7eae` boards: Convert arduino_opta_m4 to HWM v2 `b4f852f738` boards: Convert arduino_giga_r1 to HWM v2 `bac9789264` soc: st: Migrate stm32h7 series to new hw model `a954e1722d` boards: stm32l0: Cleanup board _defconfig files after migration `7e8515b241` boards: Convert ronoth_lodev to HWM v2 `25246c21ef` boards: Convert nucleo_l073rz to HWM v2 `09396eb2e6` boards: Convert nucleo_l053r8 to HWM v2 `70c004fd83` boards: Convert nucleo_l031k6 to HWM v2 `e3daa98e79` boards: Convert nucleo_l011k4 to HWM v2 `a2de60c6da` boards: Convert dragino_nbsn95 to HWM v2 `e877ce9cec` boards: Convert dragino_lsn50 to HWM v2 `2b50218c23` boards: Convert b_l072z_lrwan1 to HWM v2 `4a65f55916` soc: st: Migrate stm32l0 series to new hw model `cc6e6be01f` boards: fix few leftover ITE board references `a837303268` soc: stm32: Protect Kconfig symbols by SOC_FAMILY_STM32 `88e5959f17` hwm2: Fix unit_testing: it is also a legacy board by now `95e06e8663` cmake: Fix uses of old SOC path `d517d3cc24` soc: set linker script for ra4m1 `68f9aeddab` soc: ite: add SOC_SERIES_ITE_IT8XXX2 guards around ITE options `ccf4f48f01` boards: convert ite boards to hwmv2 `4a6e286a3b` soc: convert ite_ec to hwmv2 `12e375f826` doc: handle arch / soc / board docs in new hardware model `b4db917de9` boards: Add documentation index files `d6e0d27efe` samples: bluetooth: hci_uart: Fix wrong named files `bc16a7a727` tests: Update board names for hwmv2 `2834883843` boards: riscv: rv32m1_vega: Convert to v2 `9c68231ba9` soc: openisa_rv32m1: Port to HWMv2 `986e9619fd` soc: starfive_jh71xx: Port to HWMv2 `e82932e787` boards: riscv: litex_vexriscv: Convert to v2 `cb9339f88f` soc: litex_vexriscv: Port to HWMv2 `1cd4c34654` boards: riscv: opentitan_earlgrey: Convert to v2 `92eadf06b8` soc: opentitan: Port to HWMv2 `a8659e170b` boards: riscv: titanium_ti60_f225: Convert to v2 `359133d725` soc: efinix_sapphire: Port to HWMv2 `6d466429ed` soc: soc_legacy: riscv: litex_vexriscv: Add updated paths `a1ff441eb3` boards: riscv: adp_xc7k_ae350: Convert to v2 `ef82a8255c` soc: ae350: Port to HWMv2 `282204758a` samples: boards: stm32: ccm: fix include path `8ca9341195` samples: basic: threads: fix broken reference `8a947f446d` boards: nrf52840dk: fix rst syntax `324cb41153` boards: nordic_nrf: fix broken references `963c74df1c` boards: intel_(ish\|adl\|ehl\|rpl), up_squared: fix include paths `8d518ce504` boards: legacy: drop empty folders `0fef0cef5b` boards: mps2: fix table formatting `e52ccc244f` boards: add HWMv2 board index `c7426eca5e` boards: arm: add legacy tag `1eba9d8a8f` boards: acrn: create vendor folder `8d92edc727` tests: kernel: Adjust qemu_x86_tiny_768 configuration HWMv2 `75117d1b2d` scripts: ensure posix path is used with --cmakeformat `0b0384b56a` maintainers: update paths after HWMv2 changes `c1b77b223d` boards: arm: pan1783: Convert to v2 `91a077b2ab` boards: posix: nrf_bsim: Update paths `413b6c2a40` cmake: modules: configuration_files: Add board identifier overlay file `4f572ba24f` treewide: Update board names for hwmv2 `cb348c7edf` boards: arm: nrf54l15pdk_nrf54l15: Convert to v2 `811ad90566` boards: arm: nrf54h20pdk_nrf54h20: Convert to v2 `d44ef90cf8` soc: nordic_nrf: Migrate nRF54H/nRF54L to v2 and fix nrf `c860f205de` boards: arm: nrf9151dk_nrf9151: Convert to v2 `fba98a1763` soc: nordic_nrf: Migrate nRF9151 to v2 `5c156a2d35` boards: arm: 96b_carbon_nrf51: Convert to v2 `cfc47a3a4b` boards: arm: nrf9161dk_nrf9161: Convert to v2 `37129b4e44` boards: arm: nrf9131ek_nrf9131: Convert to v2 `a923beba5d` boards: arm: bl5340_dvk: Convert to v2 `d242b2703b` boards: arm: raytac_mdbt53v_db_40_nrf5340: Convert to v2 `9c80d4e644` boards: arm: raytac_mdbt53_db_40: Convert to v2 `28268c4938` boards: arm: nrf5340_audio_dk_nrf5340: Convert to v2 `33ad2b5bc6` boards: arm: thingy53_nrf5340: Convert to v2 `40daa94f2d` boards: arm: nrf9160_innblue22: Convert to v2 `2b0dbb9d51` boards: arm: nrf9160_innblue21: Convert to v2 `ee6f7697ac` boards: arm: sparkfun_thing_plus_nrf9160: Convert to v2 `594e4bad6b` boards: arm: circuitdojo_feather_nrf9160: Convert to v2 `a5803ba099` boards: arm: actinius_icarus: Convert to v2 `db8c275456` boards: arm: actinius_icarus_bee: Convert to v2 `30177cf53d` boards: arm: actinius_icarus_som: Convert to v2 `486504cf24` boards: arm: actinius_icarus_som_dk: Convert to v2 `dd0672a64c` boards: arm: nrf9160dk_: Convert to v2 `c1565b3d14` boards: arm: xiao_ble: Convert to v2 `6dd2723314` boards: arm: qemu_cortex_m0: Convert to v2 `ee1ce24a42` boards: arm: bbc_microbit: Convert to v2 `1952d559f2` boards: arm: rm1xx_dvk: Convert to v2 `9e12c3d8bd` boards: arm: nrf51dongle_nrf51422: Convert to v2 `0ffbc1da33` boards: arm: nrf51_blenano: Convert to v2 `be52dfb7b6` boards: arm: nrf51_vbluno51: Convert to v2 `4c29d1827f` boards: arm: nrf51_ble400: Convert to v2 `5b4a9556fd` boards: arm: raytac_mdbt53_db_40_nrf5340: Fix typo `69e5d87a15` boards: arm: contextualelectronics_abc: Convert to v2 `5e4ace1bbe` boards: arm: degu_evk: Convert to v2 `2762460a64` boards: arm: pan1781_evb: Convert to v2 `fdc3913e76` boards: arm: ubx_evkninab1_nrf52832: Convert to v2 `9c9c3a09a1` boards: arm: holyiot_yj16019: Convert to v2 `109edc296f` boards: arm: blueclover_plt_demo_v2_nrf52832: Convert to v2 `7bfcdbbe8f` boards: arm: decawave_dwm1001_dev: Convert to v2 `0fbb543983` boards: arm: acn52832: Convert to v2 `073e0f8080` boards: arm: we_proteus2ev_nrf52832: Convert to v2 `197a19f396` boards: arm: ebyte_e73_tbb_nrf52832: Convert to v2 `1616fc8ae5` boards: arm: nrf52_vbluno52: Convert to v2 `5622077738` boards: arm: nrf52_sparkfun: Convert to v2 `a6289516e4` boards: arm: 96b_nitrogen: Convert to v2 `439d836883` boards: arm: nrf52_blenano2: Convert to v2 `16e65f09c4` boards: arm: arduino_nicla_sense_me: Convert to v2 `862efd5a21` boards: arm: thingy52_nrf52832: Convert to v2 `dede0f6cd3` boards: arm: nrf52_adafruit_feather: Convert to v2 `91e864ea29` boards: arm: nrf52832_mdk: Convert to v2 `47ec3e416b` boards: arm: ruuvi_ruuvitag: Convert to v2 `52f797a227` boards: arm: pinetime_devkit0: Convert to v2 `433db339f9` boards: arm: ubx_evkannab1_nrf52832: Convert to v2 `a646d3f2d5` boards: arm: ubx_bmd300eval_nrf52832: Convert to v2 `d0d434bf86` cmake: print identifier instead of variant `c3f5ed8157` boards: arm: we_proteus3ev_nrf52840: Convert to v2 `eecff8ee7a` boards: arm: nrf52840_mdk_usb_dongle: Convert to v2 `34507614f6` boards: arm: nrf52840_mdk: Convert to v2 `f02b56cb96` boards: arm: nrf52840_blip: Convert to v2 `600c55c92a` boards: arm: nrf52840_papyr: Convert to v2 `f294bfc5e4` boards: arm: reel_board: Convert to v2 `882524d2a0` boards: arm: nrf21540dk_nrf52840: Convert to v2 `4bce0e9b39` boards: arm: nrf52840dongle_nrf52840: Convert to v2 `d0229c771f` boards: arm: particle_argon: Convert to v2 `23a0570e64` boards: arm: particle_boron: Convert to v2 `b6d3e1764f` boards: arm: particle_xenon: Convert to v2 `499f3e7902` boards: arm: rak5010_nrf52840: Convert to v2 `9ae6b1804d` boards: arm: rak4631_nrf52840: Convert to v2 `fe2c90da5c` boards: arm: pinnacle_100_dvk: Convert to v2 `3d4d46698c` boards: arm: ubx_evkninab3_nrf52840: Convert to v2 `b1afbf0158` boards: arm: ubx_bmd380eval_nrf52840: Convert to v2 `9f9897c872` boards: arm: ubx_bmd345eval_nrf52840: Convert to v2 `f7fb2030c7` boards: arm: ubx_bmd340eval_nrf52840: Convert to v2 `7186432662` boards: arm: raytac_mdbt50q_db_40_nrf52840: Convert to v2 `32c4bdc0c4` boards: arm: pan1780_evb: Convert to v2 `7b64c638a8` boards: arm: pan1770_evb: Convert to v2 `156ee8ad8a` boards: arm: mg100: Convert to v2 `3d33dadeb0` boards: arm: arduino_nano_33_ble: Convert to v2 `4fee7371d2` boards: arm: adafruit_itsybitsy_nrf52840: Convert to v2 `ad37a0c222` boards: arm: adafruit_feather_nrf52840: Convert to v2 `cf85b7169f` boards: arm: bt510: Convert to v2 `44b67ac430` boards: arm: bt610: Convert to v2 `7dbb65d371` boards: arm: ubx_evkninab4_nrf52833: Convert to v2 `5e79cb957d` boards: arm: raytac_mdbt50q_db_33_nrf52833: Convert to v2 `12bd83a218` boards: arm: pan1782_evb: Convert to v2 `1a135ec352` boards: arm: bbc_microbit_v2: Convert to v2 `4dbe97e5ea` boards: arm: nrf52833dk: Convert to v2 `d632b90043` boards: arm: ubx_bmd360eval_nrf52811: Convert to v2 `cc1a30f24b` boards: arm: we_ophelia1ev_nrf52805: Convert to v2 `df0df9000b` boards: arm: ubx_bmd330eval_nrf52810: Convert to v2 `d2c7972a9a` boards: arm: nrf52dk: Convert to v2 `202c2bf447` boards: arm: bl654_sensor_board: Convert to v2 `c3e36f2042` boards: arm: bl654_usb: Convert to v2 `b9dd58aea1` boards: arm: bl654_dvk: Convert to v2 `0e1898b093` boards: arm: bl653_dvk: Convert to v2 `286f4a7524` boards: arm: bl652_dvk: Convert to v2 `d1709cdb37` boards: update nRF51dk board to board scheme v2. `8f040cff2c` boards: Update nrf5340dk_nrf5340 to HWMv2 scheme `8c90fae8e0` boards: update nRF52840dk_nrf52840/nrf52811 board to board scheme v2. `c828dcc60e` boards: common: openocd-nrf5: Add HWMv2 support `c79f1b0d94` kconfig: soc: adopt Nordic SoC series to support hw model v2 scheme `3584b30fc1` tests: Update board names for hwmv2 `94024d940e` boards: arm: arty_a7: Convert to v2 `8053c3a8df` boards: arm: scobc_module1: Convert to v2 `d5473b76fe` soc: designstart: Port to HWMv2 `f5792b05e7` boards: arm: fvp_baser_aemv8r_aarch32: Convert to v2 `ff202daa8e` soc: fvp_aemv8r_aarch32: Port to HWMv2 `e66cbc2945` boards: arm: v2m_musca_s1: Convert to v2 `33b47b2edb` boards: arm: v2m_musca_b1: Convert to v2 `baeebd31d2` soc: musca: Port to HWMv2 `73b257a3f9` boards: arm: v2m_beetle: Convert to v2 `85de0888ec` soc: beetle: Port to HWMv2 `867960a891` manifest: Update modules `6ca677ed3a` boards: arm: mps2: Convert to v2 `bcf4ad19d4` twister: build_dir: convert / to _ to support hwmv2 `0ac386683f` soc: Kconfig.v2: Add SOC_PART_NUMBER `9242c3c78f` soc: stm32: soc.yml: reorder series `248d17f160` boards: stm32: cleanup `0a67265e99` boards: stm32: fix for boards with revisions `f8d44317ee` soc: stm32l5: Rename overlays for nucleo_l552ze_q ns target. `400343d17e` soc: stm32: Set default on USE_DT_CODE_PARTITION `d783ef549a` soc: stm32l5: Update stm32l5 non secure targets in various places `643aeac552` boards: Convert stm32l562e_dk to HWM v2 `e601d64344` boards: Convert nucleo_l552ze_q to HWM v2 `2f7a387b32` soc: st: Migrate stm32l5 series to new hw model `519752efcd` boards: xenvm: doc: Remove reference to deleted file `06263dd717` boards: xenvm: Unset HEAP_MEM_POOL_SIZE in gicv3 variant `66b0df5526` boards: qemu_cortex_a53: Fix Kconfig warnings in SMP variant `fa07bd9419` boards: mps3: Fix non-secure variant `8f6f0726dd` boards: Move xenvm under xen `7b155a7031` boards: Raspberry Pi vendor fix `804697afa5` boards: Move 96b_aerocore to 96boards `d2f001e320` boards: x86: acrn: move and convert to HWMv2 `ec7f7b3c30` tests: kernel: qemu_x86: adjust to the HWMv2 `89dfcddc7e` boards: x86: qemu_x86_tiny@768: change to board variant `eb724eb6a7` boards: x86: qemu_x86: optimize default HWMv2 configurations `6f1043cde6` boards: x86: qemu_x86: move and convert to HWMv2 `cab924cbfb` soc: x86: ia32: move and convert to HWMv2 `237fdff918` soc: x86: lakemont: move and convert to HWMv2 `03042b7704` boards: move 96b_carbon to 96boards folder `767b94414e` boards: rename vendor seeed to seeed_studio `07fa3a3d79` boards: Convert olimex_lora_stm32wl_devkit to HWM v2 `ba01d3beca` boards: Convert nucleo_wl55jc to HWM v2 `7ce84f4041` boards: Convert lora_e5_mini to HWM v2 `b988bae576` boards: Convert lora_e5_dev_board to HWM v2 `6fbf39c726` soc: v2: stm32: Migrate STM32WL series `4a41878442` soc: st: stm32g4: add missing include `1e79ba15f6` boards: Convert weact_stm32g431_core to HWM v2 `ffdcb60185` boards: Convert nucleo_g474re to HWM v2 `d6acb08d3e` boards: Convert nucleo_g431rb to HWM v2 `90e592ffd1` boards: Convert b_g474e_dpow1 to HWM v2 `eb8a7e3441` soc: st: stm32: Migrate STM32G4 series `ada469f237` tests: Update board names for hwmv2 `0342433187` boards: arm: npcx9m6f_evb: Convert to v2 `c10248d964` boards: arm: npcx7m6fb_evb: Convert to v2 `21ddc5e6a6` boards: arm: npcx4m8f_evb: Convert to v2 `5500f3ef21` soc: npcx: Port to HWMv2 `e7baf09ede` soc: m48x: Port to HWMv2 `5bae4a6480` boards: arm: numaker_pfm_m467: Convert to v2 `3b0bd70c8c` soc: m46x: Port to HWMv2 `d52eab9e83` boards: Convert stm32g081b_eval to HWM v2 `6f2835cb11` boards: Convert stm32g071b_disco to HWM v2 `ca36d331d2` boards: Convert stm32g0316_disco to HWM v2 `662cc4e09b` boards: Convert nucleo_g0b1re to HWM v2 `dd9bc29769` boards: Convert nucleo_g071rb to HWM v2 `353da23ffb` boards: Convert nucleo_g070rb to HWM v2 `acc932b424` boards: Convert nucleo_g031k8 to HWM v2 `cea9b140fd` boards: Convert google_twinkie_v2 to HWM v2 `52e025943a` soc: st: stm32: Migrate STM32G0 series `1c7347686a` ci: update check_compliance to not create duplicate lines in Kconfig `9debd98799` hwmv2: boards: up_squared_pro_700: Add missed intel_adl changes `adab07c42f` boards: Convert msp_exp432p401r_launchxl to HWM v2 `642aacdcdf` soc: ti_simplelink: Add missing SoC `48637066d3` boards: Fix file paths in documentation `e983bc2a23` samples/tests: Fix mps3 board name `61e0f32716` boards: Convert stm32f3_seco_d23 to HWM v2 `a1688ff641` boards: Convert stm32f3_disco to HWM v2 `35fb228599` boards: Convert stm32373c_eval to HWM v2 `10e5d1122b` boards: Convert nucleo_f334r8 to HWM v2 `c319cb19f0` boards: Convert nucleo_f303re to HWM v2 `11725ccac1` boards: Convert nucleo_f303k8 to HWM v2 `400f7f6a4f` boards: Convert nucleo_f302r8 to HWM v2 `8d84861390` soc: v2: stm32: Migrate STM32F3 series `85b9eee7e8` boards: arm: kv260_r5: Convert to v2 `dafbd638e4` boards: arm: mercury_xu: Convert to v2 `3ecd12f415` boards: arm: qemu_cortex_r5: Convert to v2 `5db2390e9d` soc: xilinx_zyncmp: Port to HWMv2 `9ba8195cdc` boards: arm: qemu_cortex_a9: Convert to v2 `8e94b85361` boards: arm: zybo: Convert to v2 `c970127fc2` soc: xilinx_zynq7000: Port to HWMv2 `394c75373c` boards: arm: ast1030_evb: Convert to v2 `f2a1cc8714` soc: ast10x0: Port to HWMv2 `28f3f25945` boards: arm: cc3235sf_launchxl: Convert to v2 `c3e480f740` boards: arm: cc3220sf_launchxl: Convert to v2 `fd5847123f` boards: arm: beagleconnect_freedom: Convert to v2 `76ba9a0587` boards: arm: cc1352p1_launchxl: Convert to v2 `719baa8850` boards: arm: cc1352r1_launchxl: Convert to v2 `5060a61ae1` boards: arm: cc1352r_sensortag: Convert to v2 `99584be1c5` boards: arm: cc26x2r1_launchxl: Convert to v2 `2dc8933942` soc: ti_simplelink: Port to HWMv2 `a5b004663b` scripts/utils/board_v1_to_v2.py: couple of fixes `77c2c333e5` boards: move 96b_stm32_sensor_mez to 96boards `c14ff98650` boards: stm32f411e_disco: delete obsolete file `bcdc268ccf` boards: Convert stm32mp157c_dk2 to HWM v2 `0c8ba92e1f` boards: Convert 96b_avenger96 to HWM v2 `b54fe33077` soc: v2: stm32: Migrate STM32MP1 series `2ba3639b2a` boards: Convert nucleo_c031c6 to HWM v2 `dbc5ed79f5` soc: st: stm32: Migrate STM32C0 series `ce6d493aa3` boards: Convert stm32l1_disco to HWM v2 `a28086a9ca` boards: Convert nucleo_l152re to HWM v2 `1b2a511d06` boards: Convert 96b_wistrio to HWM v2 `ce281f09ab` soc: v2: stm32: Migrate STM32L1 series `cdb5364fd7` boards: Convert stm32f769i_disco to HWM v2 `768f173dcb` boards: Convert stm32f7508_dk to HWM v2 `21bbbbd9cb` boards: Convert stm32f746g_disco to HWM v2 `bab4265693` boards: Convert stm32f723e_disco to HWM v2 `58f8fe82ba` boards: Convert nucleo_f767zi to HWM v2 `37e9084070` boards: Convert nucleo_f756zg to HWM v2 `d467e7053a` boards: Convert nucleo_f746zg to HWM v2 `5f2808d7cc` boards: Convert nucleo_f722ze to HWM v2 `bbb73e7550` soc: st: Migrate stm32f7 series to new hw model `e9094afc4d` soc: st: stm32: stm32f4: change SOC_STM32F405XG to SOC_STM32F405XX `a1712cdd53` boards: Convert stm32f4_disco to HWM v2 `5be404b365` boards: Convert stm32f469i_disco to HWM v2 `baaa697ab2` boards: Convert stm32f429i_disc1 to HWM v2 `69ecab3c90` boards: Convert stm32f412g_disco to HWM v2 `2a572e3fb0` boards: Convert stm32f411e_disco to HWM v2 `ecfbf42757` boards: Convert stm32f401_mini to HWM v2 `e0191d03bb` boards: Convert steval_fcu001v1 to HWM v2 `4454648976` boards: Convert segger_trb_stm32f407 to HWM v2 `f0ad6ee6b8` boards: Convert olimex_stm32_p405 to HWM v2 `1f5e228ec8` boards: Convert olimex_stm32_h407 to HWM v2 `834bdb615e` boards: Convert olimex_stm32_h405 to HWM v2 `8f27fa8de2` boards: Convert olimex_stm32_e407 to HWM v2 `f8633a9038` boards: Convert nucleo_f446ze to HWM v2 `07e0bd2c07` boards: Convert nucleo_f446re to HWM v2 `24d7f625dc` boards: Convert nucleo_f429zi to HWM v2 `157a8cde53` boards: Convert nucleo_f413zh to HWM v2 `4ec99c31b0` boards: Convert nucleo_f412zg to HWM v2 `a21546140a` boards: Convert nucleo_f411re to HWM v2 `43f01ab6de` boards: Convert nucleo_f410rb to HWM v2 `60c16bcb8b` boards: Convert nucleo_f401re to HWM v2 `2db228d730` boards: Convert mikroe_mini_m4_for_stm32 to HWM v2 `73fc26225c` boards: Convert mikroe_clicker_2 to HWM v2 `6b62d90114` boards: Convert google_dragonclaw to HWM v2 `fa845af309` boards: Convert blackpill_f411ce to HWM v2 `5c8c3c3be0` boards: Convert blackpill_f401ce to HWM v2 `3c02db1290` boards: Convert blackpill_f401cc to HWM v2 `7eeb723cb7` boards: Convert black_f407zg_pro to HWM v2 `4f9461d068` boards: Convert black_f407ve to HWM v2 `a821de8532` boards: Convert az3166_iotdevkit to HWM v2 `ba580c7236` boards: Convert adi_sdp_k1 to HWM v2 `eb272ddf19` boards: Convert adafruit_feather_stm32f405 to HWM v2 `58ed121c3a` boards: Convert 96b_stm32_sensor_mez to HWM v2 `b0d70959d3` boards: Convert 96b_neonkey to HWM v2 `b1088baadc` boards: Convert 96b_carbon to HWM v2 `18d867b0a9` boards: Convert 96b_argonkey to HWM v2 `ee6ede7119` boards: Convert 96b_aerocore2 to HWM v2 `b48e70ead9` soc: v2: stm32: Migrate STM32F4 series `14d2b955da` cmake: convert path to CMake style before writing Kconfig files `9c4ac6a202` boards: posix: bsim: Update paths `14b57f56d7` tests: drivers: gpio: gpio_ite_it8xxx2_v2: Temp fix `f3b173be18` scripts: board_v1_to_v2: Update following move to boards_legacy `05b50f6691` cmake: CMake soc dir variable improvements for HWMv2 `a188e01a12` hwmv2: move all ported boards and socs to their final location `22c53e97b5` hwmv2: move all non-ported legacy boards and socs to legacy folders `53f3b181b0` soc: ti_k3: Port to HWMv2 `9f19a2075a` soc: rk3568: Port to HWMv2 `b8928b1628` soc: rk3399: Port to HWMv2 `cda3a74868` boards: arm64: qemu_kvm_arm64: Convert to v2 `70d704bd20` soc: x86: atom: move and convert to HWMv2 `4789e1068e` boards: x86: intel_rpl: move and convert raptor_lake boards to HWMv2 `384307e3dc` soc: x86: raptor_lake: move and convert to HWMv2 `ed025df674` boards: x86: intel_ehl: move and convert elkhart_lake boards to HWMv2 `994b6e1731` soc: x86: elkhart_lake: move and convert to HWMv2 `73b30a04cf` boards: x86: up_squared_pro_7000: move and convert to HWMv2 `83b133c207` boards: x86: intel_adl: move and convert alder_lake boards to HWMv2 `847a12f1e4` soc: alder_lake: move and convert to HWMv2 `67f4c8d2a1` samples: up_squared: adjust gpio_counter to HWMv2 `5326b5bfc0` boards: x86: up_squared: move and convert to HWMv2 `cfd5e691b4` soc: apollo_lake: move and convert to HWMv2 `ac9c235741` boards: xtensa: qemu_xtensa: Convert to v2 `f198c3a761` ci: update to osource for soc/Kconfig.defconfig files `e438e6cad4` ci: add SOC_SERIES_ as false positive in check_compliance.py `95e34da7c1` soc: v2: Convert st_stm32 to st/stm32 `313717df76` soc: mps3: Fix missing family `392c3969ed` boards: arm: am62x_m4: Convert to v2 `8f245d764d` tests: Update board names for hwmv2 `8f71bb7b4f` boards: arm64: khadas_edgev: Convert to v2 `e27d23aad0` soc: rk3399: Port to HWMv2 `80823b860e` boards: arm64: roc_rk3568_pc: Convert to v2 `72e4483dec` soc: rk3568: Port to HWMv2 `bed94669e3` boards: arm64: phycore_am62x_a53: Convert to v2 `c01af5a7b8` soc: ti_k3: Port to HWMv2 `1e563b4ca3` boards: arm64: xenvm: Convert to v2 `76e484adae` soc: xenvm: Port to HWMv2 `34412f7fe2` boards: arm64: rpi_4b: Convert to v2 `9be50e2ca9` soc: bcm2711: Port to HWMv2 `bbbed12c2f` boards: arm64: qemu_kvm_arm64: Convert to v2 `4f5ec7ff8f` soc: qemu_virt_arm64: Port to HWMv2 `d8d1b9f200` boards: arm64: qemu_cortex_a53: Convert to v2 `30bd34b31e` soc: qemu_cortex_a53: Port to HWMv2 `c20d0dcbb6` boards: arm64: fvp_baser_aemv8r: Convert to v2 `02ed6af463` boards: arm64: fvp_base_revc_2xaemv8a: Convert to v2 `1b175003a4` soc: fvp_aemv8*: Port to HWMv2 `de231b911d` boards: v2: Clean up obsolete comments `aa9597f6d9` boards: Convert waveshare_open103z to HWM v2 `9644828c81` boards: Convert stm32vl_disco to HWM v2 `86ab2bd430` boards: Convert stm32_min_dev to HWM v2 `d88d3ddcc4` boards: Convert stm32f103_mini to HWM v2 `0ccc0204e1` boards: Convert stm3210c_eval to HWM v2 `dd9972d782` boards: Convert olimex_stm32_h103 to HWM v2 `a2c2e1406d` boards: Convert olimexino_stm32 to HWM v2 `2d9c62e118` boards: Convert nucleo_f103rb to HWM v2 `e8ba99dc59` soc: v2: stm32: Migrate STM32F1 series `9a93916604` tests: Update board names for hwmv2 `9c4d94844d` boards: arm: bcm958401m2: Convert to v2 `feaf4ffba1` boards: arm: bcm958402m2: Convert to v2 `87f0827121` soc: bcm_vk: Port to HWMv2 `4526be24a5` boards: arm: quick_feather: Convert to v2 `cd921d2b97` boards: arm: qomu: Convert to v2 `b3c04051fc` soc: quicklogic_eos_s3: Port to HWMv2 `a73a9e7533` boards: v2: Clean up obsolete comments `8d87bcc167` boards: Convert stm32f0_disco to HWM v2 `1933585785` boards: Convert stm32f072_eval to HWM v2 `6f9fe5429d` boards: Convert stm32f072b_disco to HWM v2 `9dc78e4025` boards: Convert stm32f030_demo to HWM v2 `35113e8923` boards: Convert nucleo_f091rc to HWM v2 `b276aee9a4` boards: Convert nucleo_f070rb to HWM v2 `795f8d611b` boards: Convert nucleo_f042k6 to HWM v2 `2d82646443` boards: Convert nucleo_f031k6 to HWM v2 `959786f12d` boards: Convert nucleo_f030r8 to HWM v2 `81670db2e9` boards: Convert legend to HWM v2 `8980430aad` boards: Convert google_kukui to HWM v2 `ac020f66e0` dts: stm32f0: fix few warnings `5140e4551a` boards: v2: doc: Add vendors `77d640e0c9` soc: v2: stm32: Migrate STM32F0 series `0131e1c159` soc: v2: Add st_stm32 structure and common folder `36b63787a7` boards: v2: Add documentation index for converted boards `ae02fc5047` boards: sparc: qemu_leon3: Convert to v2 `f38f7bb223` boards: sparc: gr716a: Convert to v2 `d3cca3580e` soc: gr716a: Port to HWMv2 `6a8a0c1647` boards: sparc: generic_leon3: Convert to v2 `faf22185ce` soc: leon3: Port to HWMv2 `e94762ecdc` tests: Update board names for hwmv2 `9afcc27e05` boards: xtensa: qemu_xtensa: Convert to v2 `3e4a17018f` soc: dc233c: Port to HWMv2 `9188fdcd78` boards: xtensa: xt-sim: Convert to v2 `fcaa41cb5d` soc: xtensa_sample_controller: Port to HWMv2 `dbc413f7f7` scripts: board_v1_to_v2: Fix CONFIG_SOC_SERIES_ exclusion `6be3d4bc80` kconfig: remove Kconfig BOARD_RPI_PICO_W safe guard. `f4442fa698` boards: v2: Add documentation index for converted boards `ec5fbd67f7` boards: nios2: qemu_nios2: Convert to v2 `d3ef220460` soc: nios2-qemu: Port to HWMv2 `a223f284b5` boards: nios2: altera_max10: Convert to v2 `c381edcb73` soc: nios2f-zephyr: Port to HWMv2 `97401c7d2a` boards: mips: qemu_malta: Convert to v2 `e7a3243a24` soc: qemu_malta: Port to HWMv2 `bec82c690d` boards: v2: Add documentation index for converted boards `94f6f9b636` boards: arm: w5500_evb_pico: Convert to v2 `209235ab6e` boards: arm: sparkfun_pro_micro_rp2040: Convert to v2 `e5b1885907` boards: arm: adafruit_qt_py_rp2040: Convert to v2 `4c750818f9` boards: arm: adafruit_kb2040: Convert to v2 `8d3896caa4` boards: arm: rpi_pico: Convert to v2 `42cff42c42` soc: rpi_pico: Port to HWMv2 `c2df4ca9cb` scripts: improve yaml schema and board.yml validation for revisions `3970f90f71` cmake: clear BOARD_CACHE when invalid board identifier is given `3a70ee9ccd` cmake: improve board revision handling `3cda715fae` scripts: board_v1_to_v2: Don't add select CONFIG_SOC_SERIES_FOO `dc56a543f3` scripts: board_v1_to_v2: Add License + copyright `87147f88c4` cmake: prefer cache BOARD_IDENTIFIER over extracting from BOARD `65f5dc5b8c` cmake: fail when board identifier is applied in legacy hw model `7db2b6efd8` cmake: cache BOARD_IDENTIFIER to preserve it between CMake invocations `85dddac5a2` scripts: using extend in list_boards for variant list `6ae5c4e7fd` scripts: utils: add board v1->v2 conversion utility `ef834a12d0` maintainers: update Renesas RZT2M path `3ab7830625` boards: renesas: add documentation entry `a0c2ca0491` boards: arm: add documentation entry `27ff3654b7` boards: gigadevice: add documentation entry `6e02f43c0a` maintainers: update GD32 paths `1bfcf1d974` boards: gd32l233r_eval: convert to HWMv2 `6e621ee43f` boards: gd32f470i_eval: convert to HWMv2 `219b149768` boards: gd32f450z_eval: convert to HWMv2 `91c52b0d39` boards: gd32f450v_start: convert to HWMv2 `f0e0a973f6` boards: gd32f407v_start: convert to HWMv2 `6f592b64c9` boards: gd32f403z_eval: convert to HWMv2 `4bcb4b2ac8` boards: gd32f350r_eval: convert to HWMv2 `fdc7ed6eb0` boards: gd32e507z_eval: convert to HWMv2 `770376250d` boards: gd32e507v_start: convert to HWMv2 `a6d8b92e86` boards: gd32e103v_eval: convert to HWMv2 `a5f8e5daa1` boards: gd32a503v_eval: convert to HWMv2 `5ee799cc5f` boards: gd32f450i_eval: convert to HWMv2 `8aa8ce4ac8` soc: gigadevice: port to HWMv2 `4e203c14c7` cmake: enhanced board entry file handling `312265ee04` scripts: make SoC field mandatory in board.yml `c12ae3bcbc` boards: update Renesas rzt2m board.yml to contain SoC information `c5321c1dbe` cmake: make SoC optional for boards containing a single SoC `bcc06c60ae` scripts: support SoC list output for boards `db9e46010c` twister: update testcase.yaml and sample.yaml to mps3/an547 identifier `a988adee7d` boards: update arm mps3 an547 board to HWMv2 scheme `7dc2c9db0c` soc: use HWMv2 for arm mps3 SoC `c506675b7c` boards: update Renesas Starter Kit+ for RZ/T2M board to HWMv2 scheme `3abb792073` soc: use HWMv2 for renesas_rzt2m SoC `4f52bc646e` cmake: support hw model v2 in arch/Kconfig tree `a712b5005b` scripts: extend kconfig compliance to verify board / SoC scheme v2 `baa55141a1` twister: update twister testplan.py to handle HWMv2 boards `1f026f70eb` boards: extend list_boards.py and update boards CMake module `bd854a3af8` cmake: introduce arch and soc cmake modules for hw model v2 `c9edefa8fd` arch: add existing archs to archs.yml for HWMv2 support `61bbfb5ba2` scripts: introduce list_hardware.py for listing of architectures and SoCs `a4d1980c35` build: board/ soc: introduce hw model v2 scheme Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com> Signed-off-by: Declan Snyder <declan.snyder@nxp.com> Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com> Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com> Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no> Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com> Signed-off-by: David Leach <david.leach@nxp.com> Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com> Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com> Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com> Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com> Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no> Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com> Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com> Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com> Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com> Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no> Signed-off-by: Francois Ramu <francois.ramu@st.com> Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com> Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no> Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com> Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com> Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>	1 year ago
Gerard Marull-Paretas	452a2f67cd	arch: riscv: use CONFIG_RISCV_MCAUSE_EXCEPTION_MASK Instead of custom SOC_MCAUSE_EXP_MASK definition. Note that SoCs selecting RISCV_PRIVILEGED already used such config indirectly (see changes in soc_common.h). Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>	2 years ago
Anas Nashif	e25f31ab78	arch: guard more code with CONFIG_EXCEPTION_DEBUG It should be possible to disable exception debug, which is enabled by default to reduce image size. Add missing guards now that the option is cross architecture. Signed-off-by: Anas Nashif <anas.nashif@intel.com>	2 years ago
Anas Nashif	6baa622958	arch: move exc_handle.h under zephyr/arch/common This header is private and included only in architecture code, no need for it to be in the top of the public include directory. Note: This might move to a more private location later. For now just cleaning up the obvious issues. Signed-off-by: Anas Nashif <anas.nashif@intel.com>	2 years ago
Gerard Marull-Paretas	be38456279	include: types: remove ulong_t ulong_t was mainly used in MIPS/RISC-V. Just use "unsigned long". Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>	3 years ago
Nicolas Pitre	3f8e326d1a	riscv: stop preserving the tp register needlessly The tp (x4) register is neither caller nor callee saved according to the RISC-V standard calling convention. It only has to be set on thread context switching and is otherwise read-only. To protect the kernel against a possible rogue user thread, the tp is also re-set on exception entry from u-mode. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>	3 years ago
Carlo Caione	673f41e708	riscv: Introduce support for RV32E Introduce support for RV32E. Signed-off-by: Carlo Caione <ccaione@baylibre.com>	3 years ago
Nicolas Pitre	e76fb204db	riscv: report stack overflow errors correctly Add the necessary checks to determine when the stack pointer is out of bounds. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>	3 years ago
Gerard Marull-Paretas	16811660ee	arch: migrate includes to <zephyr/...> In order to bring consistency in-tree, migrate all arch code to the new prefix <zephyr/...>. Note that the conversion has been scripted, refer to zephyrproject-rtos#45388 for more details. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>	3 years ago
Keith Packard	f623571a73	riscv: Initialize TP register when starting threads Set TP in exception context so that it gets loaded into the CPU when first running the thread. Set TP for secondary cores to related idle TLS area. Signed-off-by: Keith Packard <keithp@keithp.com>	3 years ago
Nicolas Pitre	247d2c8e3b	riscv: move the tp register from caller-saved to callee-saved This is a per-thread register that gets updated only when context switching. No need to load and save it on every exception entry. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>	3 years ago
Nicolas Pitre	a50c433012	riscv: exception code mega simplification and optimization Complete revamp of the exception entry code, including syscall handling. Proper syscall frame exception trigger. Many correctness fixes, hacks removal, etc. etc. I tried to make this into several commits, but this stuff is all inter-related and a pain to split. The diffstat summary: 14 files changed, 250 insertions(+), 802 deletions(-) Binary size (before): text data bss dec hex filename 1104 0 0 1104 450 isr.S.obj 64 0 0 64 40 userspace.S.obj Binary size (after): text data bss dec hex filename 600 0 0 600 258 isr.S.obj 36 0 0 36 24 userspace.S.obj Run of samples/userspace/syscall_perf (before): * Booting Zephyr OS build zephyr-v3.0.0-325-g3748accae018 * Main Thread started; qemu_riscv32 Supervisor thread started User thread started Supervisor thread(0x80010048): 384 cycles 509 instructions User thread(0x80010140): 77312 cycles 77437 instructions Run of samples/userspace/syscall_perf (after): * Booting Zephyr OS build zephyr-v3.0.0-326-g4c877a2753b3 * Main Thread started; qemu_riscv32 Supervisor thread started User thread started Supervisor thread(0x80010048): 384 cycles 509 instructions User thread(0x80010138): 7040 cycles 7165 instructions Yes, that's more than a 10x speed-up! Signed-off-by: Nicolas Pitre <npitre@baylibre.com>	3 years ago
Jim Shu	595b01fc1d	arch: riscv: pmp: Fix 64-bit compatibility of pointer size Fix 64-bit compatibility of pointer size of RISC-V PMP/userspace code. Signed-off-by: Jim Shu <cwshu09@gmail.com>	4 years ago
Mark Holden	7803a4e590	arch: riscv: ARCH_EXCEPT macro Enable ARCH_EXCEPT macro for non-usermode scenario for RISC-V Macro will now raise an illegal instruction exception so that mepc will hold expected value in exception handler, and generated coredump can reconstruct the failing stack Coredump tests running on renode (for RISC-V) can now utilize fatal error path through k_panic Signed-off-by: Mark Holden <mholden@fb.com>	4 years ago
Jim Shu	e3fe63a221	arch: riscv: remove unneeded context switch to gp register RISC-V global pointer (GP) register is neither caller nor callee register, and it's a constant value in the single ELF file. Thus, we don't need to save/restore GP at ISR enter/exit. Remove it to optimize context switch performance. Signed-off-by: Jim Shu <cwshu@andestech.com>	4 years ago
Kumar Gala	be0a19757c	riscv: MTVAL CSR not supported on OpenISA RV32M1 Don't report MTVAL on the OpenISA RV32M1 SoC as this CSR isn't supported on the SoC. Fixes: #34014 Signed-off-by: Kumar Gala <kumar.gala@linaro.org>	4 years ago
Jim Shu	8db3683820	arch: riscv: improve exception messages Add exception descriptions of mcause id 6~15. Also print mtval CSR for memory access fault & illegal instruction exceptions. Signed-off-by: Jim Shu <cwshu@andestech.com>	4 years ago
Martin Åberg	a0a875026b	arch/riscv: semantic ESF printer Present ESF registers as columns of argument registers and temporary registers. Also print 64-bit values in full width. It now looks like this: E: mcause: 2, Illegal instruction E: a0: 00000000 t0: 12345678 E: a1: 00000000 t1: 00000000 E: a2: 00000000 t2: 00000000 E: a3: 00000000 t3: 0badc0de E: a4: 00000000 t4: 00000000 E: a5: 8000733c t5: deadbeef E: a6: 00000000 t6: 00000000 E: a7: 00000000 E: tp: 00000000 E: ra: 80000d9a gp: 00000000 E: mepc: 8000733c E: mstatus: 00001880 Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>	5 years ago
Krzysztof Chruscinski	3ed8083dc1	kernel: Cleanup logger setup in kernel files Most of kernel files where declaring os module without providing log level. Because of that default log level was used instead of CONFIG_KERNEL_LOG_LEVEL. Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>	5 years ago
Alexandre Mergnat	542a7fa25d	arch: riscv: add memory protection support The IRQ handler has had a major changes to manage syscall, reschedule and interrupt from user thread and stack guard. Add userspace support: - Use a global variable to know if the current execution is user or machine. The location of this variable is read only for all user thread and read/write for kernel thread. - Memory shared is supported. - Use dynamic allocation to optimize PMP slot usage. If the area size is a power of 2, only one PMP slot is used, else 2 are used. Add stack guard support: - Use MPRV bit to force PMP rules to machine mode execution. - IRQ stack have a locked stack guard to avoid re-write PMP configuration registers for each interruption and then win some cycle. - The IRQ stack is used as "temporary" stack at the beginning of IRQ handler to save current ESF. That avoid to trigger write fault on thread stack during store ESF which that call IRQ handler to infinity. - A stack guard is also setup for privileged stack of a user thread. Thread: - A PMP setup is specific to each thread. PMP setup are saved in each thread structure to improve reschedule performance. Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Reviewed-by: Nicolas Royer <nroyer@baylibre.com>	5 years ago
Andrew Boie	a470ba1999	kernel: remove z_fatal_print() Use LOG_ERR instead. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>	6 years ago
Nicolas Pitre	0440a815a9	riscv: make core code 64-bit compatible There are two aspects to this: CPU registers are twice as big, and the load and store instructions must use the 'd' suffix instead of the 'w' one. To abstract register differences, we simply use a ulong_t instead of u32_t given that RISC-V is either ILP32 or LP64. And the relevant lw/sw instructions are replaced by LR/SR (load/store register) that get defined as either lw/sw or ld/sd. Finally a few constants to deal with register offsets are also provided. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>	6 years ago
Nicolas Pitre	1f4b5ddd0f	riscv32: rename to riscv With the upcoming riscv64 support, it is best to use "riscv" as the subdirectory name and common symbols as riscv32 and riscv64 support code is almost identical. Then later decide whether 32-bit or 64-bit compilation is wanted. Redirects for the web documentation are also included. Then zephyrbot complained about this: " New files added that are not covered in CODEOWNERS: dts/riscv/microsemi-miv.dtsi dts/riscv/riscv32-fe310.dtsi Please add one or more entries in the CODEOWNERS file to cover those files " So I assigned them to those who created them. Feel free to readjust as necessary. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>	6 years ago
Andrew Boie	96571a8c40	kernel: rename NANO_ESF This is now called z_arch_esf_t, conforming to our naming convention. This needs to remain a typedef due to how our offset generation header mechanism works. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>	6 years ago
Andrew Boie	8a9e8e0cd7	kernel: support log system for fatal errors We introduce a new z_fatal_print() API and replace all occurrences of exception handling code to use it. This routes messages to the logging subsystem if enabled. Otherwise, messages are sent to printk(). Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>	6 years ago
Andrew Boie	5623637a48	kernel: abolish _default_esf NANO_ESF parameters may now be NULL, indicating that no exception frame is available. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>	6 years ago
Andrew Boie	71ce8ceb18	kernel: consolidate error handling code * z_NanoFatalErrorHandler() is now moved to common kernel code and renamed z_fatal_error(). Arches dump arch-specific info before calling. * z_SysFatalErrorHandler() is now moved to common kernel code and renamed k_sys_fatal_error_handler(). It is now much simpler; the default policy is simply to lock interrupts and halt the system. If an implementation of this function returns, then the currently running thread is aborted. * New arch-specific APIs introduced: - z_arch_system_halt() simply powers off or halts the system. * We now have a standard set of fatal exception reason codes, namespaced under K_ERR_* * CONFIG_SIMPLE_FATAL_ERROR_HANDLER deleted * LOG_PANIC() calls moved to k_sys_fatal_error_handler() Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>	6 years ago
Anas Nashif	9ab2a56751	cleanup: include/: move misc/printk.h to sys/printk.h move misc/printk.h to sys/printk.h and create a shim for backward-compatibility. No functional changes to the headers. A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES. Related to #16539 Signed-off-by: Anas Nashif <anas.nashif@intel.com>	6 years ago
Anas Nashif	4c32258606	style: add braces around if/while statements Per guidelines, all statements should have braces around them. We do not have a CI check for this, so a few went in unnoticed. Signed-off-by: Anas Nashif <anas.nashif@intel.com>	6 years ago
Patrik Flykt	4344e27c26	all: Update reserved function names Update reserved function names starting with one underscore, replacing them as follows: '_k_' with 'z_' '_K_' with 'Z_' '_handler_' with 'z_handl_' '_Cstart' with 'z_cstart' '_Swap' with 'z_swap' This renaming is done on both global and those static function names in kernel/include and include/. Other static function names in kernel/ are renamed by removing the leading underscore. Other function names not starting with any prefix listed above are renamed starting with a 'z_' or 'Z_' prefix. Function names starting with two or three leading underscores are not automatcally renamed since these names will collide with the variants with two or three leading underscores. Various generator scripts have also been updated as well as perf, linker and usb files. These are drivers/serial/uart_handlers.c include/linker/kobject-text.ld kernel/include/syscall_handler.h scripts/gen_kobject_list.py scripts/gen_syscall_header.py Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>	6 years ago
Marti Bolivar	ef765b28cb	arch: riscv32: follow-on tweaks A couple of follow-on patches suggested after previous RISCV32 arch changes were merged. Tweak some help in arch/riscv32/kconfig to better work with the RST docs. Take out all the CONFIG_PRINTK ifdeffery in fatal.c. The cause_str() routine should get compiled out if PRINTK=n anyway. Signed-off-by: Marti Bolivar <marti@foundries.io>	7 years ago
Marti Bolivar	f4c3163d3b	arch: riscv32: provide a general mechanism for saving SoC context RISC-V permits myriad extensions to the ISA, any of which may imply additional context that must be saved and restored on ISR entry and exit. The current in-tree example is the Pulpino core, which has extra registers used by ISA extensions for running loops that shouldn't get clobbered by an ISR. This is currently supported by including pulpino-specific definitions in the generic architecture code. This works, but it's a bit inelegant and is something of a layering violation. A more generic mechanism is required to support other RISC-V SoCs with similar requirements without cluttering the arch code too much. Provide that by extending the semantics of the existing CONFIG_RISCV_SOC_CONTEXT_SAVE option to allow other SoCs to allocate space for saving and restoring their own state, promoting the currently pulpino-specific __soc_save_context / __soc_restore_context routines to a RISC-V arch API. The cost of making this generic is two more instructions in each ISR to pass the SoC specific context to these routines in a0 rather than just assuming the stack points to the right place. This is minimal, and should have been done anyway to keep with the ABI. As a first (and currently only in-tree) customer, convert the Pulpino SoC code to this new mechanism. Signed-off-by: Marti Bolivar <marti@foundries.io>	7 years ago
Marti Bolivar	0b234f2518	arch: riscv32: fix fatal.c build without printk If CONFIG_PRINTK=n, cause_str will not be defined, and _Fault() will fail to build. Fix that by ifdeffing out the printk call in that case. Signed-off-by: Marti Bolivar <marti@foundries.io>	7 years ago
Krzysztof Chruscinski	27459a13e4	arch: Add LOG_PANIC to fault handlers Added LOG_PANIC to fault handlers to ensure that log is flush and logger processes messages in a blocking way in fault handler. Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>	7 years ago
Nathaniel Graff	970cfdb88b	arch: riscv32: Move MEPC increment in irq_wrapper Move the MEPC increment logic in __irq_wrapper such that the saved MEPC is only incremented on a syscall (ecall instruction). Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>	7 years ago
Andrew Boie	8eaff5d6d2	k_thread_abort(): assert if abort essential thread Previously, this was only done if an essential thread self-exited, and was a runtime check that generated a kernel panic. Now if any thread has k_thread_abort() called on it, and that thread is essential to the system operation, this check is made. It is now an assertion. _NANO_ERR_INVALID_TASK_EXIT checks and printouts removed since this is now an assertion. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>	8 years ago
Andrew Boie	e3550a29ff	stack_sentinel: hang system on failure Stack sentinel doesn't prevent corruption, it just notices when it happens. Any memory could be in a bad state and it's more appropriate to take the entire system down rather than just kill the thread. Fatal testcase will still work since it installs its own _SysFatalErrorHandler. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>	8 years ago
Andrew Boie	998f905445	arches: declare _SysFatalErrorHandler __weak This function is intended to be easily overridable by applications. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>	8 years ago
Andrew Boie	5dcb279df8	debug: add stack sentinel feature This places a sentinel value at the lowest 4 bytes of a stack memory region and checks it at various intervals, including when servicing interrupts or context switching. This is implemented on all arches except ARC, which supports stack bounds checking directly in hardware. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>	8 years ago
Andrew Boie	cdb94d6425	kernel: add k_panic() and k_oops() APIs Unlike assertions, these APIs are active at all times. The kernel will treat these errors in the same way as fatal CPU exceptions. Ultimately, the policy of what to do with these errors is implemented in _SysFatalErrorHandler. If the archtecture supports it, a real CPU exception can be triggered which will provide a complete register dump and PC value when the problem occurs. This will provide more helpful information than a fake exception stack frame (_default_esf) passed to the arch-specific exception handling code. Issue: ZEP-843 Change-Id: I8f136905c05bb84772e1c5ed53b8e920d24eb6fd Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>	8 years ago
Kumar Gala	cc334c7273	Convert remaining code to using newly introduced integer sized types Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99 integer types. This handles the remaining includes and kernel, plus touching up various points that we skipped because of include dependancies. We also convert the PRI printf formatters in the arch code over to normal formatters. Jira: ZEP-2051 Change-Id: Iecbb12601a3ee4ea936fd7ddea37788a645b08b0 Signed-off-by: Kumar Gala <kumar.gala@linaro.org>	8 years ago
Kumar Gala	bf53ebf2c8	arch: convert to using newly introduced integer sized types Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99 integer types. There are few places we dont convert over to the new types because of compatiability with ext/HALs or for ease of transition at this point. Fixup a few of the PRI formatters so we build with newlib. Jira: ZEP-2051 Change-Id: I7d2d3697cad04f20aaa8f6e77228f502cd9c8286 Signed-off-by: Kumar Gala <kumar.gala@linaro.org>	8 years ago
Anas Nashif	b84dc2e124	kernel: remove all remaining references to nanokernel Change-Id: I43067508898bc092879f7fe9d656ccca6fd92ab2 Signed-off-by: Anas Nashif <anas.nashif@intel.com>	8 years ago
Jean-Paul Etienne	d0a33869a5	riscv32: move riscv privileged architecture specifics within a common header file Added a riscv-privilege.h header file that contains common definitions for all riscv SOCs supporting the riscv privileged architecture specification. This shall ease addition of future riscv SOCs supporting the riscv privileged architecture spec. Change-Id: I5714bf70eeda738a25967ed26d3d0d2aaa0c9989 Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>	9 years ago
David B. Kinder	ac74d8b652	license: Replace Apache boilerplate with SPDX tag Replace the existing Apache 2.0 boilerplate header with an SPDX tag throughout the zephyr code tree. This patch was generated via a script run over the master branch. Also updated doc/porting/application.rst that had a dependency on line numbers in a literal include. Manually updated subsys/logging/sys_log.c that had a malformed header in the original file. Also cleanup several cases that already had a SPDX tag and we either got a duplicate or missed updating. Jira: ZEP-1457 Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c Signed-off-by: David B. Kinder <david.b.kinder@intel.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>	9 years ago
Jean-Paul Etienne	cd83e85edc	arch: added support for the riscv32 architecture RISC-V is an open-source instruction set architecture. Added support for the 32bit version of RISC-V to Zephyr. 1) exceptions/interrupts/faults are handled at the architecture level via the __irq_wrapper handler. Context saving/restoring of registers can be handled at both architecture and SOC levels. If SOC-specific registers need to be saved, SOC level needs to provide __soc_save_context and __soc_restore_context functions that shall be accounted by the architecture level, when corresponding config variable RISCV_SOC_CONTEXT_SAVE is set. 2) As RISC-V architecture does not provide a clear ISA specification about interrupt handling, each RISC-V SOC handles it in its own way. Hence, at the architecture level, the __irq_wrapper handler expects the following functions to be provided by the SOC level: __soc_is_irq: to check if the exception is the result of an interrupt or not. __soc_handle_irq: handle pending IRQ at SOC level (ex: clear pending IRQ in SOC-specific IRQ register) 3) Thread/task scheduling, as well as IRQ offloading are handled via the RISC-V system call ("ecall"), which is also handled via the __irq_wrapper handler. The _Swap asm function just calls "ecall" to generate an exception. 4) As there is no conventional way of handling CPU power save in RISC-V, the default nano_cpu_idle and nano_cpu_atomic_idle functions just unlock interrupts and return to the caller, without issuing any CPU power saving instruction. Nonetheless, to allow SOC-level to implement proper CPU power save, nano_cpu_idle and nano_cpu_atomic_idle functions are defined as __weak at the architecture level. Change-Id: I980a161d0009f3f404ad22b226a6229fbb492389 Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>	9 years ago

23 Commits (8dc3f856229ce083c956aa301c31a23e65bd8cd8)