6249470b66
intel_adsp: ace30: mm: Set write permissions during memory mapping
...
The adsp_mm_save_context function was previously mapping memory without
explicitly setting write permissions, which could lead to a "store
prohibited" exception when attempting to write to the memory. This patch
adds the K_MEM_PERM_RW flag to the arch_mem_map call to ensure that the
memory is mapped with write permissions.
This change resolves the issue of accessing memory without the necessary
permissions, preventing potential exceptions and ensuring correct memory
operations. The issue was found when running the firmware on a
simulation with the MMU enabled.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
4 months ago
99e9cdce67
mm: tlb: Fix mmu support in update page flags function
...
Revise the sys_mm_drv_update_page_flags function to pass a cacheable
virtual address as the second parameter to the arch_mem_map function.
This approach aligns with the implementation of the sys_mm_drv_map_page
function.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
5 months ago
903b7cf9b6
mm: tlb: Add a mmu support in update page flags function
...
Platforms that support mmu require memory page access flags to be set in
both tlb and mmu. Add mmu flag update in sys_mm_drv_update_page_flags
function.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
8 months ago
e4a9503706
mm: tlb: Improve the context saving function
...
Attempt to invalidate cache for an unmapped address results in cpu
exception for the ptl platform. Perform cache invalidation after
translation activation in tlb. Add address mapping in mmu for platforms
that have it.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
8 months ago
750212c2a9
mm: tlb: Remove ARG_UNUSED macro invocation
...
The flags parameter in the sys_mm_drv_map_page function is used, so the
ARG_UNUSED macro invocation is unnecessary. Remove this macro usage to
clean up the code and improvs code readability and maintainability.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
8 months ago
256ab0c919
ace: mm: tlb: Check tlb translation enabled before flushing cache
...
Before unmapping a memory page, the cache is flushed. If the given memory
page is not mapped, this operation ends with a cpu exception on the
ptl platform. Add check if tlb translation is active before flushing.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
9 months ago
0e9b9b0cf3
ace: mm: tlb: Ignore unmappig error in driver initalization
...
The sys_mm_drv_unmap_region_initial function is responsible for unmapping
all unused virtual memory during tlb driver initialization. Most addresses
will not have a mapped page. Ignore the error code indicating unmapped
memory that will occur when trying to unmap.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
9 months ago
531bbbdf65
Revert "ace: mm: tlb: Check tlb translation enabled before flushing cache"
...
This reverts commit 311ddf90e2
10 months ago
311ddf90e2
ace: mm: tlb: Check tlb translation enabled before flushing cache
...
Before unmapping a memory page, the cache is flushed. If the given memory
page is not mapped, this operation ends with a cpu exception on the
ptl platform. Add check if tlb translation is active before flushing.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
10 months ago
74b53df064
drivers: mm/intel_adsp: Add MMU support to MM driver
...
In the Intel platforms most of HPSRAM is used by modules when
are required. By default all these banks are powered off and are
enabled by L2 MM driver only when needed.
At the driver initialisation each unused page is unmaped and
when whole HPSRAM bank is unused the power is switched off.
Since mapping memory in MMU TLB and flushing it at system start is
not needed and time consuming, this patch modifies the init
sequence to avoid it.
Additionally it adds MMU maping and unmaping for pages allocated
from unused pool.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
1 year ago
8dc3f85622
hwmv2: Introduce Hardware model version 2 and convert devices
...
This is a squash of the ``collab-hwm`` branch which converts all
in-tree boards to hardware model version 2 including build system
changes, board updates and soc conversions.
This squash is a combination of the following commits:
ca214745a1 soc: Remove soc_legacy folder and move ARM Kconfig
f12cb0979f1807bcf4d43ec2299c628ea02f4e63f2eb7652ceab509a5ee006ad037f993f9e706859204372d264f82c961a466987b2e30584484e6707ae443d1e3ce3629c64e6fc835d893d29ef2f23ebfd49b1749e1e59b7a3fd69bb0eb2581c4458890f651a4370ad196cfda66d6ec6b1d75ab774cdd59f7aa36e6640fe25709a9cf88f211b4eb21a455dfbfdc76c48a714ecafc67ddbc366c3c78e02c08f96b1b85e249558cc4013b366ce5c0b09bb472432542e816a8a3a9aeab17139a4fe97b9de615fcab94a7752f69b7f3eba827956914362bbd5a62278fd23b6a11ccec4c1067c16d2b8340b01099d81e417bec296672720fada12aa9dfe37ebac1ed32828fe6a5afba7855bca48c17723db1fd4d229a78b2552ebcc96061d96ed854e05d14fa1ae81105543040a182335ae79b3f910b7ad4f32104db555e23a41200d3c670e4e53fc7c6a060b22c2edb89c0a96dcb778be1ee1c4465e6c62137f037a3b52a47277cae6fada3e49d34ebc8424dd3b041cb52939576b43a95ce8f3e6494d550399e92708708c909e06dac41e68dd8f842b40b4d1c04978067c69089e097205b40ad8cfa6fb29c29ed228c688cfd3d6acad30c940ee9e5a10ec805650c8326882cf44be451a9c405a6ff2b536d2535ee6058710b76687602f32ae4918d0cc1dabca65a37ddce659a1393a07f6813ed00f6771317d67988cb0c51ec62b9db15c690101216ce14b4c3ca65dcdc3ef499fcabdd4ad054b5bd7ae8aa992785ceb3c1cdc20fe291c7cde2b95db8975260a47b948799f9f221c24e7869ca38abf2fb5eca3e25730ba569e3466606a09a398dcc8cb8ffc74f82291ff4b55484b7f1996cc5c2fb0c759cb580513aa9e0de7afa1480cf1cf0d719e004beb5c3e6f79a34a3640b7cf50e950e7737cfb548f505494c97a4eaf69f37aa1335caeaea9f7f30bf680db4c81b3433d7e99764ea79d19e7fd4ae6f6a836080549bd169bf8ae1d25f04d522211c2af0de8d5128f401644fbc68cadf7fe431b449094fea63bb632acc1fc1a3316ebdc71c0344f8cf0176fc25f36b920ed0f22520368d9296acfb2bc55063380b71f93394b55e7a4fd2ec101942f1d11477c8b84dd64e3e816c43a7aa2fa4984e1c17ad9a90f53ad57af9aa6529950f0bf05a3a10b614aa45abe735e939ab8f64ca9483ff8dd4df113dd534239b31287d91511e356a2c91e25ab471c231fd939417cff1e6028d4e41b1b2b520f83cbbf7899c64533f7b618668f20ea6e937cf4ff43a1c68e1fea4e3b49014a0f14f344eeab40f3f8f22d10bf79ea518727d5ca80c81ef015635836c1b699338f6f2bf19639a1b5dc981807444e5d07e824852fd081ac8666d425f5715bd38f47a900c6ef25be0c639b8378c2ef907d1d553de2ebc9b8ec0080c2eb7025e50f10ef3d4bd2ba9fdaa1d686c8d4a0ca575ac5cafb87b290730414b30055ab0012bfc15df526225ead19e7df29df0bd7d963d6795a90f9bf43d5540be7065148d8561dc9a8aa17763571e878dae301b8a319e60eef36a0a7c30f28df9a4223feed401abafffc78e5eaa44e586958fff4c31a2b865b2ffc652b5db061a4c66547845e9d95a1f96399e563eb0a628914bc58b67e8de1e781bfcc2ed18f330fc38f9fb9e06f4c384b90b30b9d0f6842e2fab2af1e1737686a4b78b8396b6bb856765299c6277efd46eb41505cbc5c42951a140701a795d28810f9a957e6f6df994e7ee88dfabd56ca447b951593bad5dfa71fad2e863f393f08e714b26734597a762908af0bccd1ceb29fca4768ccaf70ebdb0879adae82580d08c5f0defbae1e46cabce6f2f85133f286642f4e78c61e807896ca46c8abc9fbfed5f48f8cd8b1cc476f6cc57a04c4c14a54ca06c2054e5cff0e0fce1b334264c46a8b947a0e91990417bbdee12719154a437a430fbef93387f9681cf2498b1347abe812561e33786dc47f081914dbbc97349dbda9902ff58e126e1a4e72899f0257c3790c10b1eefaee62088dc34d186a571be3a9e9d360e6b400f9c4fbac27e8b4dd29a9c4380f5fdb2b9de981be056394e8a34804dbf17e19c9731f1bce53d41869d146c4f01427d285e19cf22bebd7298caf243274c2105a2bae84dca54e000afc314e8e3f9a7c2ce6d51ac56d0501c054381a7a4d93b8d9fdab2fcb1245ead4b57a7bd4c143d30670a66ac03a8a85c077998c253a99fcab883b80197c8b7a153b8dc2b911f6402366117af0a8d127452271f17a86841c2a9d993b314531abd4ea2bf70b5256e9fcc318e5cf1d51eab8628f981532f2fee1430ca6a475a9b9b41b91db0271ecbb957e2b20615a90a44454a20c113fbd34e3852a5420ad604de62e2a7b7656f7dcc2eb5eb58e90a2e9aae6e9e4541d3baac2d63b1d21483f6046e6ded90a7bf9fd79dce697c823666a35340989f0a6034b004bd43c48a6d756923d3801216b8db7cc30aaea866427ea292689b3f0eee7ebc727c8903265b2bb529a78ed5197cf636ae06d0c53f3a144e0aa066885238fc205dffc08af56545093abe4ecfa192f1bfd1e8cdc308bf067e6254833275ccdb9a70e5ea218c70cc4bfca52baf9ded1b3bcce64f362a8ae2c51dee5da92e66c35e0d0d1491a4810fa0fca79c4acd18bfaf7546c94b9588aab718c3e30f17424a435a97cb524fdc20fdff622dc2b63912f1e33a2e6c47c37d3db7a788b9a187046b92d41253ee9638cccb4c633242d4acf9230a60d28969a0409e51d3f1b2528df1baf1096e7ca0b1db9c53de9874671e2ba6c01407133ad4a51ca9812f3d54ec76b1fbeca649789e4336b3bdb736493dda5ee4be48e1f5d5bf11cf73df1ac73ed6dcd0fdbe3552e854cff3905a87ea5bc0a706e5d27cdd1edcdd0880f7add89cab6edad8d68c58e0822a6b987093a802096fd4652830f9c5a82527cd9d8cd83af7d0c1cfd9b84d4573c72fe863c37dfacbf9e1108d7b0edbed44a5c2840448c5a9f31273692c035b5d33ef03b84b9910ada00d0e7b9fb2103f89e1f9a533fbc3f92f65b287646b74aaffea54ddcd9d47f1878b1ae42be236b83bd1a9ecc39c26f09ed29d03c970b74acec315cfee6d8676e008b5d939224e357d6232c5f9dcce04da061646f15956a69b880324f77079893e0d11146f92b227bed5d1bb4cd325f95ec20d055676307c7a415d92cd15144f582a63ff71bcbb53c6f412c83eb4fc069715685b19f5b9ef9410612b297707acdcea932bc0a3ae2b22320b4ce17d547c65400d659ec56f9e6dc5977dbbaa6e492854399f248e04815f16834e6c1ee449ef1db4deddf9d2fd3ed43d2902fceb173d716ca1a10b7abc8942869b334f54b614611a5285821b9ec2e04cbad174e24ca0febfc9a32559a2dc4b11e025197edd05be39cf624c410b40bf25e5e71600d7e952bd84a1bc59dc342143b10392d693db2def8ed3abf7d3efe78c579770e1d91315401092efcefc089d9b295a85ba2f56bdcd500314155dfb08819dff756456c16e591f9198dc496f1bafbf9b290f25baa9fbe6bf19144bcfe57c74c86af7eaeb4f852f738bac9789264a954e1722d7e8515b24125246c21ef09396eb2e670c004fd83e3daa98e79a2de60c6dae877ce9cec2b50218c234a65f55916cc6e6be01fa83730326888e5959f1795e06e8663d517d3cc2468f9aeddabccf4f48f014a6e286a3b12e375f826b4db917de9d6e0d27efebc16a7a72728348838439c68231ba9986e9619fde82932e787cb9339f88f1cd4c3465492eadf06b8a8659e170b359133d7256d466429eda1ff441eb3ef82a8255c282204758a8ca93411958a947f446d324cb41153963c74df1c8d518ce5040fef0cef5be52ccc244fc7426eca5e1eba9d8a8f8d92edc72775117d1b2d0b0384b56ac1b77b223d91a077b2ab413b6c2a404f572ba24fcb348c7edf811ad90566d44ef90cf8c860f205defba98a17635c156a2d35cfc47a3a4b37129b4e44a923beba5dd242b2703b9c80d4e64428268c493833ad2b5bc640daa94f2d2b0dbb9d51ee6f7697ac594e4bad6ba5803ba099db8c27545630177cf53d486504cf24dd0672a64cc1565b3d146dd2723314ee1ce24a421952d559f29e12c3d8bd0ffbc1da33be52dfb7b64c29d1827f5b4a9556fd69e5d87a155e4ace1bbe2762460a64fdc3913e769c9c3a09a1109edc296f7bfcdbbe8f0fbb543983073e0f8080197a19f3961616fc8ae55622077738a6289516e4439d83688316e65f09c4862efd5a21dede0f6cd391e864ea2947ec3e416b52f797a227433db339f9a646d3f2d5d0d434bf86c3f5ed8157eecff8ee7a34507614f6f02b56cb96600c55c92af294bfc5e4882524d2a04bce0e9b39d0229c771f23a0570e64b6d3e1764f499f3e79029ae6b1804dfe2c90da5c3d4d46698cb1afbf01589f9897c872f7fb2030c7718643266232c4bdc0c47b64c638a8156ee8ad8a3d33dadeb04fee7371d2ad37a0c222cf85b7169f44b67ac4307dbb65d3715e79cb957d12bd83a2181a135ec3524dbe97e5ead632b90043cc1a30f24bdf0df9000bd2c7972a9a202c2bf447c3e36f2042b9dd58aea10e1898b093286f4a7524d1709cdb378f040cff2c8c90fae8e0c828dcc60ec79f1b0d943584b30fc194024d940e8053c3a8dfd5473b76fef5792b05e7ff202daa8ee66cbc294533b47b2edbbaeebd31d273b257a3f985de0888ec867960a8916ca677ed3abcf4ad19d40ac386683f9242c3c78f248d17f1600a67265e99f8d44317ee400343d17ed783ef549a643aeac552e601d643442f7a387b32519752efcd06263dd71766b0df5526fa07bd94198f6f0726dd7b155a7031804697afa5d2f001e320ec7f7b3c3089dfcddc7eeb724eb6a76f1043cde6cab924cbfb237fdff91803042b7704767b94414e07fa3a3d79ba01d3beca7ce84f4041b988bae5766fbf39c7264a418784421e79ba15f6ffdcb60185d6acb08d3e90e592ffd1eb8a7e3441ada469f2370342433187c10248d96421ddc5e6a65500f3ef21e7baf09ede5bae4a64803b0bd70c8cd52eab9e836f2835cb11ca36d331d2662cc4e09bdd9bc29769353da23ffbacc932b424cea9b140fd52e025943a1c7347686a9debd98799adab07c42f642aacdcdf48637066d3e983bc2a2361e0f32716a1688ff64135fb22859910e5d1122bc319cb19f011725ccac1400f7f6a4f8d8486139085b9eee7e8dafbd638e43ecd12f4155db2390e9d9ba8195cdc8e94b85361c970127fc2394c75373cf2a1cc871428f3f25945c3e480f740fd5847123f76ba9a0587719baa88505060a61ae199584be1c52dc8933942a5b004663b77c2c333e5c14ff98650bcdc268ccf0c8ba92e1fb54fe330772ba3639b2adbc5ed79f5ce6d493aa3a28086a9ca1b2a511d06ce281f09abcdb5364fd7768f173dcb21bbbbd9cbbab426569358f8fe82ba37e9084070d467e7053a5f2808d7ccbbb73e7550e9094afc4da1712cdd535be404b365baaa697ab269ecab3c902a572e3fb0ecfbf42757e0191d03bb4454648976f0ad6ee6b81f5e228ec8834bdb615e8f27fa8de2f8633a903807e0bd2c0724d7f625dc157a8cde534ec99c31b0a21546140a43f01ab6de60c16bcb8b2db228d73073fc26225c6b62d90114fa845af3095c8c3c3be03c02db12907eeb723cb74f9461d068a821de8532ba580c7236eb272ddf1958ed121c3ab0d70959d3b1088baadc18d867b0a9ee6ede7119b48e70ead914d2b955da9c4ac6a20214b57f56d7f3b173be1805b50f6691a188e01a1222c53e97b553f3b181b09f19a2075ab8928b1628cda3a7486870d704bd204789e1068e384307e3dced025df674994b6e173173b30a04cf83b133c207847a12f1e467f4c8d2a15326b5bfc0cfd5e691b4ac9c235741f198c3a761e438e6cad495e34da7c1313717df76392c3969ed8f245d764d8f71bb7b4fe27d23aad080823b860e72e4483decbed94669e3c01af5a7b81e563b4ca376e484adae34412f7fe29be50e2ca9bbbed12c2f4f5ec7ff8fd8d1b9f20030bd34b31ec20d0dcbb602ed6af4631b175003a4de231b911daa9597f6d99644828c8186ab2bd430d88d3ddcc40ccc0204e1dd9972d782a2c2e1406d2d9c62e118e8ba99dc599a939166049c4d94844dfeaf4ffba187f08271214526be24a5cd921d2b97b3c04051fca73a9e75338d87bcc16719335857856f9fe5429d9dc78e402535113e8923b276aee9a4795f8d611b2d82646443959786f12d81670db2e98980430aadac020f66e05140e4551a77d640e0c90131e1c15936b63787a7ae02fc5047f38f7bb223d3cca3580e6a8a0c1647faf22185cee94762ecdc9afcc27e053e4a17018f9188fdcd78fcaa41cb5ddbc413f7f76be3d4bc80f4442fa698ec5fbd67f7d3ef220460a223f284b5c381edcb7397401c7d2ae7a3243a24bec82c690d94f6f9b636209235ab6ee5b18859074c750818f98d3896caa442cff42c42c2df4ca9cb3970f90f713a70ee9ccd3cda715faedc56a543f387147f88c465f5dc5b8c7db2b6efd885dddac5a26ae5c4e7fdef834a12d03ab7830625a0c2ca049127ff3654b76e02f43c0a1bfcf1d9746e621ee43f219b14976891c52b0d39f0e0a973f66f592b64c94bcb4b2ac8fdc7ed6eb0770376250da6d8b92e86a5f8e5daa15ee799cc5f8aa8ce4ac84e203c14c7312265ee04c12ae3bcbcc5321c1dbebcc06c60aedb9e46010ca988adee7d7dc2c9db0cc506675b7c3abb7920734f52bc646ea712b5005bbaa55141a11f026f70ebbd854a3af8c9edefa8fd61bbfb5ba2a4d1980c35
1 year ago
9cf3e08429
mm: tlb: mtl: Fix memory page unmapping
...
The sys_mm_drv_unmap_page function first replaced the tlb entry with
the default one and then read the physical address that was mapped.
However, it was already overwritten, so it always release the default
physical address instead of the truly mapped one.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
1 year ago
46f3d78983
mm: tlb: mtl: Add support for changing mapped region flags
...
Added sys_mm_drv_update_page_flags function that allows to change access
flags to a already mapped memory region.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
1 year ago
d7678f1694
xtensa: move to use system cache API support for coherency
...
Remove custom implementation and use system cache interface instead.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
1 year ago
9a6e32f87c
mm: rename struct mem_drv_bank to sys_mm_drv_bank
...
Simply to put them into correct namespace as the struct is
part of public API.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2 years ago
ca1aae6183
mm: intel_adsp_mtl_tlb: move SRAM_BANK_PAGE_NUM in driver
...
The macro SRAM_BANK_PAGE_NUM is specfic to the mtl_tlb
driver and is not universal. So move that from public
header into the driver.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2 years ago
baea37aeb4
kernel: Re-factor sys_mem_blocks definition
...
Rearranges the sys_mem_blocks fields so that information that describes
how much of the memory block is used is co-located. This will allow
easier of its statistics into the object core statistics reporting
framework.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2 years ago
b4998c357e
mm_drv: tlb: Fix compile time warning
...
This fixes the following compile time warning;
drivers/mm/mm_drv_intel_adsp_mtl_tlb.c: In function 'sys_mm_drv_mm_init':
include/zephyr/sys/__assert.h:44:52: error: format '%p' expects argument
of type 'void *', but argument 2 has type
'long unsigned int' [-Werror=format=]
__ASSERT_PRINT("\t" fmt "\n", ##__VA_ARGS__)
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2 years ago
0bf467bbcd
mm_drv: tlb: Fix context save for remapped pages
...
In case of remapped reference counter for physical page
is differ to zero, but TLB entry for virtual address equal to
physical address will be disabled. Valid entry will be somewhere
in virtual space where particular physical page is remapped.
Since in adsp_mm_save_context() routine we go through physical
memory range, we need to include these pages in context save loop.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2 years ago
225e8c09ac
mm_drv: tlb: Fix driver tests
...
Previous fix https://github.com/zephyrproject-rtos/zephyr/pull/58891
introduced failure in driver tests suite. This patch corrects the error
and reverts max_mapped_page field definition.
Adds max_mapped_pages stats reset after unmaping of unused memory.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2 years ago
faadbc42ee
mm_drv: tlb: Fix mapped page in bank calculation
...
The initial implementation was broken during improvements.
There was incorrect assumption that all pages are unmapped at
initials state. In reality at the beginning whole memory is
powered on, so we should mark all pages as mapped. Later in
initialization code unused pages are unmapped and if after this
some banks become empty (all pages unmapped), the power is
switched off.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2 years ago
6388f5f106
xtensa: use sys_cache API instead of custom interfaces
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Use sys_cache instead of custom and internal APIs.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2 years ago
e195739565
intel_adsp: move utils to a new header
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Move utility code into a new header and cleanup soc.h
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2 years ago
0ebe14beb4
sys: util: migrate all files to DIV_ROUND_UP
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ceiling_fraction is deprecated, use DIV_ROUND_UP.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2 years ago
5760523091
drivers: mm: Use mm_drv_bank module
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Updates the meteor-lake TLB MM driver to use the memory bank module
to track page usage statistics.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2 years ago
44222b7dfc
mtl: bugfix: tlb driver should allow remapping all unused pages
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UNUSED_L2_START_ALIGNED is a marker of first page not used by the
linker. Starting from this page, the memory may be re-mapped.
assertion <= is banning remapping of the first unused page
changing to <
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
2 years ago
422250d3b1
mm: intel_adsp_mtl_tlb: suppress sparse address space warnings
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There are various call to z_soc_cached_ptr() which returns values
in the cached address space and are stored in temporary variables
that are not marked as in the cached address space. This results
in sparse complaining about discarding the cached address space
attribute. These temporary variables are then passed to other
internal memory management related functions which do not have
the concept of cached address space (as it is currently Xtensa
specific). Because of this, we cannot change the signature of
these functions. Instead, we force a change of address space
when those temporary variables are being assigned to suppress
sparse warnings.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
3 years ago
0e17395bbf
mtl: drv: mm: tlb: Add reporting of memory usage to PMC
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The number of HPSRAM memory blocks in use is reported to the
PMC via the sideband channel supported by the communication widget.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
3 years ago
72f626046d
memory manager: add region calculation for virtual memory
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Add region calculations and implementation of
sys_mm_drv_query_memory_regions to pass calculated regions down
the line.
Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
3 years ago
9531f96627
memory manager: refactor
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Separate definitions from function code by creating header file for statics
managment.
Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
3 years ago
9c55195235
drivers/mm: Only remap unused RAM on Kconfig on Intel ADSP MTL
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Remapping by default can confuse things that dynamically manage RAM,
such as newlib heap - since unused memory will be powered off by
default. So this patch shields this behaviour behind a non-default
Kconfig.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
3 years ago
4796ffee7a
drivers: mm: Move mm_drv_intel_adsp_mtl_tlb to zephyr/
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This file was mistakenly placed in include/ instead of include/zephyr.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
3 years ago
84c09433b5
mtl: soc: TLB driver provides required size of L3 storage buffer
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TLB driver knows the required number of bytes for HPSRAM
storage during power off state.
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
3 years ago
3ee8bf7053
mtl: soc: add TLB driver context save to platform PowerManagement
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Connect the TLB context save to MTL suspend power flow
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
3 years ago
540f6d1dc5
mtl: drivers: tlb driver cleanup
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a small cleanup in the code, preaparation for memory context save
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
3 years ago
b052143077
memory manager: Add runtime memory discovery
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Add runtime physical memory discovery. This allows platforms with
different physical memory sizes to use the same driver for memory
management.
Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
3 years ago
6c3277eada
intel_adsp: ace: rename namespace: MTL -> ACE
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MTL is just one platform and this code is going to be used in multiple
platforms currently under development, so reduce the confusion and move
to a common namespace.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
3 years ago
0869e62539
intel_adsp: cleanup ace_v1x-regs.h more and prep for removal
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File still not being removed due to out-of-tree usage. We will drop it
once the external code has stopped referencing it.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
3 years ago
45465708f0
soc: intel_adsp: Add ACE soc series
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ACE15_MTPM is one SOC from the ACE series. Organize
it following cavs pattern.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
3 years ago
67a6837efd
drivers/mm: Remove redundant ifdef for MTL ADSP TBL implementation
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An `ifdef CONFIG_SOC_SERIES_INTEL_ACE1X` currently always evaluates to
true, as `drivers/mm/mm_drv_intel_adsp_mtl_tlb.c` is only built when
`CONFIG_MM_DRV_INTEL_ADSP_MTL_TLB=y`, which depends on
`CONFIG_SOC_SERIES_INTEL_ACE1X`. So remove the ifdef.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
3 years ago
03a947850d
drivers/mm: Get some bit configurations from DTS instead of SoC version
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Migrate information to DTS and get it from there on the code. Note that
for CAVS 15, the information is not migrated as there's no DTS entry for
it. It can be brought back (in the DTS) if TLB support is enabled for
it.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
3 years ago
fab8d25fd3
drivers: mm: Add dts binding specific for ADSP Meteor Lake TLB
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Add a specific compatiable and binding for intel,adsp-mtl-tlb.
Signed-off-by: Kumar Gala <galak@kernel.org>
3 years ago
af3d5331a1
intel-adsp: migrate cavs-mem.h to adsp_memory.h
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Move header and make it soc specific.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
3 years ago
fe5ed68356
soc: ace_v1x: check physical memory bounds on page unmap.
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This patch fix issue with unmapping of virtual addresses mapped
to non-existing physical memory. MTL TLB table is initialised with
1:1 mapping, however virtual space is much wider than available
physical space. We should not try to free and manage of power for
non-existing physical pages.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
3 years ago
afb156a1eb
soc: ace_v1x: unmap entire unused virtual space
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This patch corrects the initial unmapping of unused l2 memory
to unmap until the end of virtual address space instead
of unmapping until the end of l2 physical memory.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
3 years ago
8b598539f2
soc: ace_v1x: correct the move_region behavior
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This patch introduces sys_mm_drv_move_region implementation
which stops usage of the sys_mm_drv_simple_move_region.
The sys_mm_drv_simple_move_region is unsuitable becuase
it iterates through physical pages in linear fashion.
The new implementation queries the tlb for each virtual
page of the requested region to find the physical page
to be remapped.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
3 years ago
3ccafb1af3
intel_adsp: meteorlake: add memory driver
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Add TLB driver specific for Meteorlake.
Add missing kconfig resource and fix include path
add hpsram power up and ref counter
Use memblock to track physical page usage in mtl tlb driver. The
applications that will be using the tlb memory driver should not
track the physical page mapping to virtual address space:
- adds an option to use the phys argument value of 0 to tell the
driver to autonomously assign physical pages upon map request
- makes the tlb driver use memblock to track mapped physical pages
Co-authored-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Co-authored-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Co-authored-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Co-authored-by: Michal Wasko <michal.wasko@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
3 years ago
Tomasz Leman
Adrian Warecki
Guennadi Liakhovetski
Jaroslaw Stelter
Torsten Rasmussen
Anas Nashif
Daniel Leung
Peter Mitsis
Daniel Baluta
Gerard Marull-Paretas
Marcin Szkudlinski
Jakub Dabek
Ederson de Souza
Carles Cufi
Flavio Ceolin
Kumar Gala