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${ item.name }
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18 Commits (backport-86218-to-v4.1-branch)
| Author | SHA1 | Message | Date |
|---|---|---|---|
Flavio Ceolin
|
5ca3bc92c8 |
intel_adsp: power: SoC restores the clock
The SoC restores the clock only when leaving soft-off only. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com> |
1 year ago |
Guennadi Liakhovetski
|
315ee38b95 |
ADSP: don't use timer interrupts on secondary cores
When running SOF on Intel ADSP we choose to only serve the timer interrupt on the primary core. Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com> |
1 year ago |
Torsten Rasmussen
|
8dc3f85622 |
hwmv2: Introduce Hardware model version 2 and convert devices
This is a squash of the ``collab-hwm`` branch which converts all in-tree boards to hardware model version 2 including build system changes, board updates and soc conversions. This squash is a combination of the following commits: ca214745a1 soc: Remove soc_legacy folder and move ARM Kconfig |
1 year ago |
Gerard Marull-Paretas
|
12b2ee54e3 |
drivers: timer: s/device.h/init.h
Timer "drivers" do not use the device model infrastructure, they are singletons with a SYS_INIT call. This means they do not have to include device.h but init.h. Things worked because device.h includes init.h. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com> |
2 years ago |
Andrey Borisovich
|
7595cafb02 |
intel_adsp: timer: implemented sys_clock_idle_exit function
Generic header for system clock allows to define a sys_clock_idle_exit function for the clock implementation. Implemented the function in the intel_adsp_timer to reinitialize device driver after the idle exit state. Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com> |
2 years ago |
Gerard Marull-Paretas
|
a5fd0d184a |
init: remove the need for a dummy device pointer in SYS_INIT functions
The init infrastructure, found in `init.h`, is currently used by:
- `SYS_INIT`: to call functions before `main`
- `DEVICE_*`: to initialize devices
They are all sorted according to an initialization level + a priority.
`SYS_INIT` calls are really orthogonal to devices, however, the required
function signature requires a `const struct device *dev` as a first
argument. The only reason for that is because the same init machinery is
used by devices, so we have something like:
```c
struct init_entry {
int (*init)(const struct device *dev);
/* only set by DEVICE_*, otherwise NULL */
const struct device *dev;
}
```
As a result, we end up with such weird/ugly pattern:
```c
static int my_init(const struct device *dev)
{
/* always NULL! add ARG_UNUSED to avoid compiler warning */
ARG_UNUSED(dev);
...
}
```
This is really a result of poor internals isolation. This patch proposes
a to make init entries more flexible so that they can accept sytem
initialization calls like this:
```c
static int my_init(void)
{
...
}
```
This is achieved using a union:
```c
union init_function {
/* for SYS_INIT, used when init_entry.dev == NULL */
int (*sys)(void);
/* for DEVICE*, used when init_entry.dev != NULL */
int (*dev)(const struct device *dev);
};
struct init_entry {
/* stores init function (either for SYS_INIT or DEVICE*)
union init_function init_fn;
/* stores device pointer for DEVICE*, NULL for SYS_INIT. Allows
* to know which union entry to call.
*/
const struct device *dev;
}
```
This solution **does not increase ROM usage**, and allows to offer clean
public APIs for both SYS_INIT and DEVICE*. Note that however, init
machinery keeps a coupling with devices.
**NOTE**: This is a breaking change! All `SYS_INIT` functions will need
to be converted to the new signature. See the script offered in the
following commit.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
init: convert SYS_INIT functions to the new signature
Conversion scripted using scripts/utils/migrate_sys_init.py.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
manifest: update projects for SYS_INIT changes
Update modules with updated SYS_INIT calls:
- hal_ti
- lvgl
- sof
- TraceRecorderSource
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
tests: devicetree: devices: adjust test
Adjust test according to the recently introduced SYS_INIT
infrastructure.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
tests: kernel: threads: adjust SYS_INIT call
Adjust to the new signature: int (*init_fn)(void);
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
|
2 years ago |
|
Gerard Marull-Paretas
|
178bdc4afc |
include: add missing zephyr/irq.h include
Change automated searching for files using "IRQ_CONNECT()" API not including <zephyr/irq.h>. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no> |
3 years ago |
Anas Nashif
|
ede94516b0 |
drivers: intc_dw_ace: rename file
No need for the version in the file name, this will be used by multiple versions of ACE. Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
3 years ago |
|
Anas Nashif
|
0869e62539 |
intel_adsp: cleanup ace_v1x-regs.h more and prep for removal
File still not being removed due to out-of-tree usage. We will drop it once the external code has stopped referencing it. Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
3 years ago |
|
Anas Nashif
|
52297422fc |
timer: intel_adsp: use DTS for hardware information
Convert timer driver to use a light weight syscon and DTS and convert register information to use offsets and sys_read/sys_write instead of structs. Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
3 years ago |
|
Anas Nashif
|
059dc41cc6 |
intel_adsp: put interrupt defines in own headers/cleanup namespace
Cleanup soc.h and move interrupt defines into own headers. Rename some of the defines for ACE to have a unified namespace. Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
3 years ago |
|
Anas Nashif
|
100090832d |
drivers: intc: ace: use DW structure already defined in the driver
The DW register block was duplicated into the ACE header while we had the same thing in the driver. Move everything to the driver as the first step with further improvements planned on top of this. Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
3 years ago |
Peter Mitsis
|
d308ca5695 |
drivers: timer: adsp: Improve elapsed ticks calculations
It is better to use 64-bit variable types for calculating the number of elapsed ticks than 32-bit variable types. This guards against the propagation of calculation errors should the lower 32-bits of the timer counter roll over multiple times before the timer ISR is serviced. (Such a scenario can easily occur when pausing the system for an extended period of time with a debugging device such as a Lauterbach.) Signed-off-by: Peter Mitsis <peter.mitsis@intel.com> |
3 years ago |
|
Flavio Ceolin
|
45465708f0 |
soc: intel_adsp: Add ACE soc series
ACE15_MTPM is one SOC from the ACE series. Organize it following cavs pattern. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com> |
3 years ago |
|
Anas Nashif
|
728d8eb2c0 |
intel_adsp: rename clock registers due to possible conflict
SOF using the same defines and in some cases generating conflicts. Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
3 years ago |
|
Anas Nashif
|
2af59e7d44 |
intel_adsp: unify timer registers and simplify timer driver
Declare clock control in the shim header per SoC and remove ifdeffry from the driver simplifiying it and making it ready for the next platform. Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
3 years ago |
|
Anas Nashif
|
423264b96b |
intel_adsp: make shim header soc specific
using once single header to support multiple socs and product generations is error prone and not easily maintained. Over time we have been adding conditional code in headers and extending structs to support new HW features which becomes a problem. Goal is to keep platform headers in sync with hardware specification and allow of introduction of new platforms and hardware features by just introducing a new SoC with its own set of headers. This is now just a copy of existing cavs-shim.h with slight changes, goal is to clean this up long term and sync with hardware datasheets and align on naming as well. Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
3 years ago |
|
Flavio Ceolin
|
e4a3e2d8b6 |
intel_adsp: Unify cavs and ace timers
These two timers were sharing pretty much the same code. Actually mtl timer was a "superset" of cavs timer. Just merge them into a single one called intel audio dsp timer (intel_adsp_timer). Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com> |
3 years ago |
|
Anas Nashif
|
17a0f81bfc |
intel_adsp: meteorlike: add timer driver
Add timer driver based on CAVS driver and adapted for Meteor Lake. Co-authored-by: Michal Wasko <michal.wasko@intel.com> Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
3 years ago |
|
Anas Nashif
|
ab24be5552 |
drivers: timer: provide timer irq to tests
As with previous commit, make the timer irq a simple integer variable exported by the timer driver for the benefit of this one test (tests/kernel/context). Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
3 years ago |
Andy Ross
|
fb3b434438 |
drivers: timer: update TIMER_IRQ for tests/kernel/context
This test has gotten out of control. It has a giant #if cascade enumerating every timer driver in the Zephyr tree and extracting its interrupt number. Which means that every driver needs to somehow expose that interrupt in its platform headers or some other API. Make it a simple integer variable exported by the timer driver for the benefit of this one test. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
3 years ago |
|
Gerard Marull-Paretas
|
fb60aab245 |
drivers: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all drivers to the new prefix <zephyr/...>. Note that the conversion has been scripted, refer to #45388 for more details. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no> |
3 years ago |
|
Andy Ross
|
e4a455b25d |
drivers/cavs_timer: Cleanup & simplification pass
General refactoring to clean up and futureproof this driver. Remove false dependency on CONFIG_CAVS_ICTL. This requires the CAVS interrupt mask API, but doesn't touch the interrupt controller driver. Remove a racy check for simultaneous interrupts. This seems to have been well intentioned, but it's needless: the spinlock around the last_count computation guarantees that colliding interrupts will correctly compute elapsed ticks (i.e. the last will compute and announce zero ticks, which is correct and expected). And this opened a tiny window where you could incorrectly ignore a just-set timeout. Factor out the specific registers used (there are only five) into pointer-valued macros instead of banging them directly. Unify interrupt initialization for main and auxiliary cores. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
4 years ago |
|
Gerard Marull-Paretas
|
b1ced75386 |
drivers: timer: move initialization setup to drivers
The weak symbol sys_clock_driver_init has been removed, therefore moving the init responsability to the drivers themselves. As a result, the init function has now been made static on all drivers and moved to the bottom, following the convention used in other areas. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no> |
4 years ago |
|
Andy Ross
|
ed9434c812 |
soc: intel_adsp: Clean up shim driver
Each platform was defining its own shim.h header, with slightly
variant field definitions, for a register block that is almost
completely compatible between versions. This is made worse by the
fact that these represent an API imported fairly early from SOF, the
upstream version of which has since diverged.
Move the existing shim struct into a header ("cavs-shim.h") of its
own, remove a bunch of unused symbols, fill in definitions for some
registers that were left out, correct naming to match the hardware
docs in a few places, make sure all hardware dependencies are source
from devicetree only, and modify existing usage to use the new API
exclusively.
Interestingly this leaves the older shim.h header in place, as it
turns out to contain definitions for a bunch of things that were never
part of the shim register block. Those will be unified in separate
patches.
Finally: note that the existing IPM_CAVS_IDC driver (soon to be
removed from all the intel_adsp soc's) is still using the old API, so
redeclare the minimal subset that it needs for the benefit of the
platforms in transition.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
|
4 years ago |
|
Andy Ross
|
b6a32e9550 |
drivers: cavs_timer: Use the new interrupt controller API
Recent work to this platform added a new, cleaner low level API to the interrupt controller. Replace the hand-cooked register access with that. This is still not as good as having proper multicore support in the intc_cavs driver, but it's at least better. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
4 years ago |
|
Andy Ross
|
0b400d86c0 |
drivers/timer/cavs_timer: Fix race in k_cycle_get_64()
In commit
|
4 years ago |
Christopher Friedt
|
918a574c88 |
clock: add k_cycle_get_64
This change adds `k_cycle_get_64()` on platforms that support a 64-bit cycle counter. The interface functions `arch_k_cycle_get_64()` and `sys_clock_cycle_get_64()` are also introduced. Fixes #39934 Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com> |
4 years ago |
|
Andy Ross
|
795d36f811 |
drivers/timer/cavs_timer: Don't suppress smp_timer_init()
This function wasn't being defined when SMP_BOOT_DELAY was set or when SMP wasn't enabled. There's no reason for either, then function doesn't depend on any kconfig-dependent build-time state, and (given that we use -ffunction-sections) it won't appear in output binaries unless called. And there are use cases (e.g. z_smp_start_cpu()) where we need that function even when BOOT_DELAY is enabled. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
4 years ago |
|
Guennadi Liakhovetski
|
45b70e1500 |
smp: limit the scope of some SMP-only functions
z_smp_init() is only available if CONFIG_SMP is defined, smp_timer_init() also depends on two Kconfig parameters. Also make it conditional in cavs_timer.c. Also clarify some SMP-related comments there. Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com> |
4 years ago |
|
Guennadi Liakhovetski
|
a871f0be49 |
xtensa: cavs: fix irq_enable() argument
irq_enable() should be called with the composite IRQ code as its argument, not just the Xtensa proper part of it. Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com> |
4 years ago |
|
Anas Nashif
|
5d6c219210 |
drivers: device: do not reuse tag name 'device'
Do not reuse tag name (misra rule 5.7). Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
4 years ago |
|
Anas Nashif
|
12b53d121e |
clock: rename z_timer_cycle_get_32 -> sys_clock_cycle_get_32
This is another API that is being used in all timer drivers and is not internal to the clock subsystem. Remove the leading z_ and make promote it to a cross-subsystem API. Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
4 years ago |
|
Anas Nashif
|
9c1efe6b4b |
clock: remove z_ from semi-public APIs
The clock/timer APIs are not application facing APIs, however, similar to arch_ and a few other APIs they are available to implement drivers and add support for new hardware and are documented and available to be used outside of the clock/kernel subsystems. Remove the leading z_ and provide them as clock_* APIs for someone writing a new timer driver to use. Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
4 years ago |
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Andy Ross
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eb1ef50b6b |
arch/xtensa: General cleanup, remove dead code
There was a bunch of dead historical cruft floating around in the arch/xtensa tree, left over from older code versions. It's time to do a cleanup pass. This is entirely refactoring and size optimization, no behavior changes on any in-tree devices should be present. Among the more notable changes: + xtensa_context.h offered an elaborate API to deal with a stack frame and context layout that we no longer use. + xtensa_rtos.h was entirely dead code + xtensa_timer.h was a parallel abstraction layer implementing in the architecture layer what we're already doing in our timer driver. + The architecture thread structs (_callee_saved and _thread_arch) aren't used by current code, and had dead fields that were removed. Unfortunately for standards compliance and C++ compatibility it's not possible to leave an empty struct here, so they have a single byte field. + xtensa_api.h was really just some interrupt management inlines used by irq.h, so fold that code into the outer header. + Remove the stale assembly offsets. This architecture doesn't use that facility. All told, more than a thousand lines have been removed. Not bad. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
4 years ago |
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Andy Ross
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71fd58ccac |
drivers/cavs_timer: Fix multiword race with timer counter
The count register is 64 bits, but we're a 32 bit CPU that can only read four bytes at a time, so a bit of care is needed to prevent racing against a wraparound of the low word. Wrap the low read between two reads of the high word and make sure it didn't change. Fixes #31599 Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
4 years ago |
Trond Einar Snekvik
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86c793af3f |
sys: util: Replace MIN(MAX(a, b), c) with CLAMP
Replaces all existing variants of value clamping with the MIN and MAX macros with the CLAMP macro. Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no> |
5 years ago |
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Andy Ross
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ec6a98e5e1 |
drivers/timer/cavs_timer: Prevent spurious interrupts
The HDA wall clock timer is a 64 bit timer with 64 bit compare registers, but it's being used from a 32 bit CPU. Writing the comparator piecewise with a 64 bit C assignment will write the low dword first, opening the possibility that the hardware will see time go "backwards" and trigger an interrupt incorrectly. Disable the enable bit while setting the comparator. Found by inspection. In practice this will be very rare, and spurious timer interrupts are supposed to be benign anyway (though they can result in timeout expirations being misaligned to ticks, which might be surprising to applications). Best to get it right. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
5 years ago |
Tomasz Bursztyka
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4dcfb5531c |
isr: Normalize usage of device instance through ISR
The goal of this patch is to replace the 'void *' parameter by 'struct device *' if they use such variable or just 'const void *' on all relevant ISRs This will avoid not-so-nice const qualifier tweaks when device instances will be constant. Note that only the ISR passed to IRQ_CONNECT are of interest here. In order to do so, the script fix_isr.py below is necessary: from pathlib import Path import subprocess import pickle import mmap import sys import re import os cocci_template = """ @r_fix_isr_0 @ type ret_type; identifier P; identifier D; @@ -ret_type <!fn!>(void *P) +ret_type <!fn!>(const struct device *P) { ... ( const struct device *D = (const struct device *)P; | const struct device *D = P; ) ... } @r_fix_isr_1 @ type ret_type; identifier P; identifier D; @@ -ret_type <!fn!>(void *P) +ret_type <!fn!>(const struct device *P) { ... const struct device *D; ... ( D = (const struct device *)P; | D = P; ) ... } @r_fix_isr_2 @ type ret_type; identifier A; @@ -ret_type <!fn!>(void *A) +ret_type <!fn!>(const void *A) { ... } @r_fix_isr_3 @ const struct device *D; @@ -<!fn!>((void *)D); +<!fn!>(D); @r_fix_isr_4 @ type ret_type; identifier D; identifier P; @@ -ret_type <!fn!>(const struct device *P) +ret_type <!fn!>(const struct device *D) { ... ( -const struct device *D = (const struct device *)P; | -const struct device *D = P; ) ... } @r_fix_isr_5 @ type ret_type; identifier D; identifier P; @@ -ret_type <!fn!>(const struct device *P) +ret_type <!fn!>(const struct device *D) { ... -const struct device *D; ... ( -D = (const struct device *)P; | -D = P; ) ... } """ def find_isr(fn): db = [] data = None start = 0 try: with open(fn, 'r+') as f: data = str(mmap.mmap(f.fileno(), 0).read()) except Exception as e: return db while True: isr = "" irq = data.find('IRQ_CONNECT', start) while irq > -1: p = 1 arg = 1 p_o = data.find('(', irq) if p_o < 0: irq = -1 break; pos = p_o + 1 while p > 0: if data[pos] == ')': p -= 1 elif data[pos] == '(': p += 1 elif data[pos] == ',' and p == 1: arg += 1 if arg == 3: isr += data[pos] pos += 1 isr = isr.strip(',\\n\\t ') if isr not in db and len(isr) > 0: db.append(isr) start = pos break if irq < 0: break return db def patch_isr(fn, isr_list): if len(isr_list) <= 0: return for isr in isr_list: tmplt = cocci_template.replace('<!fn!>', isr) with open('/tmp/isr_fix.cocci', 'w') as f: f.write(tmplt) cmd = ['spatch', '--sp-file', '/tmp/isr_fix.cocci', '--in-place', fn] subprocess.run(cmd) def process_files(path): if path.is_file() and path.suffix in ['.h', '.c']: p = str(path.parent) + '/' + path.name isr_list = find_isr(p) patch_isr(p, isr_list) elif path.is_dir(): for p in path.iterdir(): process_files(p) if len(sys.argv) < 2: print("You need to provide a dir/file path") sys.exit(1) process_files(Path(sys.argv[1])) And is run: ./fix_isr.py <zephyr root directory> Finally, some files needed manual fixes such. Fixes #27399 Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com> |
5 years ago |
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Tomasz Bursztyka
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e18fcbba5a |
device: Const-ify all device driver instance pointers
Now that device_api attribute is unmodified at runtime, as well as all the other attributes, it is possible to switch all device driver instance to be constant. A coccinelle rule is used for this: @r_const_dev_1 disable optional_qualifier @ @@ -struct device * +const struct device * @r_const_dev_2 disable optional_qualifier @ @@ -struct device * const +const struct device * Fixes #27399 Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com> |
5 years ago |
Kumar Gala
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a1b77fd589 |
zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \ xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g" git grep -l 's\(8\|16\|32\|64\)_t' | \ xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g" Signed-off-by: Kumar Gala <kumar.gala@linaro.org> |
5 years ago |
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Kumar Gala
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e53ddb5037 |
intc: intc_cavs: Replace DT_CAVS_ICTL_BASE_ADDR with new macros
Replace various drivers and soc code that use DT_CAVS_ICTL_BASE_ADDR with DT_REG_ADDR(DT_NODELABEL(cavs0)). Signed-off-by: Kumar Gala <kumar.gala@linaro.org> |
5 years ago |
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Andy Ross
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7832738ae9 |
kernel/timeout: Make timeout arguments an opaque type
Add a k_timeout_t type, and use it everywhere that kernel API functions were accepting a millisecond timeout argument. Instead of forcing milliseconds everywhere (which are often not integrally representable as system ticks), do the conversion to ticks at the point where the timeout is created. This avoids an extra unit conversion in some application code, and allows us to express the timeout in units other than milliseconds to achieve greater precision. The existing K_MSEC() et. al. macros now return initializers for a k_timeout_t. The K_NO_WAIT and K_FOREVER constants have now become k_timeout_t values, which means they cannot be operated on as integers. Applications which have their own APIs that need to inspect these vs. user-provided timeouts can now use a K_TIMEOUT_EQ() predicate to test for equality. Timer drivers, which receive an integer tick count in ther z_clock_set_timeout() functions, now use the integer-valued K_TICKS_FOREVER constant instead of K_FOREVER. For the initial release, to preserve source compatibility, a CONFIG_LEGACY_TIMEOUT_API kconfig is provided. When true, the k_timeout_t will remain a compatible 32 bit value that will work with any legacy Zephyr application. Some subsystems present timeout (or timeout-like) values to their own users as APIs that would re-use the kernel's own constants and conventions. These will require some minor design work to adapt to the new scheme (in most cases just using k_timeout_t directly in their own API), and they have not been changed in this patch, instead selecting CONFIG_LEGACY_TIMEOUT_API via kconfig. These subsystems include: CAN Bus, the Microbit display driver, I2S, LoRa modem drivers, the UART Async API, Video hardware drivers, the console subsystem, and the network buffer abstraction. k_sleep() now takes a k_timeout_t argument, with a k_msleep() variant provided that works identically to the original API. Most of the changes here are just type/configuration management and documentation, but there are logic changes in mempool, where a loop that used a timeout numerically has been reworked using a new z_timeout_end_calc() predicate. Also in queue.c, a (when POLL was enabled) a similar loop was needlessly used to try to retry the k_poll() call after a spurious failure. But k_poll() does not fail spuriously, so the loop was removed. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
5 years ago |
Daniel Leung
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6d49e7c692 |
timer: add CAVS DSP wall clock timer for Intel SoC
The DSP wall clock timer on some Intel SoC is a timer driven directly by external oscillator and is external to the CPU core(s). It is not as fast as the internal core clock, but provides a common and synchronized counter for all CPU cores (which is useful for SMP). This uses the RISCV timer as base as it is using 64-bit counter. Signed-off-by: Daniel Leung <daniel.leung@intel.com> |
5 years ago |