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Add a support for Texas Instruments MSPM0 fmaily and MSPM0-G series SoC. Signed-off-by: Saravanan Sekar <saravanan@linumiz.com> Signed-off-by: Jackson Farley <j-farley@ti.com>pull/88765/merge
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# MSPM0 SDK configuration |
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# Copyright (c) 2025 Texas Instruments |
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# SPDX-License-Identifier: Apache-2.0 |
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config HAS_MSPM0_SDK |
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bool |
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config USE_MSPM0_DL_GPIO |
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bool |
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config USE_MSPM0_DL_UART |
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bool |
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# SPDX-License-Identifier: Apache-2.0 |
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set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "SoC Linker Script") |
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add_subdirectory(${SOC_SERIES}) |
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if(CONFIG_SOC_FAMILY_TI_MSPM0) |
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string(TOUPPER ${CONFIG_SOC} SDK_SOC_SELECT) |
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zephyr_compile_definitions(-D__${SDK_SOC_SELECT}__) |
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endif() |
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# Texas Instruments MSPM0 Family |
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# Copyright (c) 2025 Texas Instruments |
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# Copyright (c) 2025 Linumiz |
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# SPDX-License-Identifier: Apache-2.0 |
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if SOC_FAMILY_TI_MSPM0 |
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rsource "*/Kconfig" |
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# Per TRM Section 2.2.7 Peripheral Power Enable Control: wait at least 4 ULPCLK |
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# clock cycles before accessing the peripheral's memory-mapped registers. |
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# ULPCLK will either be equivalent or half of the main MCLK and CPUCLK, |
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# yielding the delay time of 8 cycles |
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config MSPM0_PERIPH_STARTUP_DELAY |
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int |
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default 8 |
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endif # SOC_FAMILY_TI_MSPM0 |
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# SPDX-License-Identifier: Apache-2.0 |
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# Copyright (c) 2025 Texas Instruments |
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# Copyright (c) 2025 Linumiz |
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if SOC_FAMILY_TI_MSPM0 |
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rsource "*/Kconfig.defconfig" |
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endif # SOC_FAMILY_TI_MSPM0 |
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# Texas Instruments MSPM0 Family |
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# Copyright (c) 2025 Texas Instruments |
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# Copyright (c) 2025 Linumiz |
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# SPDX-License-Identifier: Apache-2.0 |
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config SOC_FAMILY_TI_MSPM0 |
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bool |
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config SOC_FAMILY |
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default "ti_mspm0" if SOC_FAMILY_TI_MSPM0 |
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rsource "*/Kconfig.soc" |
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# SPDX-License-Identifier: Apache-2.0 |
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zephyr_sources(soc.c) |
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zephyr_include_directories(.) |
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# TI MSPM0G |
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# Copyright (c) 2025 Texas Instruments |
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# Copyright (c) 2025 Linumiz |
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# SPDX-License-Identifier: Apache-2.0 |
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config SOC_SERIES_MSPM0G |
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select ARM |
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select CPU_CORTEX_M0PLUS |
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select CPU_CORTEX_M_HAS_VTOR |
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select CPU_HAS_ARM_MPU |
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select CPU_CORTEX_M_HAS_SYSTICK |
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select BUILD_OUTPUT_BIN |
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select BUILD_OUTPUT_HEX |
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select HAS_MSPM0_SDK |
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select CLOCK_CONTROL |
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select SOC_EARLY_INIT_HOOK |
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# TI MSPM0G series |
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# Copyright (c) 2025 Texas Instruments |
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# Copyright (c) 2025 Linumiz |
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# SPDX-License-Identifier: Apache-2.0 |
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DT_CHOSEN_Z_FLASH := zephyr,flash |
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config FLASH_SIZE |
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default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_FLASH),0,K) |
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config FLASH_BASE_ADDRESS |
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default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH)) |
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if SOC_SERIES_MSPM0G |
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config NUM_IRQS |
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default 32 |
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endif # SOC_SERIES_MSPM0G |
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# Copyright (c) 2024 Texas Instruments |
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# Copyright (c) 2025 Linumiz |
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# SPDX-License-Identifier: Apache-2.0 |
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config SOC_SERIES_MSPM0G |
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bool |
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select SOC_FAMILY_TI_MSPM0 |
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help |
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Enable support for TI MSPM0G series SoCs |
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config SOC_MSPM0G1105 |
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bool |
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select SOC_SERIES_MSPM0G |
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config SOC_MSPM0G1106 |
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bool |
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select SOC_SERIES_MSPM0G |
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config SOC_MSPM0G1107 |
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bool |
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select SOC_SERIES_MSPM0G |
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config SOC_MSPM0G1505 |
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bool |
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select SOC_SERIES_MSPM0G |
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config SOC_MSPM0G1506 |
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bool |
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select SOC_SERIES_MSPM0G |
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config SOC_MSPM0G1507 |
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bool |
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select SOC_SERIES_MSPM0G |
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config SOC_MSPM0G1519 |
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bool |
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select SOC_SERIES_MSPM0G |
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config SOC_MSPM0G3105 |
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bool |
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select SOC_SERIES_MSPM0G |
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config SOC_MSPM0G3106 |
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bool |
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select SOC_SERIES_MSPM0G |
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config SOC_MSPM0G3107 |
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bool |
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select SOC_SERIES_MSPM0G |
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config SOC_MSPM0G3505 |
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bool |
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select SOC_SERIES_MSPM0G |
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config SOC_MSPM0G3506 |
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bool |
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select SOC_SERIES_MSPM0G |
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config SOC_MSPM0G3507 |
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bool |
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select SOC_SERIES_MSPM0G |
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config SOC_MSPM0G3519 |
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bool |
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select SOC_SERIES_MSPM0G |
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config SOC_SERIES |
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default "mspm0g" if SOC_SERIES_MSPM0G |
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config SOC |
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default "mspm0g1105" if SOC_MSPM0G1105 |
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default "mspm0g1106" if SOC_MSPM0G1106 |
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default "mspm0g1107" if SOC_MSPM0G1107 |
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default "mspm0g1505" if SOC_MSPM0G1505 |
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default "mspm0g1506" if SOC_MSPM0G1506 |
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default "mspm0g1507" if SOC_MSPM0G1507 |
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default "mspm0g1519" if SOC_MSPM0G1519 |
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default "mspm0g3105" if SOC_MSPM0G3105 |
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default "mspm0g3106" if SOC_MSPM0G3106 |
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default "mspm0g3107" if SOC_MSPM0G3107 |
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default "mspm0g3505" if SOC_MSPM0G3505 |
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default "mspm0g3506" if SOC_MSPM0G3506 |
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default "mspm0g3507" if SOC_MSPM0G3507 |
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default "mspm0g3519" if SOC_MSPM0G3519 |
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/*
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* Copyright (c) 2025 Texas Instruments |
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* Copyright (c) 2025 Linumiz |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#include <zephyr/init.h> |
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#include <ti/driverlib/driverlib.h> |
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#include <soc.h> |
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void soc_early_init_hook(void) |
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{ |
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/* Low Power Mode is configured to be SLEEP0 */ |
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DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0); |
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} |
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/*
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* Copyright (c) 2025 Texas Instruments |
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* Copyright (c) 2025 Linumiz |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#ifndef _MSPM0_SOC_H |
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#define _MSPM0_SOC_H |
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#include <ti/devices/msp/msp.h> |
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#include <ti/driverlib/m0p/dl_core.h> |
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#endif /* _MSPM0_SOC_H */ |
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family: |
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- name: ti_mspm0 |
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series: |
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- name: mspm0g |
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socs: |
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- name: mspm0g1105 |
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- name: mspm0g1106 |
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- name: mspm0g1107 |
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- name: mspm0g1505 |
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- name: mspm0g1506 |
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- name: mspm0g1507 |
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- name: mspm0g1519 |
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- name: mspm0g3105 |
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- name: mspm0g3106 |
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- name: mspm0g3107 |
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- name: mspm0g3505 |
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- name: mspm0g3506 |
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- name: mspm0g3507 |
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- name: mspm0g3519 |
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