zephyr

118379 Commits

85 Branches

204 Tags

1.8 GiB

Tree: 061036f9e3

Commit Graph

Author	SHA1	Message	Date
Emilio Benavente	82a192c8a9	boards: nxp: Removing CONFIG_PINCTRL from the boards defconfig The Drivers using Pinctrl should be turning Pinctrl on this should not be the responsibility of the board. This commit removes CONFIG_PINCTRL from the boards side for nxp boards. Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>	9 months ago
Manuel Argüelles	ca3310145f	drivers: select nocache only when supported NOCACHE_MEMORY depends on ARCH_HAS_NOCACHE_MEMORY_SUPPORT, so don't try to select the symbol if not supported. Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>	2 years ago
Dat Nguyen Duy	92f3fb79fe	drivers: pwm: introduce PWM driver for NXP S32 EMIOS This introduces PWM driver with supporting PWM output APIs based on NXP S32 EMIOS peripheral. This supports three mode: OPWFMB, OPWMCB and OPWMB. OPWFMB uses internal counter, the new period and duty cycle takes effect immediately. OPWMCB and OPWMB use external counter as timebase, changing PWM period at runtime will impact to all channels share the same timebase. Also the new period and duty cycle take effect in next period boundary of the timebase Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>	2 years ago

Author

SHA1

Message

Date

Emilio Benavente

82a192c8a9

boards: nxp: Removing CONFIG_PINCTRL from the boards defconfig

The Drivers using Pinctrl should be turning Pinctrl on
this should not be the responsibility of the board. This
commit removes CONFIG_PINCTRL from the boards side for nxp boards.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>

9 months ago

Manuel Argüelles

ca3310145f

drivers: select nocache only when supported

NOCACHE_MEMORY depends on ARCH_HAS_NOCACHE_MEMORY_SUPPORT, so
don't try to select the symbol if not supported.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>

2 years ago

Dat Nguyen Duy

92f3fb79fe

drivers: pwm: introduce PWM driver for NXP S32 EMIOS

This introduces PWM driver with supporting PWM output
APIs based on NXP S32 EMIOS peripheral. This supports
three mode: OPWFMB, OPWMCB and OPWMB.

OPWFMB uses internal counter, the new period and duty
cycle takes effect immediately.

OPWMCB and OPWMB use external counter as timebase, changing
PWM period at runtime will impact to all channels share the
same timebase. Also the new period and duty cycle take effect
in next period boundary of the timebase

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>

2 years ago

3 Commits (061036f9e352bf96e4808ab1cb209aac2747dafd)