Remove a message that had a typo in it but, more importantly that was
not needed.
The CONFIG_ISR_TABLES_LOCAL_DECLARATION already selects EXPERIMENTAL so
a user is properly alerted about the consequences just like any other
EXPERIMENTAL features if they enable WARN_EXPERIMENTAL.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
According to the Zephyr documentation, the multi-level interrupts
are encoded as follows:
`L1_ID | ((L2_ID + 1) << L2_BITS) | ((L3_ID + 1) << (L3_BITS + L2_BITS))`
This means that when L3 interrupts are enabled, the gen_isr_table.py
script will receive the value of L2_ID + 1. Currently, the script
takes this value and directly compares it with the offsets set via
`CONFIG_3RD_LVL_INTR_xx_OFFSET`. This is wrong because the values from
said configurations are the same as L2_ID and because of that the
script will generate an error. To fix this, use the value of L2_ID
instead of L2_ID + 1.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This commit moves all the functionality related to the current
interrupt parser into gen_isr_tables_parser_carrays.py file.
The new parser file gen_isr_tables_parser_local.py file is
implemented with the new parser that.
Additional information added to the generated interrupt header
that contains data required by the new parser.
Signed-off-by: Radosław Koppel <radoslaw.koppel@nordicsemi.no>
This commit breaks the code into functional classes.
This way the functionality is visibly splitted into
functional parts and it is easier to replace the
specific parser part to implement new code generators.
There is also common functionality to handle multi level interrupts
moved to configuration class.
Signed-off-by: Radosław Koppel <radoslaw.koppel@nordicsemi.no>
This commit cleans up the gen_isr_tables code for better clarity
and easier modification.
Changes include:
- Separate functions to load intList section.
- Replace spurious handlers in internal data with None.
Now it is the output generator work to choose right function.
- All the work to generate vt and swt separated into its own functions.
- Remove the need for internal shared array - all the information
is here in swt array.
- The update_masks function - more functionality moved here.
- Simplify bit_mask function.
Signed-off-by: Radosław Koppel <radoslaw.koppel@nordicsemi.no>
When using direct isrs, a vector table is needed. However, if none is
present , i.e. `CONFIG_GEN_IRQ_VECTOR_TABLE=n`, this script failed. The
given error message was not helpful (`'NoneType' has no len()`).
This change makes it clearer, where to look for the problem.
Signed-off-by: Greter Raffael <rgreter@baumer.com>
Rename the bitmask variables from `*_LVL_INTERRUPTS` to
`INTERRUPT_LVL_BITMASK[]` array to be consistent with
`INTERRUPT_BITS`, making it easier to loop over the bitmasks.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
The calculation of `THIRD_LVL_INTERRUPTS` bitmask in the
`update_masks()` function is wrong, the number of bits to shift
should be the sum of the first two levels.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
This commit removes the needs or generating isrList.bin temporary file.
Now gen_isr_tables.py script access the required section directly in
elf file, that was accessed by the script anyway.
It simplifies the building removing one step.
Signed-off-by: Radosław Koppel <radoslaw.koppel@nordicsemi.no>
This commit introduces all the necessary changes for
enabling the usage of shared interrupts.
This works by using a second interrupt table: _shared_sw_isr_table
which keeps track of all of the ISR/arg pairs sharing the same
interrupt line. Whenever a second ISR/arg pair is registered
on the same interrupt line using IRQ_CONNECT(), the entry in
_sw_isr_table will be overwriten by a
(shared_isr, _shared_sw_isr_table[irq]) pair. In turn, shared_isr()
will invoke all of the ISR/arg pairs registered on the same
interrupt line.
This feature only works statically, meaning you can only make use
of shared interrupts using IRQ_CONNECT(). Attempting to dynamically
register a ISR/arg pair will overwrite the hijacked _sw_isr_table
entry.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Some architectures such as RISC-v support more than 255 interrupts
per aggrigator. This diff adds the ability to forgo the aggrigator
pattern and use a configurable number of bits for multilevel
interruts.
Signed-off-by: Joshua Lilly <jgl@meta.com>
pylint reports the following issues on the
scripts/build/gen_isr_tables.py:
C0325:Unnecessary parens after '=' keyword (superfluous-parens)
File:scripts/build/gen_isr_tables.py
Line:16
Column:0
C0325:Unnecessary parens after '=' keyword (superfluous-parens)
File:scripts/build/gen_isr_tables.py
Line:316
Column:0
Fix that so that unrelated PR touching the same file have a chance to
pass the compliance checks.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Disables allowing the python argparse library from automatically
shortening command line arguments, this prevents issues whereby
a new command is added and code that wrongly uses the shortened
command of an existing argument which is the same as the new
command being added will silently change script behaviour.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Move scripts needed by the build system and not designed to be run
individually or standalone into the build subfolder.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
There is no reason to have this script in a different place than all the
other python scripts. Move it.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
The whole mechanism of IRQ table generation is build around the
assumption that the IRQ vector table contains an array of addresses the
PC will be assigned to when the corresponding interrupt is triggered.
While this is correct for the majority of architectures (ARM, RISCV with
CLIC in vectored mode, etc...) this is not valid in general (for example
RISCV with CLINT/HLINT in vectored mode).
In this alternative format for the IRQ vector table, the pc will get
assigned by the hardware to the address of the vector table index
corresponding to the interrupt ID. From the vector table index, a
subsequent jump will occur from there to service the interrupt.
This means that the IRQ vector table contains an opcode that is a jump
instruction to a specific location instead of the address of the
location itself.
This patch is introducing support for this alternative IRQ vector table
format. The user can now select one format or the other one by acting on
IRQ_VECTOR_TABLE_JUMP_BY_ADDRESS or IRQ_VECTOR_TABLE_JUMP_BY_CODE
Kconfig symbols.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Under no circumstances the generated IRQ vector table can and should
contain NULL values. This is correctly enforced at generation time by
the gen_isr_tables.py script making the existence of the ISR_WRAPPER
define useless.
The enforced behaviour is:
- When the ISR software table exists defaults to _isr_wrapper
- Otherwise defaults to z_irq_spurious
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
The gen_usr_tables scripts were not updated to make use of the
<zephyr/...> include prefix, fix this.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
At its current state, the script tries to access the vector table
list without checking first that the index is valid. This can
cause the script to crash without a descriptive message.
The index can be invalid if an IRQ number that is larger than
the maximum number allowed by the SOC is used.
This PR adds a check of that index, that exits with an error
message if the index is invalid.
Fixes#29809
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
As of today generic _irq_vector_table is used only on 32bit
architectures and 64bit architectures have their own implementation.
Make vectors size adjustable by using uintptr_t instead of uint32_t
for vectors.
The ARCv3 64 bit HS6x processors are going to be first users for
that.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
gen_isr_tables.py generates C-code which initializes a table with
values, and these values are structs with members cast to
(const void *) and (void *), respectively.
The actual struct definition has a member of type (const void *)
and another of type void (*)(const void *).
In order to avoid a large amount of reported issues in Coverity,
cast this to the exact type.
Signed-off-by: Torstein Grindvik <torstein.grindvik@nordicsemi.no>
All ISRs are meant to take a const struct device pointer, but to
simplify the change let's just move the parameter to constant and that
should be fine.
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Random readability improvements:
- avoid a stack trace on error by using sys.exit()
- include "error:" in the error() output, for grep
- print conflicting addresses on multiple IRQ registration
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Users are reportedly not able to understand how to debug the following
error message from gen_isr_tables:
gen_isr_tables.py: multiple registrations at table_index 8 for irq 8
Debugging issues these kinds of issues is difficult so we need to give
users as much information as possible.
To make it clearer that it could be an abuse of the 'IRQ_CONNECT' API
that is causing the issue we add this to the error message.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Fix this warning, as a preparation for a CI check:
arch/common/gen_isr_tables.py:167:11: C0123: Using type() instead of
isinstance() for a typecheck. (unidiomatic-typecheck)
isinstance() has the advantage that it also handles inheritance, though
it doesn't really matter here. It's more common at least.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Reported by pylint's 'bad-whitespace' warning.
Not gonna enable this warning in the CI check, because it flags stuff
like deliberately aligning assignments and gets too cultish. Just a
cleanup pass.
For whatever reason, the common convention in Python is to skip spaces
around '=' when passing keyword arguments and giving default arguments:
f(x=3, y=4)
def f(x, y=8):
...
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This is the generic symbol to select or otherwise test for when 64-bit
compilation is desired. Two trivial usages of this symbol are also
included.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Discovered with pylint3.
Use the placeholder name '_' for unproblematic unused variables. It's
what I'm used to, and pylint knows not to flag it.
Python tip:
for i in range(n):
some_list.append(0)
can be replaced with
some_list += n*[0]
Similarly, 3*'\t' gives '\t\t\t'.
(Relevant here because pylint flagged the loop index as unused.)
To do integer division in Python 3, use // instead of /.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Not needed in Python. Detected by check C0325 in pylint3.
Also replace an
if len(tag):
with just
if tag:
Empty strings, byte strings, lists, etc., are falsy in Python.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Update reserved function names starting with one underscore, replacing
them as follows:
'_k_' with 'z_'
'_K_' with 'Z_'
'_handler_' with 'z_handl_'
'_Cstart' with 'z_cstart'
'_Swap' with 'z_swap'
This renaming is done on both global and those static function names
in kernel/include and include/. Other static function names in kernel/
are renamed by removing the leading underscore. Other function names
not starting with any prefix listed above are renamed starting with
a 'z_' or 'Z_' prefix.
Function names starting with two or three leading underscores are not
automatcally renamed since these names will collide with the variants
with two or three leading underscores.
Various generator scripts have also been updated as well as perf,
linker and usb files. These are
drivers/serial/uart_handlers.c
include/linker/kobject-text.ld
kernel/include/syscall_handler.h
scripts/gen_kobject_list.py
scripts/gen_syscall_header.py
Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
The commit 77cb942a97 broke the generation of sw_isr_table for
multi-level IRQs. This patch fixes it.
Fixes#13082.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
It's incorrect behavior to call IRQ_CONNECT() on the
same IRQ line more than once, but only x86 was catching
this.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The script looks for CONFIG_3RD_LEVEL_INTR_xx_OFFSET while
the config is actually CONFIG_3RD_LVL_INTR_xx_OFFSET.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Some extensions to the multi-level interrupt controller are required
to support SoCs with more than four level 2 interrupt "aggregators".
Extend existing support to allow at most 8 level 2 or level 3
aggregators. Use Kconfig macro templates to cut down on boilerplate.
Try to clarify some aspects of the Kconfig help while we're at it, and
change the type of options which count things or are table offsets
from "hex" to "int", so that the generated .config is easier to read.
Finally, make some improvements to gen_isr_tables.py while we are
here. In particular, move some assignments around to cut down on
duplicated work, don't check for symbols we know must exist, and
improve the debug logging output's readability.
Signed-off-by: Marti Bolivar <marti@foundries.io>
In the MULTI_LEVEL_INTERRUPTS Kconfig we have a symbol for defining
the maximum IRQ per aggregator: MAX_IRQ_PER_AGGREGATOR
Instead of using a hard-coded value of 32 max irq per level,
let's use the value of MAX_IRQ_PER_AGGREGATOR
Signed-off-by: Michael Scott <mike@foundries.io>
If CONFIG_3RD_LEVEL_INTERRUPTS is not enabled then we see the following
error during sw_isr_table generation:
Traceback (most recent call last):
File "zephyr/arch/common/gen_isr_tables.py", line 291, in <module>
main()
File "zephyr/arch/common/gen_isr_tables.py", line 199, in main
if syms["CONFIG_3RD_LEVEL_INTERRUPTS"]:
KeyError: 'CONFIG_3RD_LEVEL_INTERRUPTS'
ninja: build stopped: subcommand failed.
Fix the logic to look for the symbol instead of referencing it.
Signed-off-by: Michael Scott <mike@foundries.io>
intList has been populated with the number of isrs, aka interrupts,
but nothing has not been using this information so we drop it and
everything used to construct it.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
This is a migration from using code generation to using the C language
which we in the general case we should aways strive towards.
It is equivalent to the simplification that was done with
_irq_spurious here:
https://github.com/zephyrproject-rtos/zephyr/pull/7574
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Instead of finding the address of the spurious irq function in the
intList section we now rely on the linker to find the address in the
_irq_spurious symbol.
This is a migration from using code generation to using the C language
which we in the general case we should aways strive towards.
In this specific case it makes the generated code 'irq_tables.c'
easier to read as we replace magic numbers with the &_irq_spurious
token.
Also, the path through the build system that _irq_spurious makes is
much shorter, so it is much easier for a user to understand how it is
used.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
In a scenario where a platform harbours multiple interrupts to the
extent the core cannot support it, an interrupt controller is added
as an additional level of interrupt. It typically combines several
sources of interrupt into one line that is then routed to the parent
controller.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types. There are few places we dont convert over to the new
types because of compatiability with ext/HALs or for ease of transition
at this point. Fixup a few of the PRI formatters so we build with newlib.
Jira: ZEP-2051
Change-Id: I7d2d3697cad04f20aaa8f6e77228f502cd9c8286
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The interrupts would be placed at incorrect offsets on systems where
some interrupt vectors are reserved for exceptions, such as ARC.
Change-Id: I5b1f00eb9e8aecb84ae66e3d0461a734ffb5fbe6
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This is a new mechanism for generating interrupt tables which will
be useful on many architectures. It replaces the old linker-based
mechanism for creating these tables and has a couple advantages:
1) It is now possible to use enums as the IRQ line argument to
IRQ_CONNECT(), which should ease CMSIS integration.
2) The vector table itself is now generated, which lets us place
interrupts directly into the vector table without having to
hard-code them. This is a feature we have long enjoyed on x86
and will enable 'direct' interrupts.
3) More code is common, requiring less arch-specific code to
support.
This patch introduces the common code for this mechanism. Follow-up
patches will enable it on various arches.
Issue: ZEP-1038, ZEP-1165
Change-Id: I9acd6e0de8b438fa9293f2e00563628f7510168a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Benjamin Cabé
Laurentiu Mihalcea
Radoslaw Koppel
Yong Cong Sin
Greter Raffael
Joshua Lilly
Aurelien Jarno
Jamie McCrae
Anas Nashif
Carlo Caione
Gerard Marull-Paretas
Yonatan Schachter
Eugeniy Paltsev
Torstein Grindvik
Tomasz Bursztyka
Kumar Gala
Martí Bolívar
Sebastian Bøe
Ulf Magnusson
Augusto Hack
Nicolas Pitre
Patrik Flykt
Rajavardhan Gundi
Andrew Boie
Daniel Leung
Marti Bolivar
Michael Scott