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drivers: fpga: fix log level

Use CONFIG_FPGA_LOG_LEVEL for the fpga
log modules.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
pull/81714/head
Fin Maaß 8 months ago committed by Fabio Baltieri
parent
commit
d18f4256ee
  1. 2
      drivers/fpga/Kconfig
  2. 2
      drivers/fpga/fpga_altera_agilex_bridge.c
  3. 2
      drivers/fpga/fpga_ice40.c
  4. 2
      drivers/fpga/fpga_mpfs.c
  5. 2
      drivers/fpga/fpga_slg471x5.c
  6. 2
      drivers/fpga/fpga_zynqmp.c

2
drivers/fpga/Kconfig

@ -10,7 +10,7 @@ menuconfig FPGA
if FPGA if FPGA
module = fpga module = FPGA
module-str = fpga module-str = fpga
source "subsys/logging/Kconfig.template.log_config" source "subsys/logging/Kconfig.template.log_config"

2
drivers/fpga/fpga_altera_agilex_bridge.c

@ -14,7 +14,7 @@
#include <zephyr/logging/log.h> #include <zephyr/logging/log.h>
#include "fpga_altera_agilex_bridge.h" #include "fpga_altera_agilex_bridge.h"
LOG_MODULE_REGISTER(fpga_altera); LOG_MODULE_REGISTER(fpga_altera, CONFIG_FPGA_LOG_LEVEL);
struct fpga_bridge_dev_data { struct fpga_bridge_dev_data {
/* SiP SVC controller */ /* SiP SVC controller */

2
drivers/fpga/fpga_ice40.c

@ -56,7 +56,7 @@
#define FPGA_ICE40_LEADING_CLOCKS_MIN 8 #define FPGA_ICE40_LEADING_CLOCKS_MIN 8
#define FPGA_ICE40_TRAILING_CLOCKS_MIN 49 #define FPGA_ICE40_TRAILING_CLOCKS_MIN 49
LOG_MODULE_REGISTER(fpga_ice40); LOG_MODULE_REGISTER(fpga_ice40, CONFIG_FPGA_LOG_LEVEL);
struct fpga_ice40_data { struct fpga_ice40_data {
uint32_t crc; uint32_t crc;

2
drivers/fpga/fpga_mpfs.c

@ -15,7 +15,7 @@
#include <zephyr/logging/log.h> #include <zephyr/logging/log.h>
#include <zephyr/sys/sys_io.h> #include <zephyr/sys/sys_io.h>
#include <zephyr/sys/util.h> #include <zephyr/sys/util.h>
LOG_MODULE_REGISTER(fpga_mpfs); LOG_MODULE_REGISTER(fpga_mpfs, CONFIG_FPGA_LOG_LEVEL);
#define SPI_FLASH_DIRECTORY_OFFSET 0x00000000 #define SPI_FLASH_DIRECTORY_OFFSET 0x00000000
#define SPI_FLASH_GOLDEN_IMAGE_OFFSET 0x00100400 #define SPI_FLASH_GOLDEN_IMAGE_OFFSET 0x00100400

2
drivers/fpga/fpga_slg471x5.c

@ -13,7 +13,7 @@
#include <zephyr/drivers/i2c.h> #include <zephyr/drivers/i2c.h>
#include <zephyr/logging/log.h> #include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(fpga_slg471x5); LOG_MODULE_REGISTER(fpga_slg471x5, CONFIG_FPGA_LOG_LEVEL);
#define SLG471X5_NREG 256 #define SLG471X5_NREG 256

2
drivers/fpga/fpga_zynqmp.c

@ -16,7 +16,7 @@
#include <stdio.h> #include <stdio.h>
#include <zephyr/logging/log.h> #include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(fpga_zynqmp); LOG_MODULE_REGISTER(fpga_zynqmp, CONFIG_FPGA_LOG_LEVEL);
static void power_up_fpga(void) static void power_up_fpga(void)
{ {

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