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Add clock control driver for NXP LPC devices that use the MCUX SDK drivers Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>pull/25106/head
4 changed files with 113 additions and 0 deletions
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# MCUXpresso SDK SYSCON |
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# Copyright (c) 2020, NXP |
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# SPDX-License-Identifier: Apache-2.0 |
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config CLOCK_CONTROL_MCUX_SYSCON |
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bool "MCUX LPC clock driver" |
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depends on HAS_MCUX_SYSCON |
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help |
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Enable support for mcux clock driver. |
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/*
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* Copyright (c) 2020, NXP |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#define DT_DRV_COMPAT nxp_lpc_syscon |
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#include <errno.h> |
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#include <soc.h> |
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#include <drivers/clock_control.h> |
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#include <dt-bindings/clock/mcux_lpc_syscon_clock.h> |
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#include <fsl_clock.h> |
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#define LOG_LEVEL CONFIG_CLOCK_CONTROL_LOG_LEVEL |
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#include <logging/log.h> |
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LOG_MODULE_REGISTER(clock_control); |
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static int mcux_lpc_syscon_clock_control_on(const struct device *dev, |
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clock_control_subsys_t sub_system) |
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{ |
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return 0; |
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} |
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static int mcux_lpc_syscon_clock_control_off(const struct device *dev, |
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clock_control_subsys_t sub_system) |
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{ |
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return 0; |
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} |
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static int mcux_lpc_syscon_clock_control_get_subsys_rate( |
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const struct device *dev, |
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clock_control_subsys_t sub_system, |
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uint32_t *rate) |
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{ |
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#if defined(CONFIG_I2C_MCUX_FLEXCOMM) || \ |
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defined(CONFIG_SPI_MCUX_FLEXCOMM) || \ |
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defined(CONFIG_UART_MCUX_FLEXCOMM) |
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uint32_t clock_name = (uint32_t) sub_system; |
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switch (clock_name) { |
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case MCUX_FLEXCOMM0_CLK: |
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*rate = CLOCK_GetFlexCommClkFreq(0); |
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break; |
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case MCUX_FLEXCOMM1_CLK: |
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*rate = CLOCK_GetFlexCommClkFreq(1); |
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break; |
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case MCUX_FLEXCOMM2_CLK: |
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*rate = CLOCK_GetFlexCommClkFreq(2); |
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break; |
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case MCUX_FLEXCOMM3_CLK: |
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*rate = CLOCK_GetFlexCommClkFreq(3); |
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break; |
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case MCUX_FLEXCOMM4_CLK: |
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*rate = CLOCK_GetFlexCommClkFreq(4); |
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break; |
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case MCUX_FLEXCOMM5_CLK: |
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*rate = CLOCK_GetFlexCommClkFreq(5); |
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break; |
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case MCUX_FLEXCOMM6_CLK: |
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*rate = CLOCK_GetFlexCommClkFreq(6); |
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break; |
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case MCUX_FLEXCOMM7_CLK: |
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*rate = CLOCK_GetFlexCommClkFreq(7); |
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break; |
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case MCUX_HS_SPI_CLK: |
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#if defined(FSL_FEATURE_FLEXCOMM8_SPI_INDEX) |
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*rate = CLOCK_GetHsLspiClkFreq(); |
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#elif defined(FSL_FEATURE_FLEXCOMM14_SPI_INDEX) |
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*rate = CLOCK_GetFlexCommClkFreq(14); |
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#else |
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LOG_ERR("Missing feature define for HS_SPI clock!"); |
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#endif |
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break; |
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} |
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#endif |
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return 0; |
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} |
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static int mcux_lpc_syscon_clock_control_init(const struct device *dev) |
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{ |
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return 0; |
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} |
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static const struct clock_control_driver_api mcux_lpc_syscon_api = { |
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.on = mcux_lpc_syscon_clock_control_on, |
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.off = mcux_lpc_syscon_clock_control_off, |
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.get_rate = mcux_lpc_syscon_clock_control_get_subsys_rate, |
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}; |
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#define LPC_CLOCK_INIT(n) \ |
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\ |
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DEVICE_AND_API_INIT(mcux_lpc_syscon_##n, DT_INST_LABEL(n), \ |
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&mcux_lpc_syscon_clock_control_init, \ |
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NULL, NULL, \ |
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \ |
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&mcux_lpc_syscon_api); |
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DT_INST_FOREACH_STATUS_OKAY(LPC_CLOCK_INIT) |
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