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@ -9,5 +9,71 @@
@@ -9,5 +9,71 @@
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/ { |
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soc { |
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compatible = "st,stm32wb05", "st,stm32wb0", "simple-bus"; |
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timers2: timers@40002000 { |
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compatible = "st,stm32-timers"; |
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reg = <0x40002000 DT_SIZE_K(1)>; |
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clocks = <&rcc STM32_CLOCK(APB0, 0)>; |
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resets = <&rctl STM32_RESET(APB0, 0)>; |
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interrupts = <10 0>; |
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interrupt-names = "global"; |
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st,prescaler = <0>; |
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status = "disabled"; |
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pwm { |
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compatible = "st,stm32-pwm"; |
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status = "disabled"; |
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#pwm-cells = <3>; |
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}; |
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counter { |
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compatible = "st,stm32-counter"; |
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status = "disabled"; |
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}; |
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}; |
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timers16: timers@40005000 { |
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compatible = "st,stm32-timers"; |
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reg = <0x40005000 DT_SIZE_K(1)>; |
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clocks = <&rcc STM32_CLOCK(APB0, 1)>; |
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resets = <&rctl STM32_RESET(APB0, 1)>; |
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interrupts = <26 0>; |
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interrupt-names = "global"; |
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st,prescaler = <0>; |
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status = "disabled"; |
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pwm { |
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compatible = "st,stm32-pwm"; |
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status = "disabled"; |
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#pwm-cells = <3>; |
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}; |
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counter { |
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compatible = "st,stm32-counter"; |
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status = "disabled"; |
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}; |
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}; |
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timers17: timers@40006000 { |
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compatible = "st,stm32-timers"; |
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reg = <0x40006000 DT_SIZE_K(1)>; |
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clocks = <&rcc STM32_CLOCK(APB0, 2)>; |
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resets = <&rctl STM32_RESET(APB0, 2)>; |
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interrupts = <27 0>; |
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interrupt-names = "global"; |
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st,prescaler = <0>; |
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status = "disabled"; |
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pwm { |
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compatible = "st,stm32-pwm"; |
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status = "disabled"; |
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#pwm-cells = <3>; |
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}; |
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counter { |
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compatible = "st,stm32-counter"; |
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status = "disabled"; |
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}; |
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}; |
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}; |
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}; |
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