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Move and convert soc/arm64/intel_socfpga SoC family `intel_socfpga` configuration to HWMv2 with its SoC series: `agilex` and `agilex5` and related SoCs: `intel_socfpga_agilex` and `intel_socfpga_agilex5`. Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>pull/69687/head
29 changed files with 105 additions and 91 deletions
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# Copyright (c) 2021-2024 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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if SOC_FAMILY_INTEL_SOCFPGA |
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rsource "*/Kconfig" |
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endif # SOC_FAMILY_INTEL_SOCFPGA |
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# Copyright (c) 2021-2024 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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if SOC_FAMILY_INTEL_SOCFPGA |
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rsource "*/Kconfig.defconfig.series" |
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endif # SOC_FAMILY_INTEL_SOCFPGA |
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# Copyright (c) 2021-2024 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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config SOC_FAMILY_INTEL_SOCFPGA |
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bool |
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config SOC_FAMILY |
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default "intel_socfpga" if SOC_FAMILY_INTEL_SOCFPGA |
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rsource "*/Kconfig.soc" |
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# Copyright (c) 2021-2024 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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config SOC_SERIES_AGILEX |
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select ARM64 |
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select CPU_CORTEX_A53 |
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# Copyright (c) 2021 Intel Corporation |
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# Copyright (c) 2021-2024 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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if SOC_AGILEX |
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config SOC |
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default "intel_socfpga_agilex" |
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# must be >= the highest interrupt number used |
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# - include the UART interrupts 173 or 204 |
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config NUM_IRQS |
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# Copyright (c) 2021-2024 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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if SOC_SERIES_AGILEX |
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rsource "Kconfig.defconfig.agilex*" |
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endif # SOC_SERIES_AGILEX |
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# Copyright (c) 2021-2024 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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config SOC_SERIES_AGILEX |
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bool |
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select SOC_FAMILY_INTEL_SOCFPGA |
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help |
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Intel SoC FPGA Agilex Series |
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config SOC_SERIES |
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default "agilex" if SOC_SERIES_AGILEX |
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config SOC_AGILEX |
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bool |
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select SOC_SERIES_AGILEX |
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help |
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Intel SoC FPGA Agilex |
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config SOC |
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default "intel_socfpga_agilex" if SOC_AGILEX |
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# Copyright (c) 2022-2024 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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config SOC_SERIES_AGILEX5 |
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select ARM64 |
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select CPU_CORTEX_A76_A55 |
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# Copyright (c) 2022 Intel Corporation |
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# Copyright (c) 2022-2024 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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if SOC_AGILEX5 |
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config SOC |
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default "intel_socfpga_agilex5" |
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# must be >= the highest interrupt number used |
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# - include the UART interrupts 173 or 204 |
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config NUM_IRQS |
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# Copyright (c) 2022-2024 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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if SOC_SERIES_AGILEX5 |
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rsource "Kconfig.defconfig.agilex5*" |
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endif # SOC_SERIES_AGILEX5 |
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# Copyright (c) 2022-2024 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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config SOC_SERIES_AGILEX5 |
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bool |
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select SOC_FAMILY_INTEL_SOCFPGA |
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help |
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Intel SoC FPGA Agilex5 Series |
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config SOC_SERIES |
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default "agilex5" if SOC_SERIES_AGILEX5 |
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config SOC_AGILEX5 |
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bool |
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select SOC_SERIES_AGILEX5 |
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help |
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Intel SoC FPGA Agilex5 |
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config SOC |
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default "intel_socfpga_agilex5" if SOC_AGILEX5 |
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family: |
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- name: intel_socfpga |
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series: |
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- name: agilex |
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socs: |
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- name: intel_socfpga_agilex |
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- name: agilex5 |
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socs: |
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- name: intel_socfpga_agilex5 |
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# Copyright (c) 2021 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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config SOC_FAMILY_INTEL_SOCFPGA |
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bool |
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if SOC_FAMILY_INTEL_SOCFPGA |
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config SOC_FAMILY |
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string |
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default "intel_socfpga" |
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source "soc/soc_legacy/arm64/intel_socfpga/*/Kconfig.soc" |
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endif |
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# Copyright (c) 2021 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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source "soc/soc_legacy/arm64/intel_socfpga/*/Kconfig.defconfig.series" |
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# Copyright (c) 2021 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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source "soc/soc_legacy/arm64/intel_socfpga/*/Kconfig.series" |
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# Copyright (c) 2021 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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if SOC_SERIES_AGILEX |
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config SOC_SERIES |
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default "agilex" |
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source "soc/soc_legacy/arm64/intel_socfpga/agilex/Kconfig.defconfig.agilex*" |
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endif # SOC_SERIES_AGILEX |
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# Copyright (c) 2021 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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config SOC_SERIES_AGILEX |
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bool "Intel SoC FPGA Agilex Series" |
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select ARM64 |
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select CPU_CORTEX_A53 |
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select SOC_FAMILY_INTEL_SOCFPGA |
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help |
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Enable support for Intel SoC FPGA Series |
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# Copyright (c) 2021 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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choice |
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prompt "Intel SoC FPGA Agilex" |
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depends on SOC_SERIES_AGILEX |
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config SOC_AGILEX |
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bool "Intel SoC FPGA Agilex" |
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endchoice |
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# Copyright (c) 2022 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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if SOC_SERIES_AGILEX5 |
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config SOC_SERIES |
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default "agilex5" |
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source "soc/soc_legacy/arm64/intel_socfpga/agilex5/Kconfig.defconfig.agilex5*" |
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endif # SOC_SERIES_AGILEX5 |
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# Copyright (c) 2022 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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config SOC_SERIES_AGILEX5 |
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bool "Intel SoC FPGA Agilex5 Series" |
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select ARM64 |
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select CPU_CORTEX_A76_A55 |
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select SOC_FAMILY_INTEL_SOCFPGA |
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help |
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Enable support for Intel SoC FPGA Series |
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# Copyright (c) 2022 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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choice |
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prompt "Intel SoC FPGA Agilex5" |
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depends on SOC_SERIES_AGILEX5 |
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config SOC_AGILEX5 |
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bool "Intel SoC FPGA Agilex5" |
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endchoice |
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