zara
/
zephyr
mirror of https://github.com/zephyrproject-rtos/zephyr
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
Browse Source

drivers: mfd: Add ambiq iom binding file 

This commit adds ambiq iom binding file to consolidate
spi and i2c that share the same IO Master module on
Apollo MCUs

Signed-off-by: Hao Luo <hluo@ambiq.com>
pull/87800/merge
Hao Luo 4 months ago committed by Benjamin Cabé
parent
652ee91b7f
commit
8b60fa834c
18 changed files with 620 additions and 540 deletions
Whitespace
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Unified View
Diff Options
Show Stats Download Patch File Download Diff File
  1. 8
      boards/ambiq/apollo3_evb/apollo3_evb.dts
  2. 4
      boards/ambiq/apollo3_evb/apollo3_evb_connector.dtsi
  3. 8
      boards/ambiq/apollo3p_evb/apollo3p_evb.dts
  4. 4
      boards/ambiq/apollo3p_evb/apollo3p_evb_connector.dtsi
  5. 12
      boards/ambiq/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb.dts
  6. 8
      boards/ambiq/apollo4p_evb/apollo4p_evb.dts
  7. 2
      boards/ambiq/apollo4p_evb/apollo4p_evb_connector.dtsi
  8. 12
      boards/rakwireless/rak11720/rak11720.dts
  9. 18
      drivers/i2c/i2c_ambiq.c
  10. 3
      drivers/spi/spi_ambiq_bleif.c
  11. 15
      drivers/spi/spi_ambiq_spic.c
  12. 102
      dts/arm/ambiq/ambiq_apollo3_blue.dtsi
  13. 102
      dts/arm/ambiq/ambiq_apollo3p_blue.dtsi
  14. 137
      dts/arm/ambiq/ambiq_apollo4p.dtsi
  15. 168
      dts/arm/ambiq/ambiq_apollo4p_blue.dtsi
  16. 6
      dts/bindings/i2c/ambiq,i2c.yaml
  17. 15
      dts/bindings/mfd/ambiq,iom.yaml
  18. 10
      dts/bindings/spi/ambiq,spi.yaml

8
boards/ambiq/apollo3_evb/apollo3_evb.dts
Unescape View File

@ -139,21 +139,25 @@
status = "okay"; status = "okay";
}; };
&spi0 { &iom0 {
spi0: spi {
pinctrl-0 = <&spi0_default>; pinctrl-0 = <&spi0_default>;
pinctrl-names = "default"; pinctrl-names = "default";
cs-gpios = <&gpio0_31 11 GPIO_ACTIVE_LOW>; cs-gpios = <&gpio0_31 11 GPIO_ACTIVE_LOW>;
clock-frequency = <DT_FREQ_M(1)>; clock-frequency = <DT_FREQ_M(1)>;
status = "okay"; status = "okay";
};
}; };
&i2c3 { &iom3 {
i2c3: i2c {
pinctrl-0 = <&i2c3_default>; pinctrl-0 = <&i2c3_default>;
pinctrl-names = "default"; pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_STANDARD>; clock-frequency = <I2C_BITRATE_STANDARD>;
scl-gpios = <&gpio32_63 10 (GPIO_OPEN_DRAIN | GPIO_PULL_UP)>; scl-gpios = <&gpio32_63 10 (GPIO_OPEN_DRAIN | GPIO_PULL_UP)>;
sda-gpios = <&gpio32_63 11 (GPIO_OPEN_DRAIN | GPIO_PULL_UP)>; sda-gpios = <&gpio32_63 11 (GPIO_OPEN_DRAIN | GPIO_PULL_UP)>;
status = "okay"; status = "okay";
};
}; };
&counter0 { &counter0 {

4
boards/ambiq/apollo3_evb/apollo3_evb_connector.dtsi
Unescape View File

@ -63,5 +63,5 @@
}; };
}; };
ambiq_spi0: &spi0 {}; ambiq_spi0: &iom0 {};
ambiq_i2c3: &i2c3 {}; ambiq_i2c3: &iom3 {};

8
boards/ambiq/apollo3p_evb/apollo3p_evb.dts
Unescape View File

@ -117,21 +117,25 @@
status = "okay"; status = "okay";
}; };
&spi0 { &iom0 {
spi0: spi {
pinctrl-0 = <&spi0_default>; pinctrl-0 = <&spi0_default>;
pinctrl-names = "default"; pinctrl-names = "default";
cs-gpios = <&gpio0_31 11 GPIO_ACTIVE_LOW>; cs-gpios = <&gpio0_31 11 GPIO_ACTIVE_LOW>;
clock-frequency = <DT_FREQ_M(1)>; clock-frequency = <DT_FREQ_M(1)>;
status = "okay"; status = "okay";
};
}; };
&i2c3 { &iom3 {
i2c3: i2c {
pinctrl-0 = <&i2c3_default>; pinctrl-0 = <&i2c3_default>;
pinctrl-names = "default"; pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_STANDARD>; clock-frequency = <I2C_BITRATE_STANDARD>;
scl-gpios = <&gpio32_63 10 (GPIO_OPEN_DRAIN | GPIO_PULL_UP)>; scl-gpios = <&gpio32_63 10 (GPIO_OPEN_DRAIN | GPIO_PULL_UP)>;
sda-gpios = <&gpio32_63 11 (GPIO_OPEN_DRAIN | GPIO_PULL_UP)>; sda-gpios = <&gpio32_63 11 (GPIO_OPEN_DRAIN | GPIO_PULL_UP)>;
status = "okay"; status = "okay";
};
}; };
&counter0 { &counter0 {

4
boards/ambiq/apollo3p_evb/apollo3p_evb_connector.dtsi
Unescape View File

@ -88,5 +88,5 @@
}; };
}; };
ambiq_spi0: &spi0 {}; ambiq_spi0: &iom0 {};
ambiq_i2c3: &i2c3 {}; ambiq_i2c3: &iom3 {};

12
boards/ambiq/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb.dts
Unescape View File

@ -89,27 +89,33 @@
status = "okay"; status = "okay";
}; };
&i2c0 { &iom0 {
i2c0: i2c {
pinctrl-0 = <&i2c0_default>; pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default"; pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_STANDARD>; clock-frequency = <I2C_BITRATE_STANDARD>;
scl-gpios = <&gpio0_31 5 (GPIO_OPEN_DRAIN | GPIO_PULL_UP)>; scl-gpios = <&gpio0_31 5 (GPIO_OPEN_DRAIN | GPIO_PULL_UP)>;
sda-gpios = <&gpio0_31 6 (GPIO_OPEN_DRAIN | GPIO_PULL_UP)>; sda-gpios = <&gpio0_31 6 (GPIO_OPEN_DRAIN | GPIO_PULL_UP)>;
status = "okay"; status = "okay";
};
}; };
&spi1 { &iom1 {
spi1: spi {
pinctrl-0 = <&spi1_default>; pinctrl-0 = <&spi1_default>;
pinctrl-names = "default"; pinctrl-names = "default";
cs-gpios = <&gpio0_31 11 GPIO_ACTIVE_LOW>; cs-gpios = <&gpio0_31 11 GPIO_ACTIVE_LOW>;
clock-frequency = <DT_FREQ_M(1)>; clock-frequency = <DT_FREQ_M(1)>;
status = "okay"; status = "okay";
};
}; };
&spi4 { &iom4 {
spi4: spi {
pinctrl-0 = <&spi4_default>; pinctrl-0 = <&spi4_default>;
pinctrl-names = "default"; pinctrl-names = "default";
status = "okay"; status = "okay";
};
}; };
&mspi0 { &mspi0 {

8
boards/ambiq/apollo4p_evb/apollo4p_evb.dts
Unescape View File

@ -94,21 +94,25 @@
status = "okay"; status = "okay";
}; };
&iom0_i2c { &iom0 {
i2c0: i2c {
pinctrl-0 = <&i2c0_default>; pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default"; pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_STANDARD>; clock-frequency = <I2C_BITRATE_STANDARD>;
scl-gpios = <&gpio0_31 5 (GPIO_OPEN_DRAIN | GPIO_PULL_UP)>; scl-gpios = <&gpio0_31 5 (GPIO_OPEN_DRAIN | GPIO_PULL_UP)>;
sda-gpios = <&gpio0_31 6 (GPIO_OPEN_DRAIN | GPIO_PULL_UP)>; sda-gpios = <&gpio0_31 6 (GPIO_OPEN_DRAIN | GPIO_PULL_UP)>;
status = "okay"; status = "okay";
};
}; };
&iom1_spi { &iom1 {
spi1: spi {
pinctrl-0 = <&spi1_default>; pinctrl-0 = <&spi1_default>;
pinctrl-names = "default"; pinctrl-names = "default";
cs-gpios = <&gpio0_31 11 GPIO_ACTIVE_LOW>; cs-gpios = <&gpio0_31 11 GPIO_ACTIVE_LOW>;
clock-frequency = <1000000>; clock-frequency = <1000000>;
status = "okay"; status = "okay";
};
}; };
&mspi0 { &mspi0 {

2
boards/ambiq/apollo4p_evb/apollo4p_evb_connector.dtsi
Unescape View File

@ -118,4 +118,4 @@
}; };
}; };
spi1: &iom1_spi {}; ambiq_spi1: &iom1 {};

12
boards/rakwireless/rak11720/rak11720.dts
Unescape View File

@ -105,24 +105,29 @@
status = "okay"; status = "okay";
}; };
&i2c2 { &iom2 {
i2c2: i2c {
compatible = "ambiq,i2c"; compatible = "ambiq,i2c";
pinctrl-0 = <&i2c2_default>; pinctrl-0 = <&i2c2_default>;
pinctrl-names = "default"; pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_STANDARD>; clock-frequency = <I2C_BITRATE_STANDARD>;
status = "okay"; status = "okay";
};
}; };
&spi0 { &iom0 {
spi0: spi {
compatible = "ambiq,spi"; compatible = "ambiq,spi";
pinctrl-0 = <&spi0_default>; pinctrl-0 = <&spi0_default>;
pinctrl-names = "default"; pinctrl-names = "default";
cs-gpios = <&gpio0_31 1 GPIO_ACTIVE_LOW>; cs-gpios = <&gpio0_31 1 GPIO_ACTIVE_LOW>;
clock-frequency = <DT_FREQ_M(1)>; clock-frequency = <DT_FREQ_M(1)>;
status = "okay"; status = "okay";
};
}; };
&spi1 { &iom1 {
spi1: spi {
compatible = "ambiq,spi"; compatible = "ambiq,spi";
status = "okay"; status = "okay";
pinctrl-0 = <&spi1_default>; pinctrl-0 = <&spi1_default>;
@ -142,6 +147,7 @@
tcxo-power-startup-delay-ms = <5>; tcxo-power-startup-delay-ms = <5>;
spi-max-frequency = <DT_FREQ_M(1)>; spi-max-frequency = <DT_FREQ_M(1)>;
}; };
};
}; };
&counter0 { &counter0 {

18
drivers/i2c/i2c_ambiq.c
Unescape View File

@ -247,7 +247,6 @@ static int i2c_ambiq_write(const struct device *dev, struct i2c_msg *msg, uint16
static int i2c_ambiq_configure(const struct device *dev, uint32_t dev_config) static int i2c_ambiq_configure(const struct device *dev, uint32_t dev_config)
{ {
struct i2c_ambiq_data *data = dev->data; struct i2c_ambiq_data *data = dev->data;
const struct i2c_ambiq_config *cfg = dev->config;
if (!(I2C_MODE_CONTROLLER & dev_config)) { if (!(I2C_MODE_CONTROLLER & dev_config)) {
return -EINVAL; return -EINVAL;
@ -268,6 +267,8 @@ static int i2c_ambiq_configure(const struct device *dev, uint32_t dev_config)
} }
#ifdef CONFIG_I2C_AMBIQ_DMA #ifdef CONFIG_I2C_AMBIQ_DMA
const struct i2c_ambiq_config *cfg = dev->config;
data->iom_cfg.pNBTxnBuf = i2c_dma_tcb_buf[cfg->inst_idx].buf; data->iom_cfg.pNBTxnBuf = i2c_dma_tcb_buf[cfg->inst_idx].buf;
data->iom_cfg.ui32NBTxnBufLength = CONFIG_I2C_DMA_TCB_BUFFER_SIZE; data->iom_cfg.ui32NBTxnBufLength = CONFIG_I2C_DMA_TCB_BUFFER_SIZE;
#endif #endif
@ -287,7 +288,7 @@ static int i2c_ambiq_transfer(const struct device *dev, struct i2c_msg *msgs, ui
return 0; return 0;
} }
#ifdef CONFIG_DCACHE #if defined(CONFIG_I2C_AMBIQ_DMA) && defined(CONFIG_DCACHE)
if (!i2c_buf_set_in_nocache(msgs, num_msgs)) { if (!i2c_buf_set_in_nocache(msgs, num_msgs)) {
return -EFAULT; return -EFAULT;
} }
@ -490,17 +491,18 @@ static int i2c_ambiq_pm_action(const struct device *dev, enum pm_device_action a
PINCTRL_DT_INST_DEFINE(n); \ PINCTRL_DT_INST_DEFINE(n); \
static void i2c_irq_config_func_##n(void) \ static void i2c_irq_config_func_##n(void) \
{ \ { \
IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), i2c_ambiq_isr, \ IRQ_CONNECT(DT_IRQN(DT_INST_PARENT(n)), DT_IRQ(DT_INST_PARENT(n), priority), \
DEVICE_DT_INST_GET(n), 0); \ i2c_ambiq_isr, DEVICE_DT_INST_GET(n), 0); \
irq_enable(DT_INST_IRQN(n)); \ irq_enable(DT_IRQN(DT_INST_PARENT(n))); \
}; \ }; \
static struct i2c_ambiq_data i2c_ambiq_data##n = { \ static struct i2c_ambiq_data i2c_ambiq_data##n = { \
.bus_sem = Z_SEM_INITIALIZER(i2c_ambiq_data##n.bus_sem, 1, 1), \ .bus_sem = Z_SEM_INITIALIZER(i2c_ambiq_data##n.bus_sem, 1, 1), \
.transfer_sem = Z_SEM_INITIALIZER(i2c_ambiq_data##n.transfer_sem, 0, 1)}; \ .transfer_sem = Z_SEM_INITIALIZER(i2c_ambiq_data##n.transfer_sem, 0, 1)}; \
static const struct i2c_ambiq_config i2c_ambiq_config##n = { \ static const struct i2c_ambiq_config i2c_ambiq_config##n = { \
.base = DT_INST_REG_ADDR(n), \ .base = DT_REG_ADDR(DT_INST_PARENT(n)), \
.size = DT_INST_REG_SIZE(n), \ .size = DT_REG_SIZE(DT_INST_PARENT(n)), \
.inst_idx = (DT_INST_REG_ADDR(n) - IOM0_BASE) / (IOM1_BASE - IOM0_BASE), \ .inst_idx = \
(DT_REG_ADDR(DT_INST_PARENT(n)) - IOM0_BASE) / (IOM1_BASE - IOM0_BASE), \
.bitrate = DT_INST_PROP(n, clock_frequency), \ .bitrate = DT_INST_PROP(n, clock_frequency), \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \ .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
.irq_config_func = i2c_irq_config_func_##n, \ .irq_config_func = i2c_irq_config_func_##n, \

3
drivers/spi/spi_ambiq_bleif.c
Unescape View File

@ -165,10 +165,11 @@ static DEVICE_API(spi, spi_ambiq_driver_api) = {
static int spi_ambiq_init(const struct device *dev) static int spi_ambiq_init(const struct device *dev)
{ {
struct spi_ambiq_data *data = dev->data; struct spi_ambiq_data *data = dev->data;
const struct spi_ambiq_config *cfg = dev->config;
int ret; int ret;
#if defined(CONFIG_SPI_AMBIQ_BLEIF_TIMING_TRACE) #if defined(CONFIG_SPI_AMBIQ_BLEIF_TIMING_TRACE)
const struct spi_ambiq_config *cfg = dev->config;
ret = pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT); ret = pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT);
if (ret) { if (ret) {
return ret; return ret;

15
drivers/spi/spi_ambiq_spic.c
Unescape View File

@ -443,7 +443,7 @@ static int spi_ambiq_transceive(const struct device *dev, const struct spi_confi
return 0; return 0;
} }
#ifdef CONFIG_DCACHE #if defined(CONFIG_SPI_AMBIQ_DMA) && defined(CONFIG_DCACHE)
if ((tx_bufs != NULL && !spi_buf_set_in_nocache(tx_bufs)) || if ((tx_bufs != NULL && !spi_buf_set_in_nocache(tx_bufs)) ||
(rx_bufs != NULL && !spi_buf_set_in_nocache(rx_bufs))) { (rx_bufs != NULL && !spi_buf_set_in_nocache(rx_bufs))) {
return -EFAULT; return -EFAULT;
@ -567,18 +567,19 @@ static int spi_ambiq_pm_action(const struct device *dev, enum pm_device_action a
PINCTRL_DT_INST_DEFINE(n); \ PINCTRL_DT_INST_DEFINE(n); \
static void spi_irq_config_func_##n(void) \ static void spi_irq_config_func_##n(void) \
{ \ { \
IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), spi_ambiq_isr, \ IRQ_CONNECT(DT_IRQN(DT_INST_PARENT(n)), DT_IRQ(DT_INST_PARENT(n), priority), \
DEVICE_DT_INST_GET(n), 0); \ spi_ambiq_isr, DEVICE_DT_INST_GET(n), 0); \
irq_enable(DT_INST_IRQN(n)); \ irq_enable(DT_IRQN(DT_INST_PARENT(n))); \
}; \ }; \
static struct spi_ambiq_data spi_ambiq_data##n = { \ static struct spi_ambiq_data spi_ambiq_data##n = { \
SPI_CONTEXT_INIT_LOCK(spi_ambiq_data##n, ctx), \ SPI_CONTEXT_INIT_LOCK(spi_ambiq_data##n, ctx), \
SPI_CONTEXT_INIT_SYNC(spi_ambiq_data##n, ctx), \ SPI_CONTEXT_INIT_SYNC(spi_ambiq_data##n, ctx), \
SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(n), ctx)}; \ SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(n), ctx)}; \
static const struct spi_ambiq_config spi_ambiq_config##n = { \ static const struct spi_ambiq_config spi_ambiq_config##n = { \
.base = DT_INST_REG_ADDR(n), \ .base = DT_REG_ADDR(DT_INST_PARENT(n)), \
.size = DT_INST_REG_SIZE(n), \ .size = DT_REG_SIZE(DT_INST_PARENT(n)), \
.inst_idx = (DT_INST_REG_ADDR(n) - IOM0_BASE) / (IOM1_BASE - IOM0_BASE), \ .inst_idx = \
(DT_REG_ADDR(DT_INST_PARENT(n)) - IOM0_BASE) / (IOM1_BASE - IOM0_BASE), \
.clock_freq = DT_INST_PROP(n, clock_frequency), \ .clock_freq = DT_INST_PROP(n, clock_frequency), \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \ .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
.irq_config_func = spi_irq_config_func_##n}; \ .irq_config_func = spi_irq_config_func_##n}; \

102
dts/arm/ambiq/ambiq_apollo3_blue.dtsi
Unescape View File

@ -207,125 +207,131 @@
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
spi0: spi@50004000 { iom0: iom@50004000 {
compatible = "ambiq,spi"; compatible = "ambiq,iom";
reg = <0x50004000 0x1000>; reg = <0x50004000 0x1000>;
interrupts = <6 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <6 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
i2c {
spi1: spi@50005000 { compatible = "ambiq,i2c";
compatible = "ambiq,spi";
reg = <0x50005000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <7 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
};
iom1: iom@50005000 {
compatible = "ambiq,iom";
reg = <0x50005000 0x1000>;
interrupts = <7 0>;
spi2: spi@50006000 { spi {
compatible = "ambiq,spi"; compatible = "ambiq,spi";
reg = <0x50006000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <8 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
i2c {
spi3: spi@50007000 { compatible = "ambiq,i2c";
compatible = "ambiq,spi";
reg = <0x50007000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <9 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
};
iom2: iom@50006000 {
compatible = "ambiq,iom";
reg = <0x50006000 0x1000>;
interrupts = <8 0>;
spi4: spi@50008000 { spi {
compatible = "ambiq,spi"; compatible = "ambiq,spi";
reg = <0x50008000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <10 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
i2c {
spi5: spi@50009000 { compatible = "ambiq,i2c";
compatible = "ambiq,spi";
reg = <0x50009000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <11 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
};
i2c0: i2c@50004000 { iom3: iom@50007000 {
compatible = "ambiq,i2c"; compatible = "ambiq,iom";
reg = <0x50004000 0x1000>; reg = <0x50007000 0x1000>;
interrupts = <9 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <6 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
i2c {
i2c1: i2c@50005000 {
compatible = "ambiq,i2c"; compatible = "ambiq,i2c";
reg = <0x50005000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <7 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
};
i2c2: i2c@50006000 { iom4: iom@50008000 {
compatible = "ambiq,i2c"; compatible = "ambiq,iom";
reg = <0x50006000 0x1000>; reg = <0x50008000 0x1000>;
interrupts = <10 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <8 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
i2c {
i2c3: i2c@50007000 {
compatible = "ambiq,i2c"; compatible = "ambiq,i2c";
reg = <0x50007000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <9 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
};
i2c4: i2c@50008000 { iom5: iom@50009000 {
compatible = "ambiq,i2c"; compatible = "ambiq,iom";
reg = <0x50008000 0x1000>; reg = <0x50009000 0x1000>;
interrupts = <11 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <10 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
i2c {
i2c5: i2c@50009000 {
compatible = "ambiq,i2c"; compatible = "ambiq,i2c";
reg = <0x50009000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <11 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
};
adc0: adc@50010000 { adc0: adc@50010000 {
compatible = "ambiq,adc"; compatible = "ambiq,adc";

102
dts/arm/ambiq/ambiq_apollo3p_blue.dtsi
Unescape View File

@ -225,125 +225,131 @@
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
spi0: spi@50004000 { iom0: iom@50004000 {
compatible = "ambiq,spi"; compatible = "ambiq,iom";
reg = <0x50004000 0x1000>; reg = <0x50004000 0x1000>;
interrupts = <6 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <6 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
i2c {
spi1: spi@50005000 { compatible = "ambiq,i2c";
compatible = "ambiq,spi";
reg = <0x50005000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <7 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
};
iom1: iom@50005000 {
compatible = "ambiq,iom";
reg = <0x50005000 0x1000>;
interrupts = <7 0>;
spi2: spi@50006000 { spi {
compatible = "ambiq,spi"; compatible = "ambiq,spi";
reg = <0x50006000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <8 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
i2c {
spi3: spi@50007000 { compatible = "ambiq,i2c";
compatible = "ambiq,spi";
reg = <0x50007000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <9 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
};
iom2: iom@50006000 {
compatible = "ambiq,iom";
reg = <0x50006000 0x1000>;
interrupts = <8 0>;
spi4: spi@50008000 { spi {
compatible = "ambiq,spi"; compatible = "ambiq,spi";
reg = <0x50008000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <10 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
i2c {
spi5: spi@50009000 { compatible = "ambiq,i2c";
compatible = "ambiq,spi";
reg = <0x50009000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <11 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
};
i2c0: i2c@50004000 { iom3: iom@50007000 {
compatible = "ambiq,i2c"; compatible = "ambiq,iom";
reg = <0x50004000 0x1000>; reg = <0x50007000 0x1000>;
interrupts = <9 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <6 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
i2c {
i2c1: i2c@50005000 {
compatible = "ambiq,i2c"; compatible = "ambiq,i2c";
reg = <0x50005000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <7 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
};
i2c2: i2c@50006000 { iom4: iom@50008000 {
compatible = "ambiq,i2c"; compatible = "ambiq,iom";
reg = <0x50006000 0x1000>; reg = <0x50008000 0x1000>;
interrupts = <10 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <8 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
i2c {
i2c3: i2c@50007000 {
compatible = "ambiq,i2c"; compatible = "ambiq,i2c";
reg = <0x50007000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <9 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
};
i2c4: i2c@50008000 { iom5: iom@50009000 {
compatible = "ambiq,i2c"; compatible = "ambiq,iom";
reg = <0x50008000 0x1000>; reg = <0x50009000 0x1000>;
interrupts = <11 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <10 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
i2c {
i2c5: i2c@50009000 {
compatible = "ambiq,i2c"; compatible = "ambiq,i2c";
reg = <0x50009000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <11 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto; zephyr,pm-device-runtime-auto;
}; };
};
adc0: adc@50010000 { adc0: adc@50010000 {
compatible = "ambiq,adc"; compatible = "ambiq,adc";

137
dts/arm/ambiq/ambiq_apollo4p.dtsi
Unescape View File

@ -123,6 +123,7 @@
clocks = <&uartclk>; clocks = <&uartclk>;
ambiq,pwrcfg = <&pwrcfg 0x4 0x200>; ambiq,pwrcfg = <&pwrcfg 0x4 0x200>;
}; };
uart1: uart@4001d000 { uart1: uart@4001d000 {
compatible = "ambiq,uart", "arm,pl011"; compatible = "ambiq,uart", "arm,pl011";
reg = <0x4001d000 0x1000>; reg = <0x4001d000 0x1000>;
@ -153,148 +154,172 @@
ambiq,pwrcfg = <&pwrcfg 0x4 0x1000>; ambiq,pwrcfg = <&pwrcfg 0x4 0x1000>;
}; };
iom0_spi: spi@40050000 { iom0: iom@40050000 {
compatible = "ambiq,spi"; compatible = "ambiq,iom";
reg = <0x40050000 0x1000>; reg = <0x40050000 0x1000>;
interrupts = <6 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <6 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
}; };
i2c {
iom0_i2c: i2c@40050000 {
compatible = "ambiq,i2c"; compatible = "ambiq,i2c";
reg = <0x40050000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <6 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
};
}; };
iom1_spi: spi@40051000 { iom1: iom@40051000 {
compatible = "ambiq,spi"; compatible = "ambiq,iom";
reg = <0x40051000 0x1000>; reg = <0x40051000 0x1000>;
interrupts = <7 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <7 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
}; };
i2c {
iom1_i2c: i2c@40051000 {
compatible = "ambiq,i2c"; compatible = "ambiq,i2c";
reg = <0x40051000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <7 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
};
}; };
iom2_spi: spi@40052000 { iom2: iom@40052000 {
compatible = "ambiq,spi"; compatible = "ambiq,iom";
reg = <0x40052000 0x1000>; reg = <0x40052000 0x1000>;
interrupts = <8 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <8 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
}; };
i2c {
iom2_i2c: i2c@40052000 {
compatible = "ambiq,i2c"; compatible = "ambiq,i2c";
reg = <0x40052000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <8 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
};
}; };
iom3_spi: spi@40053000 { iom3: iom@40053000 {
compatible = "ambiq,spi"; compatible = "ambiq,iom";
reg = <0x40053000 0x1000>; reg = <0x40053000 0x1000>;
interrupts = <9 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <9 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
}; };
i2c {
iom3_i2c: i2c@40053000 {
compatible = "ambiq,i2c"; compatible = "ambiq,i2c";
reg = <0x40053000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <9 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
};
}; };
iom4_spi: spi@40054000 { iom4: iom@40054000 {
compatible = "ambiq,spi"; compatible = "ambiq,iom";
reg = <0x40054000 0x1000>; reg = <0x40054000 0x1000>;
interrupts = <10 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <10 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
}; };
i2c {
iom4_i2c: i2c@40054000 {
compatible = "ambiq,i2c"; compatible = "ambiq,i2c";
reg = <0x40054000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <10 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
};
}; };
iom5_spi: spi@40055000 { iom5: iom@40055000 {
compatible = "ambiq,spi"; compatible = "ambiq,iom";
reg = <0x40055000 0x1000>; reg = <0x40055000 0x1000>;
interrupts = <11 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <11 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
}; };
i2c {
iom5_i2c: i2c@40055000 {
compatible = "ambiq,i2c"; compatible = "ambiq,i2c";
reg = <0x40055000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <11 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
};
}; };
iom6_spi: spi@40056000 { iom6: iom@40056000 {
compatible = "ambiq,spi"; compatible = "ambiq,iom";
reg = <0x40056000 0x1000>; reg = <0x40056000 0x1000>;
interrupts = <12 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <12 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
}; };
i2c {
iom6_i2c: i2c@40056000 {
compatible = "ambiq,i2c"; compatible = "ambiq,i2c";
reg = <0x40056000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <12 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
};
}; };
iom7_spi: spi@40057000 { iom7: iom@40057000 {
compatible = "ambiq,spi"; compatible = "ambiq,iom";
reg = <0x40057000 0x1000>; reg = <0x40057000 0x1000>;
interrupts = <13 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <13 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
}; };
i2c {
iom7_i2c: i2c@40057000 {
compatible = "ambiq,i2c"; compatible = "ambiq,i2c";
reg = <0x40057000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <13 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
};
}; };
adc0: adc@40038000 { adc0: adc@40038000 {

168
dts/arm/ambiq/ambiq_apollo4p_blue.dtsi
Unescape View File

@ -134,160 +134,176 @@
ambiq,pwrcfg = <&pwrcfg 0x4 0x1000>; ambiq,pwrcfg = <&pwrcfg 0x4 0x1000>;
}; };
spi0: spi@40050000 { iom0: iom@40050000 {
compatible = "ambiq,spi"; compatible = "ambiq,iom";
reg = <0x40050000 0x1000>; reg = <0x40050000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <6 0>; interrupts = <6 0>;
status = "disabled";
};
spi1: spi@40051000 { spi {
compatible = "ambiq,spi"; compatible = "ambiq,spi";
reg = <0x40051000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <7 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
}; };
i2c {
spi2: spi@40052000 { compatible = "ambiq,i2c";
compatible = "ambiq,spi";
reg = <0x40052000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <8 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
};
}; };
spi3: spi@40053000 { iom1: iom@40051000 {
compatible = "ambiq,iom";
reg = <0x40051000 0x1000>;
interrupts = <7 0>;
spi {
compatible = "ambiq,spi"; compatible = "ambiq,spi";
reg = <0x40053000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <9 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
}; };
i2c {
spi4: spi@40054000 { compatible = "ambiq,i2c";
/* IOM4 works as SPI and is wired internally for BLE HCI. */
compatible = "ambiq,spi";
reg = <0x40054000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <10 0>;
cs-gpios = <&gpio32_63 22 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
clock-frequency = <DT_FREQ_M(24)>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
bt_hci_apollo: bt-hci@0 {
compatible = "ambiq,bt-hci-spi";
reg = <0>;
spi-max-frequency = <DT_FREQ_M(24)>;
irq-gpios = <&gpio32_63 21 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio32_63 23 GPIO_ACTIVE_LOW>;
clkreq-gpios = <&gpio32_63 20 GPIO_ACTIVE_HIGH>;
}; };
}; };
spi5: spi@40055000 { iom2: iom@40052000 {
compatible = "ambiq,iom";
reg = <0x40052000 0x1000>;
interrupts = <8 0>;
spi {
compatible = "ambiq,spi"; compatible = "ambiq,spi";
reg = <0x40055000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <11 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
}; };
i2c {
spi6: spi@40056000 { compatible = "ambiq,i2c";
compatible = "ambiq,spi";
reg = <0x40056000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <12 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
};
}; };
spi7: spi@40057000 { iom3: iom@40053000 {
compatible = "ambiq,iom";
reg = <0x40053000 0x1000>;
interrupts = <9 0>;
spi {
compatible = "ambiq,spi"; compatible = "ambiq,spi";
reg = <0x40057000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <13 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
}; };
i2c {
i2c0: i2c@40050000 {
compatible = "ambiq,i2c"; compatible = "ambiq,i2c";
reg = <0x40050000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <6 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
};
}; };
i2c1: i2c@40051000 { iom4: iom@40054000 {
compatible = "ambiq,i2c"; compatible = "ambiq,iom";
reg = <0x40051000 0x1000>; reg = <0x40054000 0x1000>;
interrupts = <10 0>;
/* IOM4 works as SPI and is wired internally for BLE HCI. */
spi {
compatible = "ambiq,spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <7 0>; cs-gpios = <&gpio32_63 22 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
clock-frequency = <DT_FREQ_M(24)>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
bt_hci_apollo: bt-hci@0 {
compatible = "ambiq,bt-hci-spi";
reg = <0>;
spi-max-frequency = <DT_FREQ_M(24)>;
irq-gpios = <&gpio32_63 21 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio32_63 23 GPIO_ACTIVE_LOW>;
clkreq-gpios = <&gpio32_63 20 GPIO_ACTIVE_HIGH>;
};
};
}; };
i2c2: i2c@40052000 { iom5: iom@40055000 {
compatible = "ambiq,i2c"; compatible = "ambiq,iom";
reg = <0x40052000 0x1000>; reg = <0x40055000 0x1000>;
interrupts = <11 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <8 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
}; };
i2c {
i2c3: i2c@40053000 {
compatible = "ambiq,i2c"; compatible = "ambiq,i2c";
reg = <0x40053000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <9 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
};
}; };
i2c4: i2c@40054000 { iom6: iom@40056000 {
compatible = "ambiq,i2c"; compatible = "ambiq,iom";
reg = <0x40054000 0x1000>; reg = <0x40056000 0x1000>;
interrupts = <12 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <10 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
}; };
i2c {
i2c5: i2c@40055000 {
compatible = "ambiq,i2c"; compatible = "ambiq,i2c";
reg = <0x40055000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <11 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
};
}; };
i2c6: i2c@40056000 { iom7: iom@40057000 {
compatible = "ambiq,i2c"; compatible = "ambiq,iom";
reg = <0x40056000 0x1000>; reg = <0x40057000 0x1000>;
interrupts = <13 0>;
spi {
compatible = "ambiq,spi";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <12 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
}; };
i2c {
i2c7: i2c@40057000 {
compatible = "ambiq,i2c"; compatible = "ambiq,i2c";
reg = <0x40057000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <13 0>;
status = "disabled"; status = "disabled";
zephyr,pm-device-runtime-auto;
};
}; };
mspi0: spi@40060000 { mspi0: spi@40060000 {

6
dts/bindings/i2c/ambiq,i2c.yaml
Unescape View File

@ -8,12 +8,6 @@ compatible: "ambiq,i2c"
include: [i2c-controller.yaml, pinctrl-device.yaml] include: [i2c-controller.yaml, pinctrl-device.yaml]
properties: properties:
reg:
required: true
interrupts:
required: true
scl-gpios: scl-gpios:
type: phandle-array type: phandle-array
description: | description: |

15
dts/bindings/mfd/ambiq,iom.yaml
Unescape View File

@ -0,0 +1,15 @@
# Copyright (c) 2025 Ambiq Micro Inc.
# SPDX-License-Identifier: Apache-2.0
description: Ambiq SPI/I2C controller common properties
compatible: "ambiq,iom"
include: [base.yaml]
properties:
reg:
required: true
interrupts:
required: true

10
dts/bindings/spi/ambiq,spi.yaml
Unescape View File

@ -6,13 +6,3 @@ description: Ambiq SPI
compatible: "ambiq,spi" compatible: "ambiq,spi"
include: [spi-controller.yaml, pinctrl-device.yaml] include: [spi-controller.yaml, pinctrl-device.yaml]
properties:
reg:
required: true
interrupts:
required: true
clock-frequency:
required: true

Write Preview
Loading…
Cancel
Save