Browse Source

boards: nrf*_bsim: Convert to HW model v2

With a new board.yml file and reorganizing their
Kconfig options.

Note: the nrf5340 variants remain as their own
targets, instead of being variants of the base ones
to avoid breakage in this commit
(while not having a massime commit)

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
pull/69687/head
Alberto Escolar Piedras 1 year ago committed by Carles Cufi
parent
commit
614611a528
  1. 31
      boards/boards_legacy/posix/nrf_bsim/Kconfig.board
  2. 2
      boards/native/nrf_bsim/CMakeLists.txt
  3. 37
      boards/native/nrf_bsim/Kconfig
  4. 0
      boards/native/nrf_bsim/Kconfig.defconfig
  5. 5
      boards/native/nrf_bsim/Kconfig.nrf52_bsim
  6. 5
      boards/native/nrf_bsim/Kconfig.nrf5340bsim_nrf5340_cpuapp
  7. 5
      boards/native/nrf_bsim/Kconfig.nrf5340bsim_nrf5340_cpunet
  8. 0
      boards/native/nrf_bsim/argparse.c
  9. 0
      boards/native/nrf_bsim/argparse.h
  10. 0
      boards/native/nrf_bsim/board.cmake
  11. 13
      boards/native/nrf_bsim/board.yml
  12. 0
      boards/native/nrf_bsim/board_irq.h
  13. 0
      boards/native/nrf_bsim/board_soc.h
  14. 0
      boards/native/nrf_bsim/common/README.txt
  15. 0
      boards/native/nrf_bsim/common/bsim_args_runner.c
  16. 0
      boards/native/nrf_bsim/common/bsim_args_runner.h
  17. 0
      boards/native/nrf_bsim/common/bsim_extra_cpu_if_stubs.c
  18. 0
      boards/native/nrf_bsim/common/bstests.h
  19. 0
      boards/native/nrf_bsim/common/bstests_entry.c
  20. 0
      boards/native/nrf_bsim/common/cmdline.h
  21. 0
      boards/native/nrf_bsim/common/cmsis/cmsis.c
  22. 0
      boards/native/nrf_bsim/common/cmsis/cmsis.h
  23. 0
      boards/native/nrf_bsim/common/cmsis/cmsis_compiler.h
  24. 0
      boards/native/nrf_bsim/common/cmsis/cmsis_instr.h
  25. 0
      boards/native/nrf_bsim/common/phy_sync_ctrl.c
  26. 0
      boards/native/nrf_bsim/common/phy_sync_ctrl.h
  27. 0
      boards/native/nrf_bsim/common/posix_arch_if.c
  28. 0
      boards/native/nrf_bsim/common/runner_hooks.c
  29. 0
      boards/native/nrf_bsim/common/trace_hook.c
  30. 0
      boards/native/nrf_bsim/cpu_wait.c
  31. 0
      boards/native/nrf_bsim/doc/nrf52_bsim.rst
  32. 0
      boards/native/nrf_bsim/doc/nrf5340bsim.rst
  33. 0
      boards/native/nrf_bsim/ipc_backend.c
  34. 0
      boards/native/nrf_bsim/irq_handler.c
  35. 2
      boards/native/nrf_bsim/nrf52_bsim.dts
  36. 0
      boards/native/nrf_bsim/nrf52_bsim.yaml
  37. 3
      boards/native/nrf_bsim/nrf52_bsim_defconfig
  38. 2
      boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpuapp.dts
  39. 0
      boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpuapp.yaml
  40. 2
      boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpuapp_defconfig
  41. 2
      boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpunet.dts
  42. 0
      boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpunet.yaml
  43. 2
      boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpunet_defconfig
  44. 0
      boards/native/nrf_bsim/nsi_if.c
  45. 0
      boards/native/nrf_bsim/pre_dt_board.cmake
  46. 0
      boards/native/nrf_bsim/soc/nrfx_coredep.c
  47. 0
      boards/native/nrf_bsim/soc/pinctrl_soc.h
  48. 0
      boards/native/nrf_bsim/soc/soc_nrf_common.h
  49. 0
      boards/native/nrf_bsim/soc/soc_secure.h
  50. 0
      boards/native/nrf_bsim/time_machine.h

31
boards/boards_legacy/posix/nrf_bsim/Kconfig.board

@ -1,31 +0,0 @@ @@ -1,31 +0,0 @@
# SPDX-License-Identifier: Apache-2.0
config BOARD_NRF52_BSIM
bool "NRF52 simulation model"
select SOC_SERIES_BSIM_NRF52X
select SOC_COMPATIBLE_NRF52833
select NRF_RTC_TIMER
select CLOCK_CONTROL
help
Will produce a console Linux process which can be executed natively.
It needs the BabbleSim simulator both in compile time and to execute
config BOARD_NRF5340BSIM_NRF5340_CPUNET
bool "Simulated NRF53 Network core"
select SOC_SERIES_BSIM_NRF53X
select SOC_COMPATIBLE_NRF5340_CPUNET
select NRF_RTC_TIMER
select CLOCK_CONTROL
help
Will produce a console Linux process which can be executed natively.
It needs the BabbleSim simulator both in compile time and to execute
config BOARD_NRF5340BSIM_NRF5340_CPUAPP
bool "Simulated NRF53 Application core"
select SOC_SERIES_BSIM_NRF53X
select SOC_COMPATIBLE_NRF5340_CPUAPP
select NRF_RTC_TIMER
select CLOCK_CONTROL
help
Will produce a console Linux process which can be executed natively.
It needs the BabbleSim simulator both in compile time and to execute

2
boards/boards_legacy/posix/nrf_bsim/CMakeLists.txt → boards/native/nrf_bsim/CMakeLists.txt

@ -73,7 +73,7 @@ set_property(TARGET native_simulator APPEND PROPERTY RUNNER_LINK_LIBRARIES @@ -73,7 +73,7 @@ set_property(TARGET native_simulator APPEND PROPERTY RUNNER_LINK_LIBRARIES
target_compile_options(native_simulator INTERFACE
"-DNSI_PRIMARY_MCU_N=${CONFIG_NATIVE_SIMULATOR_PRIMARY_MCU_INDEX}")
add_subdirectory(${ZEPHYR_BASE}/boards/boards_legacy/${ARCH}/common/extra_args/
add_subdirectory(${ZEPHYR_BASE}/boards/native/common/extra_args/
${CMAKE_CURRENT_BINARY_DIR}/extra_args
)

37
boards/boards_legacy/posix/nrf_bsim/Kconfig → boards/native/nrf_bsim/Kconfig

@ -1,5 +1,40 @@ @@ -1,5 +1,40 @@
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
config BOARD_NRF52_BSIM
bool
select SOC_SERIES_BSIM_NRF52X
select SOC_COMPATIBLE_NRF52833
select NRF_RTC_TIMER
select CLOCK_CONTROL
help
NRF52 simulation model
Will produce a console Linux process which can be executed natively.
It needs the BabbleSim simulator both in compile time and to execute
config BOARD_NRF5340BSIM_NRF5340_CPUNET
bool
select SOC_SERIES_BSIM_NRF53X
select SOC_COMPATIBLE_NRF5340_CPUNET
select NRF_RTC_TIMER
select CLOCK_CONTROL
help
Simulated NRF53 Network core
Will produce a console Linux process which can be executed natively.
It needs the BabbleSim simulator both in compile time and to execute
config BOARD_NRF5340BSIM_NRF5340_CPUAPP
bool
select SOC_SERIES_BSIM_NRF53X
select SOC_COMPATIBLE_NRF5340_CPUAPP
select NRF_RTC_TIMER
select CLOCK_CONTROL
help
Simulated NRF53 Application core
Will produce a console Linux process which can be executed natively.
It needs the BabbleSim simulator both in compile time and to execute
if SOC_SERIES_BSIM_NRFXX
# The following file is normally parsed only for the ARM architecture, which is
@ -8,7 +43,7 @@ if SOC_SERIES_BSIM_NRFXX @@ -8,7 +43,7 @@ if SOC_SERIES_BSIM_NRFXX
# must be read also from here.
source "soc/nordic_nrf/common/Kconfig.peripherals"
source "boards/boards_legacy/$(ARCH)/common/extra_args/Kconfig"
source "boards/native/common/extra_args/Kconfig"
endif # SOC_SERIES_BSIM_NRFXX

0
boards/boards_legacy/posix/nrf_bsim/Kconfig.defconfig → boards/native/nrf_bsim/Kconfig.defconfig

5
boards/native/nrf_bsim/Kconfig.nrf52_bsim

@ -0,0 +1,5 @@ @@ -0,0 +1,5 @@
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
config BOARD_NRF52_BSIM
select SOC_POSIX

5
boards/native/nrf_bsim/Kconfig.nrf5340bsim_nrf5340_cpuapp

@ -0,0 +1,5 @@ @@ -0,0 +1,5 @@
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
config BOARD_NRF5340BSIM_NRF5340_CPUAPP
select SOC_POSIX

5
boards/native/nrf_bsim/Kconfig.nrf5340bsim_nrf5340_cpunet

@ -0,0 +1,5 @@ @@ -0,0 +1,5 @@
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
config BOARD_NRF5340BSIM_NRF5340_CPUNET
select SOC_POSIX

0
boards/boards_legacy/posix/nrf_bsim/argparse.c → boards/native/nrf_bsim/argparse.c

0
boards/boards_legacy/posix/nrf_bsim/argparse.h → boards/native/nrf_bsim/argparse.h

0
boards/boards_legacy/posix/nrf_bsim/board.cmake → boards/native/nrf_bsim/board.cmake

13
boards/native/nrf_bsim/board.yml

@ -0,0 +1,13 @@ @@ -0,0 +1,13 @@
boards:
- name: nrf52_bsim
vendor: Zephyr
socs:
- name: native
- name: nrf5340bsim_nrf5340_cpuapp
vendor: Zephyr
socs:
- name: native
- name: nrf5340bsim_nrf5340_cpunet
vendor: Zephyr
socs:
- name: native

0
boards/boards_legacy/posix/nrf_bsim/board_irq.h → boards/native/nrf_bsim/board_irq.h

0
boards/boards_legacy/posix/nrf_bsim/board_soc.h → boards/native/nrf_bsim/board_soc.h

0
boards/boards_legacy/posix/nrf_bsim/common/README.txt → boards/native/nrf_bsim/common/README.txt

0
boards/boards_legacy/posix/nrf_bsim/common/bsim_args_runner.c → boards/native/nrf_bsim/common/bsim_args_runner.c

0
boards/boards_legacy/posix/nrf_bsim/common/bsim_args_runner.h → boards/native/nrf_bsim/common/bsim_args_runner.h

0
boards/boards_legacy/posix/nrf_bsim/common/bsim_extra_cpu_if_stubs.c → boards/native/nrf_bsim/common/bsim_extra_cpu_if_stubs.c

0
boards/boards_legacy/posix/nrf_bsim/common/bstests.h → boards/native/nrf_bsim/common/bstests.h

0
boards/boards_legacy/posix/nrf_bsim/common/bstests_entry.c → boards/native/nrf_bsim/common/bstests_entry.c

0
boards/boards_legacy/posix/nrf_bsim/common/cmdline.h → boards/native/nrf_bsim/common/cmdline.h

0
boards/boards_legacy/posix/nrf_bsim/common/cmsis/cmsis.c → boards/native/nrf_bsim/common/cmsis/cmsis.c

0
boards/boards_legacy/posix/nrf_bsim/common/cmsis/cmsis.h → boards/native/nrf_bsim/common/cmsis/cmsis.h

0
boards/boards_legacy/posix/nrf_bsim/common/cmsis/cmsis_compiler.h → boards/native/nrf_bsim/common/cmsis/cmsis_compiler.h

0
boards/boards_legacy/posix/nrf_bsim/common/cmsis/cmsis_instr.h → boards/native/nrf_bsim/common/cmsis/cmsis_instr.h

0
boards/boards_legacy/posix/nrf_bsim/common/phy_sync_ctrl.c → boards/native/nrf_bsim/common/phy_sync_ctrl.c

0
boards/boards_legacy/posix/nrf_bsim/common/phy_sync_ctrl.h → boards/native/nrf_bsim/common/phy_sync_ctrl.h

0
boards/boards_legacy/posix/nrf_bsim/common/posix_arch_if.c → boards/native/nrf_bsim/common/posix_arch_if.c

0
boards/boards_legacy/posix/nrf_bsim/common/runner_hooks.c → boards/native/nrf_bsim/common/runner_hooks.c

0
boards/boards_legacy/posix/nrf_bsim/common/trace_hook.c → boards/native/nrf_bsim/common/trace_hook.c

0
boards/boards_legacy/posix/nrf_bsim/cpu_wait.c → boards/native/nrf_bsim/cpu_wait.c

0
boards/boards_legacy/posix/nrf_bsim/doc/nrf52_bsim.rst → boards/native/nrf_bsim/doc/nrf52_bsim.rst

0
boards/boards_legacy/posix/nrf_bsim/doc/nrf5340bsim.rst → boards/native/nrf_bsim/doc/nrf5340bsim.rst

0
boards/boards_legacy/posix/nrf_bsim/ipc_backend.c → boards/native/nrf_bsim/ipc_backend.c

0
boards/boards_legacy/posix/nrf_bsim/irq_handler.c → boards/native/nrf_bsim/irq_handler.c

2
boards/boards_legacy/posix/nrf_bsim/nrf52_bsim.dts → boards/native/nrf_bsim/nrf52_bsim.dts

@ -10,7 +10,7 @@ @@ -10,7 +10,7 @@
#include <mem.h>
#include <arm/nordic/nrf52833.dtsi>
/* We resuse the pinctrl definitions directly from the real board : */
#include <../boards/boards_legacy/arm/nrf52833dk_nrf52833/nrf52833dk_nrf52833-pinctrl.dtsi>
#include <../boards/nordic_nrf/nrf52833dk/nrf52833dk_nrf52833-pinctrl.dtsi>
/ {
model = "nrf52 bsim";

0
boards/boards_legacy/posix/nrf_bsim/nrf52_bsim.yaml → boards/native/nrf_bsim/nrf52_bsim.yaml

3
boards/boards_legacy/posix/nrf_bsim/nrf52_bsim_defconfig → boards/native/nrf_bsim/nrf52_bsim_defconfig

@ -1,7 +1,6 @@ @@ -1,7 +1,6 @@
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
CONFIG_SOC_POSIX=y
CONFIG_BOARD_NRF52_BSIM=y
CONFIG_CONSOLE=y
CONFIG_NO_OPTIMIZATIONS=y
CONFIG_LOG_BACKEND_UART=n

2
boards/boards_legacy/posix/nrf_bsim/nrf5340bsim_nrf5340_cpuapp.dts → boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpuapp.dts

@ -115,4 +115,4 @@ @@ -115,4 +115,4 @@
/* We re-use the IPC shared buffer definition from the real HW. But note the start address of the
* buffer won't be used.
*/
#include <../boards/board_legacy/arm/nrf5340dk_nrf5340/nrf5340_shared_sram_planning_conf.dtsi>
#include <../boards/nordic_nrf/nrf5340dk/nrf5340_shared_sram_planning_conf.dtsi>

0
boards/boards_legacy/posix/nrf_bsim/nrf5340bsim_nrf5340_cpuapp.yaml → boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpuapp.yaml

2
boards/boards_legacy/posix/nrf_bsim/nrf5340bsim_nrf5340_cpuapp_defconfig → boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpuapp_defconfig

@ -1,6 +1,4 @@ @@ -1,6 +1,4 @@
# SPDX-License-Identifier: Apache-2.0
CONFIG_SOC_POSIX=y
CONFIG_BOARD_NRF5340BSIM_NRF5340_CPUAPP=y
CONFIG_CONSOLE=y
CONFIG_NO_OPTIMIZATIONS=y

2
boards/boards_legacy/posix/nrf_bsim/nrf5340bsim_nrf5340_cpunet.dts → boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpunet.dts

@ -77,4 +77,4 @@ @@ -77,4 +77,4 @@
/* We re-use the IPC shared buffer definition from the real HW. But note the start address of the
* buffer won't be used.
*/
#include <../boards/boards_legacy/arm/nrf5340dk_nrf5340/nrf5340_shared_sram_planning_conf.dtsi>
#include <../boards/nordic_nrf/nrf5340dk/nrf5340_shared_sram_planning_conf.dtsi>

0
boards/boards_legacy/posix/nrf_bsim/nrf5340bsim_nrf5340_cpunet.yaml → boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpunet.yaml

2
boards/boards_legacy/posix/nrf_bsim/nrf5340bsim_nrf5340_cpunet_defconfig → boards/native/nrf_bsim/nrf5340bsim_nrf5340_cpunet_defconfig

@ -1,6 +1,4 @@ @@ -1,6 +1,4 @@
# SPDX-License-Identifier: Apache-2.0
CONFIG_SOC_POSIX=y
CONFIG_BOARD_NRF5340BSIM_NRF5340_CPUNET=y
CONFIG_CONSOLE=y
CONFIG_NO_OPTIMIZATIONS=y

0
boards/boards_legacy/posix/nrf_bsim/nsi_if.c → boards/native/nrf_bsim/nsi_if.c

0
boards/boards_legacy/posix/nrf_bsim/pre_dt_board.cmake → boards/native/nrf_bsim/pre_dt_board.cmake

0
boards/boards_legacy/posix/nrf_bsim/soc/nrfx_coredep.c → boards/native/nrf_bsim/soc/nrfx_coredep.c

0
boards/boards_legacy/posix/nrf_bsim/soc/pinctrl_soc.h → boards/native/nrf_bsim/soc/pinctrl_soc.h

0
boards/boards_legacy/posix/nrf_bsim/soc/soc_nrf_common.h → boards/native/nrf_bsim/soc/soc_nrf_common.h

0
boards/boards_legacy/posix/nrf_bsim/soc/soc_secure.h → boards/native/nrf_bsim/soc/soc_secure.h

0
boards/boards_legacy/posix/nrf_bsim/time_machine.h → boards/native/nrf_bsim/time_machine.h

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