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dts: arm: Blanket remove all usages of arm,num-mpu-regions

This removes all occurrences of arm,num-mpu-regions relying on the value
reported by the register instead.
A user may still define this property if they need to have a compile time
definition for it.

Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
pull/66022/head
Wilfried Chauveau 2 years ago committed by Fabio Baltieri
parent
commit
5b3d4598a7
  1. 1
      boards/arm/arty/arty_a7_arm_designstart_m3.dts
  2. 1
      boards/arm/mps2_an521/mps2_an521_ns.dts
  3. 1
      boards/arm/mps2_an521/mps2_an521_remote.dts
  4. 1
      boards/arm/mps3_an547/mps3_an547.dts
  5. 1
      boards/arm/mps3_an547/mps3_an547_ns.dts
  6. 1
      boards/arm/scobc_module1/scobc_module1.dts
  7. 1
      boards/arm/v2m_musca_b1/v2m_musca_b1.dts
  8. 1
      boards/arm/v2m_musca_b1/v2m_musca_b1_ns.dts
  9. 1
      boards/arm/v2m_musca_s1/v2m_musca_s1.dts
  10. 1
      boards/arm/v2m_musca_s1/v2m_musca_s1_ns.dts
  11. 1
      dts/arm/atmel/sam4e.dtsi
  12. 1
      dts/arm/atmel/sam4l.dtsi
  13. 1
      dts/arm/atmel/sam4s.dtsi
  14. 1
      dts/arm/atmel/samd5x.dtsi
  15. 1
      dts/arm/atmel/same70.dtsi
  16. 1
      dts/arm/broadcom/valkyrie.dtsi
  17. 1
      dts/arm/broadcom/viper-m7.dtsi
  18. 1
      dts/arm/gigadevice/gd32a50x/gd32a50x.dtsi
  19. 1
      dts/arm/gigadevice/gd32e50x/gd32e50x.dtsi
  20. 1
      dts/arm/gigadevice/gd32f403/gd32f403.dtsi
  21. 1
      dts/arm/gigadevice/gd32f4xx/gd32f4xx.dtsi
  22. 4
      dts/arm/nordic/nrf5340_cpuapp_qkaa.dtsi
  23. 4
      dts/arm/nordic/nrf5340_cpuappns_qkaa.dtsi
  24. 4
      dts/arm/nordic/nrf5340_cpunet_qkaa.dtsi
  25. 1
      dts/arm/nordic/nrf91.dtsi
  26. 1
      dts/arm/nordic/nrf91ns.dtsi
  27. 1
      dts/arm/nxp/nxp_imx8ml_m7.dtsi
  28. 1
      dts/arm/nxp/nxp_lpc55S0x_common.dtsi
  29. 1
      dts/arm/nxp/nxp_lpc55S1x_common.dtsi
  30. 1
      dts/arm/nxp/nxp_lpc55S2x_common.dtsi
  31. 1
      dts/arm/nxp/nxp_lpc55S3x_common.dtsi
  32. 1
      dts/arm/nxp/nxp_lpc55S6x_common.dtsi
  33. 1
      dts/arm/nxp/nxp_rt10xx.dtsi
  34. 2
      dts/arm/nxp/nxp_rt11xx.dtsi
  35. 1
      dts/arm/nxp/nxp_rt5xx_common.dtsi
  36. 1
      dts/arm/nxp/nxp_rt6xx_common.dtsi
  37. 1
      dts/arm/nxp/nxp_s32k344_m7.dtsi
  38. 1
      dts/arm/quicklogic/quicklogic_eos_s3.dtsi
  39. 1
      dts/arm/silabs/efr32mg21.dtsi
  40. 1
      dts/arm/st/f7/stm32f7.dtsi
  41. 1
      dts/arm/st/h5/stm32h5.dtsi
  42. 1
      dts/arm/st/h7/stm32h7.dtsi
  43. 1
      dts/arm/st/l5/stm32l5.dtsi
  44. 1
      dts/arm/st/u5/stm32u5.dtsi
  45. 1
      dts/arm/st/wba/stm32wba.dtsi

1
boards/arm/arty/arty_a7_arm_designstart_m3.dts

@ -25,7 +25,6 @@ @@ -25,7 +25,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

1
boards/arm/mps2_an521/mps2_an521_ns.dts

@ -71,7 +71,6 @@ @@ -71,7 +71,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <16>;
};
};
};

1
boards/arm/mps2_an521/mps2_an521_remote.dts

@ -71,7 +71,6 @@ @@ -71,7 +71,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <16>;
};
};
};

1
boards/arm/mps3_an547/mps3_an547.dts

@ -118,7 +118,6 @@ @@ -118,7 +118,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8.1m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <16>;
};
};
};

1
boards/arm/mps3_an547/mps3_an547_ns.dts

@ -70,7 +70,6 @@ @@ -70,7 +70,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8.1m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <16>;
};
};
};

1
boards/arm/scobc_module1/scobc_module1.dts

@ -31,7 +31,6 @@ @@ -31,7 +31,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

1
boards/arm/v2m_musca_b1/v2m_musca_b1.dts

@ -56,7 +56,6 @@ @@ -56,7 +56,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

1
boards/arm/v2m_musca_b1/v2m_musca_b1_ns.dts

@ -37,7 +37,6 @@ @@ -37,7 +37,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

1
boards/arm/v2m_musca_s1/v2m_musca_s1.dts

@ -56,7 +56,6 @@ @@ -56,7 +56,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

1
boards/arm/v2m_musca_s1/v2m_musca_s1_ns.dts

@ -37,7 +37,6 @@ @@ -37,7 +37,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

1
dts/arm/atmel/sam4e.dtsi

@ -33,7 +33,6 @@ @@ -33,7 +33,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

1
dts/arm/atmel/sam4l.dtsi

@ -29,7 +29,6 @@ @@ -29,7 +29,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

1
dts/arm/atmel/sam4s.dtsi

@ -35,7 +35,6 @@ @@ -35,7 +35,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

1
dts/arm/atmel/samd5x.dtsi

@ -29,7 +29,6 @@ @@ -29,7 +29,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

1
dts/arm/atmel/same70.dtsi

@ -39,7 +39,6 @@ @@ -39,7 +39,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <16>;
};
};
};

1
dts/arm/broadcom/valkyrie.dtsi

@ -21,7 +21,6 @@ @@ -21,7 +21,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <16>;
};
};
};

1
dts/arm/broadcom/viper-m7.dtsi

@ -23,7 +23,6 @@ @@ -23,7 +23,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <16>;
};
};
};

1
dts/arm/gigadevice/gd32a50x/gd32a50x.dtsi

@ -28,7 +28,6 @@ @@ -28,7 +28,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

1
dts/arm/gigadevice/gd32e50x/gd32e50x.dtsi

@ -74,7 +74,6 @@ @@ -74,7 +74,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
usart0: usart@40013800 {

1
dts/arm/gigadevice/gd32f403/gd32f403.dtsi

@ -28,7 +28,6 @@ @@ -28,7 +28,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

1
dts/arm/gigadevice/gd32f4xx/gd32f4xx.dtsi

@ -26,7 +26,6 @@ @@ -26,7 +26,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

4
dts/arm/nordic/nrf5340_cpuapp_qkaa.dtsi

@ -15,10 +15,6 @@ @@ -15,10 +15,6 @@
reg = <0x20000000 DT_SIZE_K(512)>;
};
&mpu {
arm,num-mpu-regions = <8>;
};
/ {
soc {
compatible = "nordic,nrf5340-cpuapp-qkaa", "nordic,nrf5340-cpuapp",

4
dts/arm/nordic/nrf5340_cpuappns_qkaa.dtsi

@ -15,10 +15,6 @@ @@ -15,10 +15,6 @@
reg = <0x20000000 DT_SIZE_K(512)>;
};
&mpu {
arm,num-mpu-regions = <8>;
};
/ {
soc {
compatible = "nordic,nrf5340-cpuapp-qkaa", "nordic,nrf5340-cpuapp",

4
dts/arm/nordic/nrf5340_cpunet_qkaa.dtsi

@ -19,10 +19,6 @@ @@ -19,10 +19,6 @@
reg = <0x21000000 DT_SIZE_K(64)>;
};
&mpu {
arm,num-mpu-regions = <8>;
};
/ {
soc {
compatible = "nordic,nrf5340-cpunet-qkaa", "nordic,nrf5340-cpunet",

1
dts/arm/nordic/nrf91.dtsi

@ -22,7 +22,6 @@ @@ -22,7 +22,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <16>;
};
};
};

1
dts/arm/nordic/nrf91ns.dtsi

@ -22,7 +22,6 @@ @@ -22,7 +22,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <16>;
};
};
};

1
dts/arm/nxp/nxp_imx8ml_m7.dtsi

@ -24,7 +24,6 @@ @@ -24,7 +24,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <16>;
};
};
};

1
dts/arm/nxp/nxp_lpc55S0x_common.dtsi

@ -23,7 +23,6 @@ @@ -23,7 +23,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

1
dts/arm/nxp/nxp_lpc55S1x_common.dtsi

@ -25,7 +25,6 @@ @@ -25,7 +25,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

1
dts/arm/nxp/nxp_lpc55S2x_common.dtsi

@ -34,7 +34,6 @@ @@ -34,7 +34,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

1
dts/arm/nxp/nxp_lpc55S3x_common.dtsi

@ -30,7 +30,6 @@ @@ -30,7 +30,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

1
dts/arm/nxp/nxp_lpc55S6x_common.dtsi

@ -35,7 +35,6 @@ @@ -35,7 +35,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
cpu@1 {

1
dts/arm/nxp/nxp_rt10xx.dtsi

@ -35,7 +35,6 @@ @@ -35,7 +35,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <16>;
};
itm: itm@e0000000 {

2
dts/arm/nxp/nxp_rt11xx.dtsi

@ -34,7 +34,6 @@ @@ -34,7 +34,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <16>;
};
};
cpu1: cpu@1 {
@ -49,7 +48,6 @@ @@ -49,7 +48,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <16>;
};
};

1
dts/arm/nxp/nxp_rt5xx_common.dtsi

@ -33,7 +33,6 @@ @@ -33,7 +33,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};

1
dts/arm/nxp/nxp_rt6xx_common.dtsi

@ -31,7 +31,6 @@ @@ -31,7 +31,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};

1
dts/arm/nxp/nxp_s32k344_m7.dtsi

@ -29,7 +29,6 @@ @@ -29,7 +29,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <16>;
};
};

1
dts/arm/quicklogic/quicklogic_eos_s3.dtsi

@ -23,7 +23,6 @@ @@ -23,7 +23,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

1
dts/arm/silabs/efr32mg21.dtsi

@ -30,7 +30,6 @@ @@ -30,7 +30,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <16>;
};
};
};

1
dts/arm/st/f7/stm32f7.dtsi

@ -40,7 +40,6 @@ @@ -40,7 +40,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

1
dts/arm/st/h5/stm32h5.dtsi

@ -36,7 +36,6 @@ @@ -36,7 +36,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};

1
dts/arm/st/h7/stm32h7.dtsi

@ -41,7 +41,6 @@ @@ -41,7 +41,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <16>;
};
};
};

1
dts/arm/st/l5/stm32l5.dtsi

@ -40,7 +40,6 @@ @@ -40,7 +40,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};

1
dts/arm/st/u5/stm32u5.dtsi

@ -41,7 +41,6 @@ @@ -41,7 +41,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};

1
dts/arm/st/wba/stm32wba.dtsi

@ -38,7 +38,6 @@ @@ -38,7 +38,6 @@
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};

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