Browse Source
ia32 is legacy and is just an atom, so deduplicate and use generic atom soc instead. Signed-off-by: Anas Nashif <anas.nashif@intel.com>pull/69687/head
44 changed files with 27 additions and 141 deletions
@ -1,4 +1,4 @@ |
|||||||
identifier: qemu_x86_64/ia32/nokpti |
identifier: qemu_x86_64/atom/nokpti |
||||||
name: QEMU Emulation for X86_64 (KPTI disabled) |
name: QEMU Emulation for X86_64 (KPTI disabled) |
||||||
type: qemu |
type: qemu |
||||||
arch: x86 |
arch: x86 |
@ -1,4 +1,4 @@ |
|||||||
identifier: qemu_x86/ia32/nokpti |
identifier: qemu_x86/atom/nokpti |
||||||
name: QEMU Emulation for X86 (KPTI disabled) |
name: QEMU Emulation for X86 (KPTI disabled) |
||||||
type: qemu |
type: qemu |
||||||
arch: x86 |
arch: x86 |
@ -1,4 +1,4 @@ |
|||||||
identifier: qemu_x86/ia32/nommu |
identifier: qemu_x86/atom/nommu |
||||||
name: QEMU Emulation for X86 (MMU disabled) |
name: QEMU Emulation for X86 (MMU disabled) |
||||||
type: qemu |
type: qemu |
||||||
arch: x86 |
arch: x86 |
@ -1,4 +1,4 @@ |
|||||||
identifier: qemu_x86/ia32/nopae |
identifier: qemu_x86/atom/nopae |
||||||
name: QEMU Emulation for X86 (32-bit page tables) |
name: QEMU Emulation for X86 (32-bit page tables) |
||||||
type: qemu |
type: qemu |
||||||
arch: x86 |
arch: x86 |
@ -1,4 +1,4 @@ |
|||||||
identifier: qemu_x86/ia32/virt |
identifier: qemu_x86/atom/virt |
||||||
name: QEMU Emulation for X86 (Run in Virtual Address Space) |
name: QEMU Emulation for X86 (Run in Virtual Address Space) |
||||||
type: qemu |
type: qemu |
||||||
arch: x86 |
arch: x86 |
@ -1,4 +1,4 @@ |
|||||||
identifier: qemu_x86/ia32/xip |
identifier: qemu_x86/atom/xip |
||||||
name: QEMU Emulation for X86 (XIP enabled) |
name: QEMU Emulation for X86 (XIP enabled) |
||||||
type: qemu |
type: qemu |
||||||
arch: x86 |
arch: x86 |
@ -1,4 +1,4 @@ |
|||||||
identifier: qemu_x86_tiny/ia32/768 |
identifier: qemu_x86_tiny/atom/768 |
||||||
name: QEMU Emulation for X86 (small VM, 768KB DRAM) |
name: QEMU Emulation for X86 (small VM, 768KB DRAM) |
||||||
type: qemu |
type: qemu |
||||||
arch: x86 |
arch: x86 |
@ -1,5 +0,0 @@ |
|||||||
# SPDX-License-Identifier: Apache-2.0 |
|
||||||
|
|
||||||
zephyr_include_directories(.) |
|
||||||
|
|
||||||
set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/linker.ld CACHE INTERNAL "") |
|
@ -1,8 +0,0 @@ |
|||||||
# SPDX-License-Identifier: Apache-2.0 |
|
||||||
|
|
||||||
config SOC_IA32 |
|
||||||
select X86 |
|
||||||
select CPU_ATOM |
|
||||||
select X86_CPU_HAS_MMX |
|
||||||
select X86_CPU_HAS_SSE |
|
||||||
select ARCH_HAS_RESERVED_PAGE_FRAMES if SRAM_BASE_ADDRESS = 0 |
|
@ -1,13 +0,0 @@ |
|||||||
# Generic PC platform configuration options |
|
||||||
|
|
||||||
# Copyright (c) 2014-2015 Wind River Systems, Inc. |
|
||||||
# Copyright (c) 2024 Intel Corporation |
|
||||||
# |
|
||||||
# SPDX-License-Identifier: Apache-2.0 |
|
||||||
|
|
||||||
if SOC_IA32 |
|
||||||
|
|
||||||
config SYS_CLOCK_HW_CYCLES_PER_SEC |
|
||||||
default 25000000 if HPET_TIMER |
|
||||||
|
|
||||||
endif |
|
@ -1,9 +0,0 @@ |
|||||||
# Copyright (c) 2024 Intel Corporation |
|
||||||
# |
|
||||||
# SPDX-License-Identifier: Apache-2.0 |
|
||||||
|
|
||||||
config SOC_IA32 |
|
||||||
bool |
|
||||||
|
|
||||||
config SOC |
|
||||||
default "ia32" if SOC_IA32 |
|
@ -1,13 +0,0 @@ |
|||||||
/* |
|
||||||
* Copyright (c) 2011-2014, Wind River Systems, Inc. |
|
||||||
* |
|
||||||
* SPDX-License-Identifier: Apache-2.0 |
|
||||||
*/ |
|
||||||
|
|
||||||
#include <zephyr/arch/x86/memory.ld> |
|
||||||
|
|
||||||
#ifdef CONFIG_X86_64 |
|
||||||
#include <zephyr/arch/x86/intel64/linker.ld> |
|
||||||
#else |
|
||||||
#include <zephyr/arch/x86/ia32/linker.ld> |
|
||||||
#endif |
|
@ -1,58 +0,0 @@ |
|||||||
/*
|
|
||||||
* Copyright (c) 2010-2015, Wind River Systems, Inc. |
|
||||||
* |
|
||||||
* SPDX-License-Identifier: Apache-2.0 |
|
||||||
*/ |
|
||||||
|
|
||||||
/**
|
|
||||||
* @file |
|
||||||
* @brief Board configuration macros for the ia32 platform |
|
||||||
* |
|
||||||
* This header file is used to specify and describe board-level aspects for |
|
||||||
* the 'ia32' platform. |
|
||||||
*/ |
|
||||||
|
|
||||||
#ifndef __SOC_H_ |
|
||||||
#define __SOC_H_ |
|
||||||
|
|
||||||
#include <zephyr/sys/util.h> |
|
||||||
|
|
||||||
#ifndef _ASMLANGUAGE |
|
||||||
#include <zephyr/device.h> |
|
||||||
#include <zephyr/random/random.h> |
|
||||||
#endif |
|
||||||
|
|
||||||
/* PCI definitions */ |
|
||||||
#define PCI_BUS_NUMBERS 1 |
|
||||||
|
|
||||||
#define PCI_CTRL_ADDR_REG 0xCF8 |
|
||||||
#define PCI_CTRL_DATA_REG 0xCFC |
|
||||||
|
|
||||||
#define PCI_INTA 1 |
|
||||||
#define PCI_INTB 2 |
|
||||||
#define PCI_INTC 3 |
|
||||||
#define PCI_INTD 4 |
|
||||||
|
|
||||||
/**
|
|
||||||
* |
|
||||||
* @brief Convert PCI interrupt PIN to IRQ |
|
||||||
* |
|
||||||
* This file is only used by QEMU, which emulates the i440fx chipset. |
|
||||||
* INTx are mapped to IRQs 10 and 11 after being swizzled. |
|
||||||
* |
|
||||||
* @return IRQ number, -1 if the result is incorrect |
|
||||||
* |
|
||||||
*/ |
|
||||||
|
|
||||||
static inline int pci_pin2irq(int bus, int dev, int pin) |
|
||||||
{ |
|
||||||
ARG_UNUSED(bus); |
|
||||||
|
|
||||||
if ((pin < PCI_INTA) || (pin > PCI_INTD)) { |
|
||||||
return -1; |
|
||||||
} |
|
||||||
|
|
||||||
return 10 + (((pin + dev - 1) >> 1) & 1); |
|
||||||
} |
|
||||||
|
|
||||||
#endif /* __SOC_H_ */ |
|
@ -1,5 +0,0 @@ |
|||||||
# Copyright (c) 2022 Intel Corporation |
|
||||||
# SPDX-License-Identifier: Apache-2.0 |
|
||||||
|
|
||||||
# Need quite some space for coverage. |
|
||||||
CONFIG_TEST_EXTRA_STACK_SIZE=1024 |
|
@ -1,5 +0,0 @@ |
|||||||
# Copyright 2022 Intel Corporation |
|
||||||
# SPDX-License-Identifier: Apache-2.0 |
|
||||||
|
|
||||||
# This is needed for coverage. |
|
||||||
CONFIG_MAIN_STACK_SIZE=4096 |
|
Loading…
Reference in new issue