samples: subsys: task_wdt on the IWDG of the stm32f4

Run the sample on the IWDG of stm32f4 nucleo boards
instead of WWDG because the APB1 prescaler cannot set
the WWDG input clock source to match the wd timeout.

Signed-off-by: Francois Ramu <francois.ramu@st.com>

samples/subsys/task_wdt/boards/nucleo_f401re.overlay

@@ -0,0 +1,19 @@
+/*
+ * Copyright 2024 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*
+ * stm32F4 has a WWDG clock by APB1 where the APB1 prescaler is 1..16
+ * this is too low to configure the WWDG clock for this sample.
+ * Thus, use the IWDG instead for running this sample.
+ */
+
+&wwdg {
+	status = "disabled";
+};
+
+&iwdg {
+	status = "okay";
+};

samples/subsys/task_wdt/boards/nucleo_f411re.overlay

@@ -0,0 +1,19 @@
+/*
+ * Copyright 2024 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*
+ * stm32F4 has a WWDG clock by APB1 where the APB1 prescaler is 1..16
+ * this is too low to configure the WWDG clock for this sample.
+ * Thus, use the IWDG instead for running this sample.
+ */
+
+&wwdg {
+	status = "disabled";
+};
+
+&iwdg {
+	status = "okay";
+};