soc/sifive: differentiate between FE310-G000 and FE310-G002

This commit reflects a difference between FE310-G000 and FE310-G002 SoCs,
since only the latter supports PMP. The result of that is the split of the
HiFive1 board into two separate targets, since the HWMv2 right now assumes
that board revisions share the same SoC.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>

boards/qemu/riscv32_xip/Kconfig.qemu_riscv32_xip

@@ -2,4 +2,4 @@
 # SPDX-License-Identifier: Apache-2.0
 
 config BOARD_QEMU_RISCV32_XIP
-	select SOC_SIFIVE_FREEDOM_FE310
+	select SOC_SIFIVE_FREEDOM_FE310_G002

boards/qemu/riscv32_xip/board.yml

@@ -3,4 +3,4 @@ board:
   full_name: QEMU Emulation for RISCV32 XIP
   vendor: qemu
   socs:
-    - name: fe310
+    - name: fe310_g002

boards/sifive/hifive1/Kconfig.defconfig

@@ -1,12 +1,7 @@
 # SPDX-License-Identifier: Apache-2.0
 # Copyright (c) 2018 SiFive, Inc.
 
-if BOARD_HIFIVE1_FE310
+if BOARD_HIFIVE1_REVB
-
-config SYS_CLOCK_TICKS_PER_SEC
-	default 128
-
-if "$(BOARD_REVISION)" = "B"
 
 config HAS_FLASH_LOAD_OFFSET
 	default y
@@ -17,6 +12,4 @@ config FLASH_BASE_ADDRESS
 config FLASH_LOAD_OFFSET
 	default 0x0
 
-endif # "$(BOARD_REVISION)" = "B"
+endif # BOARD_HIFIVE1_REVB
-
-endif # BOARD_HIFIVE1_FE310

boards/sifive/hifive1/Kconfig.hifive1

@@ -2,4 +2,4 @@
 # SPDX-License-Identifier: Apache-2.0
 
 config BOARD_HIFIVE1
-	select SOC_SIFIVE_FREEDOM_FE310
+	select SOC_SIFIVE_FREEDOM_FE310_G000

boards/sifive/hifive1/Kconfig.hifive1_revb

@@ -0,0 +1,5 @@
+# Copyright (c) 2025 Antmicro <www.antmicro.com>
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_HIFIVE1_REVB
+	select SOC_SIFIVE_FREEDOM_FE310_G002

boards/sifive/hifive1/board.cmake

@@ -13,14 +13,14 @@ set(QEMU_FLAGS_${ARCH}
   -machine sifive_e
   )
 
-if("${BOARD_REVISION}" STREQUAL "A")
+if("${BOARD}" STREQUAL "hifive1")
   board_set_flasher_ifnset(hifive1)
   board_finalize_runner_args(hifive1)
   board_runner_args(openocd --cmd-load "hifive1-load")
   board_runner_args(openocd --cmd-reset-halt "hifive1-reset-halt")
   board_runner_args(openocd --cmd-post-verify "hifive1-post-verify")
   include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
-elseif("${BOARD_REVISION}" STREQUAL "B")
+elseif("${BOARD}" STREQUAL "hifive1_revb")
   board_runner_args(jlink "--device=FE310")
   board_runner_args(jlink "--iface=JTAG")
   board_runner_args(jlink "--speed=4000")

boards/sifive/hifive1/board.yml

@@ -1,12 +1,11 @@
-board:
+boards:
-  name: hifive1
+  - name: hifive1
     full_name: HiFive1
     vendor: sifive
     socs:
-    - name: fe310
+      - name: fe310_g000
-  revision:
+  - name: hifive1_revb
-    format: letter
+    full_name: HiFive1 Rev B
-    default: "A"
+    vendor: sifive
-    revisions:
+    socs:
-      - name: "A"
+      - name: fe310_g002
-      - name: "B"

boards/sifive/hifive1/doc/hifive1.rst

@@ -0,0 +1,60 @@
+.. zephyr:board:: hifive1
+
+Overview
+********
+
+The HiFive1 is an Arduino-compatible development board with an FE310-G000 RISC-V SoC.
+
+.. figure:: img/hifive1.jpg
+   :align: center
+   :alt: SiFive HiFive1 board
+
+   SiFive HiFive1 board (image courtesy of SiFive)
+
+Programming and debugging
+*************************
+
+.. zephyr:board-supported-runners::
+
+Building
+========
+
+Applications for the HiFive1 board configuration can be built as usual (see
+:ref:`build_an_application`) using the corresponding board name:
+
+.. zephyr-app-commands::
+   :board: hifive1
+   :goals: build
+
+Flashing
+========
+
+In order to upload the application to the device, you'll need OpenOCD with
+RISC-V support. Download the tarball for your OS from the `SiFive website
+<https://www.sifive.com/boards>`_ and extract it.
+
+The Zephyr SDK uses a bundled version of OpenOCD by default. You can
+overwrite that behavior by adding the
+``-DOPENOCD=<path/to/riscv-openocd/bin/openocd>`` parameter when building:
+
+.. zephyr-app-commands::
+   :board: hifive1
+   :goals: build
+   :gen-args: -DOPENOCD=<path/to/riscv-openocd/bin/openocd>
+
+When using a custom toolchain it should be enough to have the downloaded
+version of the binary in your ``PATH``.
+
+Now you can flash the application as usual (see :ref:`build_an_application` and
+:ref:`application_run` for more details):
+
+.. code-block:: console
+
+   west flash
+
+Depending on your OS you might have to run the flash command as superuser.
+
+Debugging
+=========
+
+Refer to the detailed overview about :ref:`application_debugging`.

boards/sifive/hifive1/doc/hifive1_revb.rst

@@ -0,0 +1,51 @@
+.. zephyr:board:: hifive1_revb
+
+Overview
+********
+
+The HiFive1 Rev B is an Arduino-compatible development board with an FE310-G002 RISC-V SoC.
+
+.. figure:: img/hifive1_revb.jpg
+   :align: center
+   :alt: SiFive HiFive1 Rev B board
+
+   SiFive HiFive1 Rev B board (image courtesy of SiFive)
+
+Programming and debugging
+*************************
+
+.. zephyr:board-supported-runners::
+
+Building
+========
+
+Applications for the HiFive1 Rev B board configuration can be built as usual (see
+:ref:`build_an_application`) using the corresponding board name:
+
+.. zephyr-app-commands::
+   :board: hifive1_revb
+   :goals: build
+
+Flashing
+========
+
+The HiFive 1 Rev B uses Segger J-Link OB for flashing and debugging. To flash and
+debug the board, you'll need to install the
+`Segger J-Link Software and Documentation Pack
+<https://www.segger.com/downloads/jlink#J-LinkSoftwareAndDocumentationPack>`_
+and choose version V6.46a or later (Downloads for Windows, Linux, and macOS are
+available).
+
+Now you can flash the application as usual (see :ref:`build_an_application` and
+:ref:`application_run` for more details):
+
+.. code-block:: console
+
+   west flash
+
+Depending on your OS you might have to run the flash command as superuser.
+
+Debugging
+=========
+
+Refer to the detailed overview about :ref:`application_debugging`.

boards/sifive/hifive1/doc/index.rst

@@ -1,96 +0,0 @@
-.. zephyr:board:: hifive1
-
-Overview
-********
-
-The HiFive1 is an Arduino-compatible development board with
-an FE310 RISC-V SoC. Two revisions of this board are supported in Zephyr:
-`HiFive1 <https://www.sifive.com/boards/hifive1>`__ (also known as HiFive1 Rev A)
-and `HiFive1 Rev B <https://www.sifive.com/boards/hifive1-rev-b>`__.
-
-.. figure:: img/hifive1.jpg
-   :align: center
-   :alt: SiFive HiFive1 board
-
-   SiFive HiFive1 board (image courtesy of SiFive)
-
-.. figure:: img/hifive1_revb.jpg
-   :align: center
-   :alt: SiFive HiFive1 Rev B board
-
-   SiFive HiFive1 Rev B board (image courtesy of SiFive)
-
-Programming and debugging
-*************************
-
-.. zephyr:board-supported-runners::
-
-Building
-========
-
-Applications for the HiFive1 board configuration can be built as usual (see
-:ref:`build_an_application`) using the corresponding board name:
-
-.. tabs::
-
-   .. group-tab:: HiFive1
-
-      .. zephyr-app-commands::
-         :board: hifive1
-         :goals: build
-
-   .. group-tab:: HiFive1 Rev B
-
-      .. zephyr-app-commands::
-         :board: hifive1@B
-         :goals: build
-
-Flashing
-========
-
-
-HiFive1
--------
-
-.. tabs::
-
-   .. group-tab:: HiFive1
-
-      In order to upload the application to the device, you'll need OpenOCD with
-      RISC-V support. Download the tarball for your OS from the `SiFive website
-      <https://www.sifive.com/boards>`_ and extract it.
-
-      The Zephyr SDK uses a bundled version of OpenOCD by default. You can
-      overwrite that behavior by adding the
-      ``-DOPENOCD=<path/to/riscv-openocd/bin/openocd>`` parameter when building:
-
-      .. zephyr-app-commands::
-         :board: hifive1
-         :goals: build
-         :gen-args: -DOPENOCD=<path/to/riscv-openocd/bin/openocd>
-
-      When using a custom toolchain it should be enough to have the downloaded
-      version of the binary in your ``PATH``.
-
-   .. group-tab:: HiFive1 Rev B
-
-      The HiFive 1 Rev B uses Segger J-Link OB for flashing and debugging. To flash and
-      debug the board, you'll need to install the
-      `Segger J-Link Software and Documentation Pack
-      <https://www.segger.com/downloads/jlink#J-LinkSoftwareAndDocumentationPack>`_
-      and choose version V6.46a or later (Downloads for Windows, Linux, and macOS are
-      available).
-
-Now you can flash the application as usual (see :ref:`build_an_application` and
-:ref:`application_run` for more details):
-
-.. code-block:: console
-
-   west flash
-
-Depending on your OS you might have to run the flash command as superuser.
-
-Debugging
-=========
-
-Refer to the detailed overview about :ref:`application_debugging`.

boards/sifive/hifive1/hifive1.yaml

@@ -15,6 +15,7 @@ supported:
   - arduino_gpio
   - arduino_i2c
 testing:
+  timeout_multiplier: 6
   ignore_tags:
     - net
     - bluetooth

boards/sifive/hifive1/hifive1_defconfig

@@ -6,3 +6,4 @@ CONFIG_SERIAL=y
 CONFIG_UART_SIFIVE_PORT_0=y
 CONFIG_UART_CONSOLE=y
 CONFIG_GPIO=y
+CONFIG_BUILD_OUTPUT_HEX=y

boards/sifive/hifive1/hifive1_revb.dts

@@ -4,6 +4,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
+#include "hifive1.dts"
+
 / {
 	model = "SiFive HiFive 1 Rev. B";
 	compatible = "sifive,hifive1_revb";

boards/sifive/hifive1/hifive1_revb.yaml

@@ -1,4 +1,4 @@
-identifier: hifive1@B
+identifier: hifive1_revb
 name: SiFive HiFive1 Rev B
 type: mcu
 arch: riscv

boards/sifive/hifive1/hifive1_revb_defconfig

@@ -1,4 +1,9 @@
 # SPDX-License-Identifier: Apache-2.0
 # Copyright (c) 2018 SiFive, Inc.
 
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_SIFIVE_PORT_0=y
+CONFIG_UART_CONSOLE=y
+CONFIG_GPIO=y
 CONFIG_BUILD_OUTPUT_HEX=y

boards/sifive/hifive1/support/hifive1.resc

@@ -26,3 +26,11 @@ macro reset
     sysbus LoadELF $elf
 """
 runMacro $reset
+
+# ZBus tests take up a lot of time to finish running; let's speed them up
+python
+"""
+cpu = self.Machine['sysbus.cpu']
+if self.Machine.SystemBus.TryGetAllSymbolAddresses("CONFIG_ZBUS", context=cpu)[0]:
+    Antmicro.Renode.Peripherals.Plugins.ZephyrMode.EnableZephyrMode(cpu)
+"""

boards/sparkfun/red_v_things_plus/Kconfig.defconfig

@@ -3,9 +3,6 @@
 
 if BOARD_SPARKFUN_RED_V_THINGS_PLUS
 
-config SYS_CLOCK_TICKS_PER_SEC
-	default 128
-
 config HAS_FLASH_LOAD_OFFSET
 	default y
 

boards/sparkfun/red_v_things_plus/Kconfig.sparkfun_red_v_things_plus

@@ -2,4 +2,4 @@
 # SPDX-License-Identifier: Apache-2.0
 
 config BOARD_SPARKFUN_RED_V_THINGS_PLUS
-	select SOC_SIFIVE_FREEDOM_FE310
+	select SOC_SIFIVE_FREEDOM_FE310_G002

boards/sparkfun/red_v_things_plus/board.yml

@@ -3,4 +3,4 @@ board:
   full_name: RED-V Things Plus
   vendor: sparkfun
   socs:
-    - name: fe310
+    - name: fe310_g002

samples/subsys/zbus/benchmark/benchmark_256KB.robot

@@ -9,7 +9,7 @@ Suite Teardown      Terminate All Processes    kill=True
 
 *** Variables ***
 ${csv_file}         zbus_dyn_benchmark_256kb.csv
-${board}            hifive1@B
+${board}            hifive1_revb
 ${serial_port}      /dev/ttyACM0
 
 

samples/subsys/zbus/remote_mock/sample.yaml

@@ -6,6 +6,6 @@ tests:
     tags: zbus
     platform_allow:
       - native_sim
-      - hifive1@B
+      - hifive1_revb
     integration_platforms:
       - native_sim

samples/userspace/syscall_perf/sample.yaml

@@ -13,4 +13,4 @@ tests:
     filter: CONFIG_ARCH_HAS_USERSPACE
     arch_allow: riscv
     integration_platforms:
-      - hifive1@B
+      - hifive1_revb

soc/sifive/sifive_freedom/fe300/Kconfig

@@ -9,7 +9,6 @@ config SOC_SERIES_SIFIVE_FREEDOM_FE300
 	select RISCV
 	select RISCV_PRIVILEGED
 	select RISCV_HAS_PLIC
-	select RISCV_PMP
 	select RISCV_SOC_HAS_GP_RELATIVE_ADDRESSING
 
 	select RISCV_ISA_RV32I
@@ -23,3 +22,7 @@ config SOC_SERIES_SIFIVE_FREEDOM_FE300
 	select INCLUDE_RESET_VECTOR
 	select SOC_EARLY_INIT_HOOK
 	imply XIP
+
+config SOC_SIFIVE_FREEDOM_FE310_G002
+	bool
+	select RISCV_PMP

soc/sifive/sifive_freedom/fe300/Kconfig.defconfig

@@ -5,7 +5,7 @@
 if SOC_SERIES_SIFIVE_FREEDOM_FE300
 
 config SYS_CLOCK_HW_CYCLES_PER_SEC
-	default 32768
+	default $(dt_node_int_prop_int,/clocks/core-clk,clock-frequency)
 
 config RISCV_SOC_INTERRUPT_INIT
 	default y

soc/sifive/sifive_freedom/fe300/Kconfig.soc

@@ -8,9 +8,14 @@ config SOC_SERIES_SIFIVE_FREEDOM_FE300
 config SOC_SERIES
 	default "fe300" if SOC_SERIES_SIFIVE_FREEDOM_FE300
 
-config SOC_SIFIVE_FREEDOM_FE310
+config SOC_SIFIVE_FREEDOM_FE310_G000
+	bool
+	select SOC_SERIES_SIFIVE_FREEDOM_FE300
+
+config SOC_SIFIVE_FREEDOM_FE310_G002
 	bool
 	select SOC_SERIES_SIFIVE_FREEDOM_FE300
 
 config SOC
-	default "fe310" if SOC_SIFIVE_FREEDOM_FE310
+	default "fe310_g000" if SOC_SIFIVE_FREEDOM_FE310_G000
+	default "fe310_g002" if SOC_SIFIVE_FREEDOM_FE310_G002

soc/sifive/sifive_freedom/soc.yml

@@ -3,7 +3,8 @@ family:
     series:
       - name: fe300
         socs:
-          - name: fe310
+          - name: fe310_g000
+          - name: fe310_g002
       - name: fu500
         socs:
           - name: fu540

tests/drivers/build_all/pwm/testcase.yaml

@@ -27,7 +27,7 @@ tests:
   drivers.pwm.rv32m1.tpm.build:
     platform_allow: rv32m1_vega/openisa_rv32m1/ri5cy
   drivers.pwm.sifive.build:
-    platform_allow: hifive1@B
+    platform_allow: hifive1_revb
   drivers.pwm.npcx.build:
     platform_allow: npcx7m6fb_evb
   drivers.pwm.nrf.sw.build: