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Camera(NT99141): add a new Camera

pull/181/head
ChenZhengwei20190741 5 years ago
parent
b02992a5b8
commit
782b3df10b
6 changed files with 1940 additions and 3 deletions
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  1. 1
      CMakeLists.txt
  2. 41
      driver/camera.c
  3. 961
      sensors/nt99141.c
  4. 16
      sensors/private_include/nt99141.h
  5. 211
      sensors/private_include/nt99141_regs.h
  6. 713
      sensors/private_include/nt99141_settings.h

1
CMakeLists.txt
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@ -8,6 +8,7 @@ set(COMPONENT_SRCS @@ -8,6 +8,7 @@ set(COMPONENT_SRCS
sensors/ov3660.c
sensors/ov5640.c
sensors/ov7725.c
sensors/nt99141.c
conversions/yuv.c
conversions/to_jpg.cpp
conversions/to_bmp.c

41
driver/camera.c
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@ -48,6 +48,9 @@ @@ -48,6 +48,9 @@
#if CONFIG_OV5640_SUPPORT
#include "ov5640.h"
#endif
#if CONFIG_NT99141_SUPPORT
#include "nt99141.h"
#endif
typedef enum {
CAMERA_NONE = 0,
@ -56,6 +59,7 @@ typedef enum { @@ -56,6 +59,7 @@ typedef enum {
CAMERA_OV2640 = 2640,
CAMERA_OV3660 = 3660,
CAMERA_OV5640 = 5640,
CAMERA_NT99141 = 9141,
} camera_model_t;
#define REG_PID 0x0A
@ -1011,16 +1015,33 @@ esp_err_t camera_probe(const camera_config_t* config, camera_model_t* out_camera @@ -1011,16 +1015,33 @@ esp_err_t camera_probe(const camera_config_t* config, camera_model_t* out_camera
slv_addr = SCCB_Probe();
}
#endif
#if CONFIG_NT99141_SUPPORT
if (slv_addr == 0x2a)
{
ESP_LOGD(TAG, "Resetting NT99141");
SCCB_Write16(0x2a, 0x3008, 0x01);//bank sensor
}
#endif
s_state->sensor.slv_addr = slv_addr;
s_state->sensor.xclk_freq_hz = config->xclk_freq_hz;
#if (CONFIG_OV3660_SUPPORT || CONFIG_OV5640_SUPPORT)
#if (CONFIG_OV3660_SUPPORT || CONFIG_OV5640_SUPPORT || CONFIG_NT99141_SUPPORT)
if(s_state->sensor.slv_addr == 0x3c){
id->PID = SCCB_Read16(s_state->sensor.slv_addr, REG16_CHIDH);
id->VER = SCCB_Read16(s_state->sensor.slv_addr, REG16_CHIDL);
vTaskDelay(10 / portTICK_PERIOD_MS);
ESP_LOGD(TAG, "Camera PID=0x%02x VER=0x%02x", id->PID, id->VER);
} else if(s_state->sensor.slv_addr == 0x2a){
id->PID = SCCB_Read16(s_state->sensor.slv_addr, 0x3000);
id->VER = SCCB_Read16(s_state->sensor.slv_addr, 0x3001);
vTaskDelay(10 / portTICK_PERIOD_MS);
ESP_LOGD(TAG, "Camera PID=0x%02x VER=0x%02x", id->PID, id->VER);
if(config->xclk_freq_hz > 10000000)
{
ESP_LOGE(TAG, "NT99141: only XCLK under 10MHz is supported, and XCLK is now set to 10M");
s_state->sensor.xclk_freq_hz = 10000000;
}
} else {
#endif
id->PID = SCCB_Read(s_state->sensor.slv_addr, REG_PID);
@ -1031,7 +1052,7 @@ esp_err_t camera_probe(const camera_config_t* config, camera_model_t* out_camera @@ -1031,7 +1052,7 @@ esp_err_t camera_probe(const camera_config_t* config, camera_model_t* out_camera
ESP_LOGD(TAG, "Camera PID=0x%02x VER=0x%02x MIDL=0x%02x MIDH=0x%02x",
id->PID, id->VER, id->MIDH, id->MIDL);
#if (CONFIG_OV3660_SUPPORT || CONFIG_OV5640_SUPPORT)
#if (CONFIG_OV3660_SUPPORT || CONFIG_OV5640_SUPPORT || CONFIG_NT99141_SUPPORT)
}
#endif
@ -1061,6 +1082,13 @@ esp_err_t camera_probe(const camera_config_t* config, camera_model_t* out_camera @@ -1061,6 +1082,13 @@ esp_err_t camera_probe(const camera_config_t* config, camera_model_t* out_camera
ov5640_init(&s_state->sensor);
break;
#endif
#if CONFIG_NT99141_SUPPORT
case NT99141_PID:
*out_camera_model = CAMERA_NT99141;
NT99141_init(&s_state->sensor);
break;
#endif
default:
id->PID = 0;
*out_camera_model = CAMERA_UNKNOWN;
@ -1116,6 +1144,13 @@ esp_err_t camera_init(const camera_config_t* config) @@ -1116,6 +1144,13 @@ esp_err_t camera_init(const camera_config_t* config)
frame_size = FRAMESIZE_QSXGA;
}
break;
#endif
#if CONFIG_NT99141_SUPPORT
case NT99141_PID:
if (frame_size > FRAMESIZE_HD) {
frame_size = FRAMESIZE_HD;
}
break;
#endif
default:
return ESP_ERR_CAMERA_NOT_SUPPORTED;
@ -1126,7 +1161,7 @@ esp_err_t camera_init(const camera_config_t* config) @@ -1126,7 +1161,7 @@ esp_err_t camera_init(const camera_config_t* config)
if (pix_format == PIXFORMAT_GRAYSCALE) {
s_state->fb_size = s_state->width * s_state->height;
if (s_state->sensor.id.PID == OV3660_PID || s_state->sensor.id.PID == OV5640_PID) {
if (s_state->sensor.id.PID == OV3660_PID || s_state->sensor.id.PID == OV5640_PID || s_state->sensor.id.PID == NT99141_PID) {
if (is_hs_mode()) {
s_state->sampling_mode = SM_0A00_0B00;
s_state->dma_filter = &dma_filter_yuyv_highspeed;

961
sensors/nt99141.c
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@ -0,0 +1,961 @@ @@ -0,0 +1,961 @@
/*
* This file is part of the OpenMV project.
* Copyright (c) 2013/2014 Ibrahim Abdelkader <i.abdalkader@gmail.com>
* This work is licensed under the MIT license, see the file LICENSE for details.
*
* NT99141 driver.
*
*/
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include "sccb.h"
#include "nt99141.h"
#include "nt99141_regs.h"
#include "nt99141_settings.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#if defined(ARDUINO_ARCH_ESP32) && defined(CONFIG_ARDUHAL_ESP_LOG)
#include "esp32-hal-log.h"
#else
#include "esp_log.h"
static const char *TAG = "NT99141";
#endif
//#define REG_DEBUG_ON
static int read_reg(uint8_t slv_addr, const uint16_t reg)
{
int ret = SCCB_Read16(slv_addr, reg);
#ifdef REG_DEBUG_ON
if (ret < 0) {
ESP_LOGE(TAG, "READ REG 0x%04x FAILED: %d", reg, ret);
}
#endif
return ret;
}
static int check_reg_mask(uint8_t slv_addr, uint16_t reg, uint8_t mask)
{
return (read_reg(slv_addr, reg) & mask) == mask;
}
static int read_reg16(uint8_t slv_addr, const uint16_t reg)
{
int ret = 0, ret2 = 0;
ret = read_reg(slv_addr, reg);
if (ret >= 0) {
ret = (ret & 0xFF) << 8;
ret2 = read_reg(slv_addr, reg + 1);
if (ret2 < 0) {
ret = ret2;
} else {
ret |= ret2 & 0xFF;
}
}
return ret;
}
static int write_reg(uint8_t slv_addr, const uint16_t reg, uint8_t value)
{
int ret = 0;
#ifndef REG_DEBUG_ON
ret = SCCB_Write16(slv_addr, reg, value);
#else
int old_value = read_reg(slv_addr, reg);
if (old_value < 0) {
return old_value;
}
if ((uint8_t)old_value != value) {
ESP_LOGD(TAG, "NEW REG 0x%04x: 0x%02x to 0x%02x", reg, (uint8_t)old_value, value);
ret = SCCB_Write16(slv_addr, reg, value);
} else {
ESP_LOGD(TAG, "OLD REG 0x%04x: 0x%02x", reg, (uint8_t)old_value);
ret = SCCB_Write16(slv_addr, reg, value);//maybe not?
}
if (ret < 0) {
ESP_LOGE(TAG, "WRITE REG 0x%04x FAILED: %d", reg, ret);
}
#endif
return ret;
}
static int set_reg_bits(uint8_t slv_addr, uint16_t reg, uint8_t offset, uint8_t mask, uint8_t value)
{
int ret = 0;
uint8_t c_value, new_value;
ret = read_reg(slv_addr, reg);
if (ret < 0) {
return ret;
}
c_value = ret;
new_value = (c_value & ~(mask << offset)) | ((value & mask) << offset);
ret = write_reg(slv_addr, reg, new_value);
return ret;
}
static int write_regs(uint8_t slv_addr, const uint16_t (*regs)[2])
{
int i = 0, ret = 0;
while (!ret && regs[i][0] != REGLIST_TAIL) {
if (regs[i][0] == REG_DLY) {
vTaskDelay(regs[i][1] / portTICK_PERIOD_MS);
} else {
ret = write_reg(slv_addr, regs[i][0], regs[i][1]);
}
i++;
}
return ret;
}
static int write_reg16(uint8_t slv_addr, const uint16_t reg, uint16_t value)
{
if (write_reg(slv_addr, reg, value >> 8) || write_reg(slv_addr, reg + 1, value)) {
return -1;
}
return 0;
}
static int write_addr_reg(uint8_t slv_addr, const uint16_t reg, uint16_t x_value, uint16_t y_value)
{
if (write_reg16(slv_addr, reg, x_value) || write_reg16(slv_addr, reg + 2, y_value)) {
return -1;
}
return 0;
}
#define write_reg_bits(slv_addr, reg, mask, enable) set_reg_bits(slv_addr, reg, 0, mask, enable?mask:0)
static int calc_sysclk(int xclk, bool pll_bypass, int pll_multiplier, int pll_sys_div, int pll_pre_div, bool pll_root_2x, int pll_seld5, bool pclk_manual, int pclk_div)
{
const int pll_pre_div2x_map[] = { 2, 3, 4, 6 };//values are multiplied by two to avoid floats
const int pll_seld52x_map[] = { 2, 2, 4, 5 };
if (!pll_sys_div) {
pll_sys_div = 1;
}
int pll_pre_div2x = pll_pre_div2x_map[pll_pre_div];
int pll_root_div = pll_root_2x ? 2 : 1;
int pll_seld52x = pll_seld52x_map[pll_seld5];
int VCO = (xclk / 1000) * pll_multiplier * pll_root_div * 2 / pll_pre_div2x;
int PLLCLK = pll_bypass ? (xclk) : (VCO * 1000 * 2 / pll_sys_div / pll_seld52x);
int PCLK = PLLCLK / 2 / ((pclk_manual && pclk_div) ? pclk_div : 1);
int SYSCLK = PLLCLK / 4;
ESP_LOGD(TAG, "Calculated VCO: %d Hz, PLLCLK: %d Hz, SYSCLK: %d Hz, PCLK: %d Hz", VCO * 1000, PLLCLK, SYSCLK, PCLK);
return SYSCLK;
}
static int set_pll(sensor_t *sensor, bool bypass, uint8_t multiplier, uint8_t sys_div, uint8_t pre_div, bool root_2x, uint8_t seld5, bool pclk_manual, uint8_t pclk_div)
{
return -1;
}
static int set_ae_level(sensor_t *sensor, int level);
static int reset(sensor_t *sensor)
{
int ret = 0;
// Software Reset: clear all registers and reset them to their default values
ret = write_reg(sensor->slv_addr, SYSTEM_CTROL0, 0x01);
if (ret) {
ESP_LOGE(TAG, "Software Reset FAILED!");
return ret;
}
vTaskDelay(100 / portTICK_PERIOD_MS);
ret = write_regs(sensor->slv_addr, sensor_default_regs); //re-initial
if (ret == 0) {
ESP_LOGD(TAG, "Camera defaults loaded");
ret = set_ae_level(sensor, 0);
vTaskDelay(100 / portTICK_PERIOD_MS);
}
return ret;
}
static int set_pixformat(sensor_t *sensor, pixformat_t pixformat)
{
int ret = 0;
const uint16_t (*regs)[2];
switch (pixformat) {
case PIXFORMAT_YUV422:
regs = sensor_fmt_yuv422;
break;
case PIXFORMAT_GRAYSCALE:
regs = sensor_fmt_grayscale;
break;
case PIXFORMAT_RGB565:
case PIXFORMAT_RGB888:
regs = sensor_fmt_rgb565;
break;
case PIXFORMAT_JPEG:
regs = sensor_fmt_jpeg;
break;
case PIXFORMAT_RAW:
regs = sensor_fmt_raw;
break;
default:
ESP_LOGE(TAG, "Unsupported pixformat: %u", pixformat);
return -1;
}
ret = write_regs(sensor->slv_addr, regs);
if (ret == 0) {
sensor->pixformat = pixformat;
ESP_LOGD(TAG, "Set pixformat to: %u", pixformat);
}
return ret;
}
static int set_image_options(sensor_t *sensor)
{
int ret = 0;
uint8_t reg20 = 0;
uint8_t reg21 = 0;
uint8_t reg4514 = 0;
uint8_t reg4514_test = 0;
// V-Flip
if (sensor->status.vflip) {
reg20 |= 0x01;
reg4514_test |= 1;
}
// H-Mirror
if (sensor->status.hmirror) {
reg21 |= 0x02;
reg4514_test |= 2;
}
switch (reg4514_test) {
}
if (write_reg(sensor->slv_addr, TIMING_TC_REG20, reg20 | reg21)) {
ESP_LOGE(TAG, "Setting Image Options Failed");
ret = -1;
}
ESP_LOGD(TAG, "Set Image Options: Compression: %u, Binning: %u, V-Flip: %u, H-Mirror: %u, Reg-4514: 0x%02x",
sensor->pixformat == PIXFORMAT_JPEG, sensor->status.binning, sensor->status.vflip, sensor->status.hmirror, reg4514);
return ret;
}
static int set_framesize(sensor_t *sensor, framesize_t framesize)
{
int ret = 0;
sensor->status.framesize = framesize;
ret = write_regs(sensor->slv_addr, sensor_default_regs);
if (framesize == FRAMESIZE_QVGA) {
ESP_LOGD(TAG, "Set FRAMESIZE_QVGA");
ret = write_regs(sensor->slv_addr, sensor_framesize_QVGA);
#if CONFIG_NT99141_SUPPORT_XSKIP
ESP_LOGD(TAG, "Set FRAMESIZE_QVGA: xskip mode");
ret = write_regs(sensor->slv_addr, sensor_framesize_QVGA_xskip);
#elif CONFIG_NT99141_SUPPORT_CROP
ESP_LOGD(TAG, "Set FRAMESIZE_QVGA: crop mode");
ret = write_regs(sensor->slv_addr, sensor_framesize_QVGA_crop);
#endif
} else if (framesize == FRAMESIZE_VGA) {
ESP_LOGD(TAG, "Set FRAMESIZE_VGA");
ret = write_regs(sensor->slv_addr, sensor_framesize_VGA);
#ifdef CONFIG_NT99141_SUPPORT_XSKIP
ESP_LOGD(TAG, "Set FRAMESIZE_QVGA: xskip mode");
ret = write_regs(sensor->slv_addr, sensor_framesize_VGA_xskip);
#elif CONFIG_NT99141_SUPPORT_CROP
ESP_LOGD(TAG, "Set FRAMESIZE_QVGA: crop mode");
ret = write_regs(sensor->slv_addr, sensor_framesize_VGA_crop);
#endif
} else if (framesize >= FRAMESIZE_HD) {
ESP_LOGD(TAG, "Set FRAMESIZE_HD");
ret = write_regs(sensor->slv_addr, sensor_framesize_HD);
} else {
ESP_LOGD(TAG, "Dont suppost this size, Set FRAMESIZE_VGA");
ret = write_regs(sensor->slv_addr, sensor_framesize_VGA);
}
return 0;
}
static int set_hmirror(sensor_t *sensor, int enable)
{
int ret = 0;
sensor->status.hmirror = enable;
ret = set_image_options(sensor);
if (ret == 0) {
ESP_LOGD(TAG, "Set h-mirror to: %d", enable);
}
return ret;
}
static int set_vflip(sensor_t *sensor, int enable)
{
int ret = 0;
sensor->status.vflip = enable;
ret = set_image_options(sensor);
if (ret == 0) {
ESP_LOGD(TAG, "Set v-flip to: %d", enable);
}
return ret;
}
static int set_quality(sensor_t *sensor, int qs)
{
int ret = 0;
ret = write_reg(sensor->slv_addr, COMPRESSION_CTRL07, qs & 0x3f);
if (ret == 0) {
sensor->status.quality = qs;
ESP_LOGD(TAG, "Set quality to: %d", qs);
}
return ret;
}
static int set_colorbar(sensor_t *sensor, int enable)
{
int ret = 0;
ret = write_reg_bits(sensor->slv_addr, PRE_ISP_TEST_SETTING_1, TEST_COLOR_BAR, enable);
if (ret == 0) {
sensor->status.colorbar = enable;
ESP_LOGD(TAG, "Set colorbar to: %d", enable);
}
return ret;
}
static int set_gain_ctrl(sensor_t *sensor, int enable)
{
int ret = 0;
ret = write_reg_bits(sensor->slv_addr, 0x32bb, 0x87, enable);
if (ret == 0) {
ESP_LOGD(TAG, "Set gain_ctrl to: %d", enable);
sensor->status.agc = enable;
}
return ret;
}
static int set_exposure_ctrl(sensor_t *sensor, int enable)
{
int ret = 0;
ret = write_reg_bits(sensor->slv_addr, 0x32bb, 0x87, enable);
if (ret == 0) {
ESP_LOGD(TAG, "Set exposure_ctrl to: %d", enable);
sensor->status.aec = enable;
}
return ret;
}
static int set_whitebal(sensor_t *sensor, int enable)
{
int ret = 0;
if (ret == 0) {
ESP_LOGD(TAG, "Set awb to: %d", enable);
sensor->status.awb = enable;
}
return ret;
}
//Advanced AWB
static int set_dcw_dsp(sensor_t *sensor, int enable)
{
int ret = 0;
if (ret == 0) {
ESP_LOGD(TAG, "Set dcw to: %d", enable);
sensor->status.dcw = enable;
}
return ret;
}
//night mode enable
static int set_aec2(sensor_t *sensor, int enable)
{
int ret = 0;
if (ret == 0) {
ESP_LOGD(TAG, "Set aec2 to: %d", enable);
sensor->status.aec2 = enable;
}
return ret;
}
static int set_bpc_dsp(sensor_t *sensor, int enable)
{
int ret = 0;
if (ret == 0) {
ESP_LOGD(TAG, "Set bpc to: %d", enable);
sensor->status.bpc = enable;
}
return ret;
}
static int set_wpc_dsp(sensor_t *sensor, int enable)
{
int ret = 0;
if (ret == 0) {
ESP_LOGD(TAG, "Set wpc to: %d", enable);
sensor->status.wpc = enable;
}
return ret;
}
//Gamma enable
static int set_raw_gma_dsp(sensor_t *sensor, int enable)
{
int ret = 0;
if (ret == 0) {
ESP_LOGD(TAG, "Set raw_gma to: %d", enable);
sensor->status.raw_gma = enable;
}
return ret;
}
static int set_lenc_dsp(sensor_t *sensor, int enable)
{
int ret = 0;
if (ret == 0) {
ESP_LOGD(TAG, "Set lenc to: %d", enable);
sensor->status.lenc = enable;
}
return ret;
}
static int get_agc_gain(sensor_t *sensor)
{
ESP_LOGD(TAG, "get_agc_gain can not be configured at present");
return 0;
}
//real gain
static int set_agc_gain(sensor_t *sensor, int gain)
{
ESP_LOGD(TAG, "set_agc_gain can not be configured at present");
return 0;
}
static int get_aec_value(sensor_t *sensor)
{
ESP_LOGD(TAG, "get_aec_value can not be configured at present");
return 0;
}
static int set_aec_value(sensor_t *sensor, int value)
{
ESP_LOGD(TAG, "set_aec_value can not be configured at present");
return 0;
}
static int set_ae_level(sensor_t *sensor, int level)
{
ESP_LOGD(TAG, "set_ae_level can not be configured at present");
return 0;
}
static int set_wb_mode(sensor_t *sensor, int mode)
{
int ret = 0;
if (mode < 0 || mode > 4) {
return -1;
}
ret = write_reg(sensor->slv_addr, 0x3201, (mode != 0));
if (ret) {
return ret;
}
switch (mode) {
case 1://Sunny
ret = write_reg16(sensor->slv_addr, 0x3290, 0x01)
|| write_reg16(sensor->slv_addr, 0x3291, 0x38)
|| write_reg16(sensor->slv_addr, 0x3296, 0x01)
|| write_reg16(sensor->slv_addr, 0x3297, 0x68)
|| write_reg16(sensor->slv_addr, 0x3060, 0x01);
break;
case 2://Cloudy
ret = write_reg16(sensor->slv_addr, 0x3290, 0x01)
|| write_reg16(sensor->slv_addr, 0x3291, 0x51)
|| write_reg16(sensor->slv_addr, 0x3296, 0x01)
|| write_reg16(sensor->slv_addr, 0x3297, 0x00)
|| write_reg16(sensor->slv_addr, 0x3060, 0x01);
break;
case 3://INCANDESCENCE]
ret = write_reg16(sensor->slv_addr, 0x3290, 0x01)
|| write_reg16(sensor->slv_addr, 0x3291, 0x30)
|| write_reg16(sensor->slv_addr, 0x3296, 0x01)
|| write_reg16(sensor->slv_addr, 0x3297, 0xCB)
|| write_reg16(sensor->slv_addr, 0x3060, 0x01);
break;
case 4://FLUORESCENT
ret = write_reg16(sensor->slv_addr, 0x3290, 0x01)
|| write_reg16(sensor->slv_addr, 0x3291, 0x70)
|| write_reg16(sensor->slv_addr, 0x3296, 0x01)
|| write_reg16(sensor->slv_addr, 0x3297, 0xFF)
|| write_reg16(sensor->slv_addr, 0x3060, 0x01);
break;
default://AUTO
break;
}
if (ret == 0) {
ESP_LOGD(TAG, "Set wb_mode to: %d", mode);
sensor->status.wb_mode = mode;
}
return ret;
}
static int set_awb_gain_dsp(sensor_t *sensor, int enable)
{
int ret = 0;
int old_mode = sensor->status.wb_mode;
int mode = enable ? old_mode : 0;
ret = set_wb_mode(sensor, mode);
if (ret == 0) {
sensor->status.wb_mode = old_mode;
ESP_LOGD(TAG, "Set awb_gain to: %d", enable);
sensor->status.awb_gain = enable;
}
return ret;
}
static int set_special_effect(sensor_t *sensor, int effect)
{
int ret = 0;
if (effect < 0 || effect > 6) {
return -1;
}
uint8_t *regs = (uint8_t *)sensor_special_effects[effect];
ret = write_reg(sensor->slv_addr, 0x32F1, regs[0])
|| write_reg(sensor->slv_addr, 0x32F4, regs[1])
|| write_reg(sensor->slv_addr, 0x32F5, regs[2])
|| write_reg(sensor->slv_addr, 0x3060, regs[3]);
if (ret == 0) {
ESP_LOGD(TAG, "Set special_effect to: %d", effect);
sensor->status.special_effect = effect;
}
return ret;
}
static int set_brightness(sensor_t *sensor, int level)
{
int ret = 0;
uint8_t value = 0;
bool negative = false;
switch (level) {
case 3:
value = 0xA0;
break;
case 2:
value = 0x90;
break;
case 1:
value = 0x88;
break;
case -1:
value = 0x78;
negative = true;
break;
case -2:
value = 0x70;
negative = true;
break;
case -3:
value = 0x60;
negative = true;
break;
default: // 0
break;
}
ret = write_reg(sensor->slv_addr, 0x32F2, value);
if (ret == 0) {
ESP_LOGD(TAG, "Set brightness to: %d", level);
sensor->status.brightness = level;
}
return ret;
}
static int set_contrast(sensor_t *sensor, int level)
{
int ret = 0;
uint8_t value1 = 0, value2 = 0 ;
bool negative = false;
switch (level) {
case 3:
value1 = 0xD0;
value2 = 0xB0;
break;
case 2:
value1 = 0xE0;
value2 = 0xA0;
break;
case 1:
value1 = 0xF0;
value2 = 0x90;
break;
case 0:
value1 = 0x00;
value2 = 0x80;
break;
case -1:
value1 = 0x10;
value2 = 0x70;
break;
case -2:
value1 = 0x20;
value2 = 0x60;
break;
case -3:
value1 = 0x30;
value2 = 0x50;
break;
default: // 0
break;
}
ret = write_reg(sensor->slv_addr, 0x32FC, value1);
ret = write_reg(sensor->slv_addr, 0x32F2, value2);
ret = write_reg(sensor->slv_addr, 0x3060, 0x01);
if (ret == 0) {
ESP_LOGD(TAG, "Set contrast to: %d", level);
sensor->status.contrast = level;
}
return ret;
}
static int set_saturation(sensor_t *sensor, int level)
{
int ret = 0;
if (level > 4 || level < -4) {
return -1;
}
uint8_t *regs = (uint8_t *)sensor_saturation_levels[level + 4];
{
ret = write_reg(sensor->slv_addr, 0x32F3, regs[0]);
if (ret) {
return ret;
}
}
if (ret == 0) {
ESP_LOGD(TAG, "Set saturation to: %d", level);
sensor->status.saturation = level;
}
return ret;
}
static int set_sharpness(sensor_t *sensor, int level)
{
int ret = 0;
if (level > 3 || level < -3) {
return -1;
}
uint8_t mt_offset_2 = (level + 3) * 8;
uint8_t mt_offset_1 = mt_offset_2 + 1;
ret = write_reg_bits(sensor->slv_addr, 0x5308, 0x40, false)//0x40 means auto
|| write_reg(sensor->slv_addr, 0x5300, 0x10)
|| write_reg(sensor->slv_addr, 0x5301, 0x10)
|| write_reg(sensor->slv_addr, 0x5302, mt_offset_1)
|| write_reg(sensor->slv_addr, 0x5303, mt_offset_2)
|| write_reg(sensor->slv_addr, 0x5309, 0x10)
|| write_reg(sensor->slv_addr, 0x530a, 0x10)
|| write_reg(sensor->slv_addr, 0x530b, 0x04)
|| write_reg(sensor->slv_addr, 0x530c, 0x06);
if (ret == 0) {
ESP_LOGD(TAG, "Set sharpness to: %d", level);
sensor->status.sharpness = level;
}
return ret;
}
static int set_gainceiling(sensor_t *sensor, gainceiling_t level)
{
ESP_LOGD(TAG, "set_gainceiling can not be configured at present");
return 0;
}
static int get_denoise(sensor_t *sensor)
{
return (read_reg(sensor->slv_addr, 0x5306) / 4) + 1;
}
static int set_denoise(sensor_t *sensor, int level)
{
ESP_LOGD(TAG, "set_denoise can not be configured at present");
return 0;
}
static int get_reg(sensor_t *sensor, int reg, int mask)
{
int ret = 0, ret2 = 0;
if (mask > 0xFF) {
ret = read_reg16(sensor->slv_addr, reg);
if (ret >= 0 && mask > 0xFFFF) {
ret2 = read_reg(sensor->slv_addr, reg + 2);
if (ret2 >= 0) {
ret = (ret << 8) | ret2 ;
} else {
ret = ret2;
}
}
} else {
ret = read_reg(sensor->slv_addr, reg);
}
if (ret > 0) {
ret &= mask;
}
return ret;
}
static int set_reg(sensor_t *sensor, int reg, int mask, int value)
{
int ret = 0, ret2 = 0;
if (mask > 0xFF) {
ret = read_reg16(sensor->slv_addr, reg);
if (ret >= 0 && mask > 0xFFFF) {
ret2 = read_reg(sensor->slv_addr, reg + 2);
if (ret2 >= 0) {
ret = (ret << 8) | ret2 ;
} else {
ret = ret2;
}
}
} else {
ret = read_reg(sensor->slv_addr, reg);
}
if (ret < 0) {
return ret;
}
value = (ret & ~mask) | (value & mask);
if (mask > 0xFFFF) {
ret = write_reg16(sensor->slv_addr, reg, value >> 8);
if (ret >= 0) {
ret = write_reg(sensor->slv_addr, reg + 2, value & 0xFF);
}
} else if (mask > 0xFF) {
ret = write_reg16(sensor->slv_addr, reg, value);
} else {
ret = write_reg(sensor->slv_addr, reg, value);
}
return ret;
}
static int set_res_raw(sensor_t *sensor, int startX, int startY, int endX, int endY, int offsetX, int offsetY, int totalX, int totalY, int outputX, int outputY, bool scale, bool binning)
{
int ret = 0;
ret = write_addr_reg(sensor->slv_addr, X_ADDR_ST_H, startX, startY)
|| write_addr_reg(sensor->slv_addr, X_ADDR_END_H, endX, endY)
|| write_addr_reg(sensor->slv_addr, X_OFFSET_H, offsetX, offsetY)
|| write_addr_reg(sensor->slv_addr, X_TOTAL_SIZE_H, totalX, totalY)
|| write_addr_reg(sensor->slv_addr, X_OUTPUT_SIZE_H, outputX, outputY);
if (!ret) {
sensor->status.scale = scale;
sensor->status.binning = binning;
ret = set_image_options(sensor);
}
return ret;
}
static int _set_pll(sensor_t *sensor, int bypass, int multiplier, int sys_div, int root_2x, int pre_div, int seld5, int pclk_manual, int pclk_div)
{
return set_pll(sensor, bypass > 0, multiplier, sys_div, pre_div, root_2x > 0, seld5, pclk_manual > 0, pclk_div);
}
esp_err_t xclk_timer_conf(int ledc_timer, int xclk_freq_hz);
static int set_xclk(sensor_t *sensor, int timer, int xclk)
{
int ret = 0;
if (xclk > 10)
{
ESP_LOGE(TAG, "only XCLK under 10MHz is supported, and XCLK is now set to 10M");
xclk = 10;
}
sensor->xclk_freq_hz = xclk * 1000000U;
ret = xclk_timer_conf(timer, sensor->xclk_freq_hz);
return ret;
}
static int init_status(sensor_t *sensor)
{
sensor->status.brightness = 0;
sensor->status.contrast = 0;
sensor->status.saturation = 0;
sensor->status.sharpness = (read_reg(sensor->slv_addr, 0x3301));
sensor->status.denoise = get_denoise(sensor);
sensor->status.ae_level = 0;
sensor->status.gainceiling = read_reg16(sensor->slv_addr, 0x32F0) & 0xFF;
sensor->status.awb = check_reg_mask(sensor->slv_addr, ISP_CONTROL_01, 0x10);
sensor->status.dcw = !check_reg_mask(sensor->slv_addr, 0x5183, 0x80);
sensor->status.agc = !check_reg_mask(sensor->slv_addr, AEC_PK_MANUAL, AEC_PK_MANUAL_AGC_MANUALEN);
sensor->status.aec = !check_reg_mask(sensor->slv_addr, AEC_PK_MANUAL, AEC_PK_MANUAL_AEC_MANUALEN);
sensor->status.hmirror = check_reg_mask(sensor->slv_addr, TIMING_TC_REG21, TIMING_TC_REG21_HMIRROR);
sensor->status.vflip = check_reg_mask(sensor->slv_addr, TIMING_TC_REG20, TIMING_TC_REG20_VFLIP);
sensor->status.colorbar = check_reg_mask(sensor->slv_addr, PRE_ISP_TEST_SETTING_1, TEST_COLOR_BAR);
sensor->status.bpc = check_reg_mask(sensor->slv_addr, 0x5000, 0x04);
sensor->status.wpc = check_reg_mask(sensor->slv_addr, 0x5000, 0x02);
sensor->status.raw_gma = check_reg_mask(sensor->slv_addr, 0x5000, 0x20);
sensor->status.lenc = check_reg_mask(sensor->slv_addr, 0x5000, 0x80);
sensor->status.quality = read_reg(sensor->slv_addr, COMPRESSION_CTRL07) & 0x3f;
sensor->status.special_effect = 0;
sensor->status.wb_mode = 0;
sensor->status.awb_gain = check_reg_mask(sensor->slv_addr, 0x3000, 0x01);
sensor->status.agc_gain = get_agc_gain(sensor);
sensor->status.aec_value = get_aec_value(sensor);
sensor->status.aec2 = check_reg_mask(sensor->slv_addr, 0x3000, 0x04);
return 0;
}
int NT99141_init(sensor_t *sensor)
{
sensor->reset = reset;
sensor->set_pixformat = set_pixformat;
sensor->set_framesize = set_framesize;
sensor->set_contrast = set_contrast;
sensor->set_brightness = set_brightness;
sensor->set_saturation = set_saturation;
sensor->set_sharpness = set_sharpness;
sensor->set_gainceiling = set_gainceiling;
sensor->set_quality = set_quality;
sensor->set_colorbar = set_colorbar;
sensor->set_gain_ctrl = set_gain_ctrl;
sensor->set_exposure_ctrl = set_exposure_ctrl;
sensor->set_whitebal = set_whitebal;
sensor->set_hmirror = set_hmirror;
sensor->set_vflip = set_vflip;
sensor->init_status = init_status;
sensor->set_aec2 = set_aec2;
sensor->set_aec_value = set_aec_value;
sensor->set_special_effect = set_special_effect;
sensor->set_wb_mode = set_wb_mode;
sensor->set_ae_level = set_ae_level;
sensor->set_dcw = set_dcw_dsp;
sensor->set_bpc = set_bpc_dsp;
sensor->set_wpc = set_wpc_dsp;
sensor->set_awb_gain = set_awb_gain_dsp;
sensor->set_agc_gain = set_agc_gain;
sensor->set_raw_gma = set_raw_gma_dsp;
sensor->set_lenc = set_lenc_dsp;
sensor->set_denoise = set_denoise;
sensor->get_reg = get_reg;
sensor->set_reg = set_reg;
sensor->set_res_raw = set_res_raw;
sensor->set_pll = _set_pll;
sensor->set_xclk = set_xclk;
return 0;
}

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sensors/private_include/nt99141.h
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/*
* This file is part of the OpenMV project.
* Copyright (c) 2013/2014 Ibrahim Abdelkader <i.abdalkader@gmail.com>
* This work is licensed under the MIT license, see the file LICENSE for details.
*
* NT99141 driver.
*
*/
#ifndef __NT99141_H__
#define __NT99141_H__
#include "sensor.h"
int NT99141_init(sensor_t *sensor);
#endif // __NT99141_H__

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sensors/private_include/nt99141_regs.h
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/*
* NT99141 register definitions.
*/
#ifndef __NT99141_REG_REGS_H__
#define __NT99141_REG_REGS_H__
/* system control registers */
#define SYSTEM_CTROL0 0x3021 // Bit[7]: Software reset
// Bit[6]: Software power down
// Bit[5]: Reserved
// Bit[4]: SRB clock SYNC enable
// Bit[3]: Isolation suspend select
// Bit[2:0]: Not used
/* output format control registers */
#define FORMAT_CTRL 0x501F // Format select
// Bit[2:0]:
// 000: YUV422
// 001: RGB
// 010: Dither
// 011: RAW after DPC
// 101: RAW after CIP
/* format control registers */
#define FORMAT_CTRL00 0x4300
/* frame control registers */
#define FRAME_CTRL01 0x4201 // Control Passed Frame Number When both ON and OFF number set to 0x00,frame control is in bypass mode
// Bit[7:4]: Not used
// Bit[3:0]: Frame ON number
#define FRAME_CTRL02 0x4202 // Control Masked Frame Number When both ON and OFF number set to 0x00,frame control is in bypass mode
// Bit[7:4]: Not used
// BIT[3:0]: Frame OFF number
/* ISP top control registers */
#define PRE_ISP_TEST_SETTING_1 0x3025 // Bit[7]: Test enable
// 0: Test disable
// 1: Color bar enable
// Bit[6]: Rolling
// Bit[5]: Transparent
// Bit[4]: Square black and white
// Bit[3:2]: Color bar style
// 00: Standard 8 color bar
// 01: Gradual change at vertical mode 1
// 10: Gradual change at horizontal
// 11: Gradual change at vertical mode 2
// Bit[1:0]: Test select
// 00: Color bar
// 01: Random data
// 10: Square data
// 11: Black image
//exposure = {0x3500[3:0], 0x3501[7:0], 0x3502[7:0]} / 16 × tROW
/* AEC/AGC control functions */
#define AEC_PK_MANUAL 0x3201 // AEC Manual Mode Control
// Bit[7:6]: Reserved
// Bit[5]: Gain delay option
// Valid when 0x3503[4]=1’b0
// 0: Delay one frame latch
// 1: One frame latch
// Bit[4:2]: Reserved
// Bit[1]: AGC manual
// 0: Auto enable
// 1: Manual enable
// Bit[0]: AEC manual
// 0: Auto enable
// 1: Manual enable
//gain = {0x350A[1:0], 0x350B[7:0]} / 16
/* mirror and flip registers */
#define TIMING_TC_REG20 0x3022 // Timing Control Register
// Bit[2:1]: Vertical flip enable
// 00: Normal
// 11: Vertical flip
// Bit[0]: Vertical binning enable
#define TIMING_TC_REG21 0x3022 // Timing Control Register
// Bit[5]: Compression Enable
// Bit[2:1]: Horizontal mirror enable
// 00: Normal
// 11: Horizontal mirror
// Bit[0]: Horizontal binning enable
#define CLOCK_POL_CONTROL 0x3024// Bit[5]: PCLK polarity 0: active low
// 1: active high
// Bit[3]: Gate PCLK under VSYNC
// Bit[2]: Gate PCLK under HREF
// Bit[1]: HREF polarity
// 0: active low
// 1: active high
// Bit[0] VSYNC polarity
// 0: active low
// 1: active high
#define DRIVE_CAPABILITY 0x306a // Bit[7:6]:
// 00: 1x
// 01: 2x
// 10: 3x
// 11: 4x
#define X_ADDR_ST_H 0x3800 //Bit[3:0]: X address start[11:8]
#define X_ADDR_ST_L 0x3801 //Bit[7:0]: X address start[7:0]
#define Y_ADDR_ST_H 0x3802 //Bit[2:0]: Y address start[10:8]
#define Y_ADDR_ST_L 0x3803 //Bit[7:0]: Y address start[7:0]
#define X_ADDR_END_H 0x3804 //Bit[3:0]: X address end[11:8]
#define X_ADDR_END_L 0x3805 //Bit[7:0]:
#define Y_ADDR_END_H 0x3806 //Bit[2:0]: Y address end[10:8]
#define Y_ADDR_END_L 0x3807 //Bit[7:0]:
// Size after scaling
#define X_OUTPUT_SIZE_H 0x3808 //Bit[3:0]: DVP output horizontal width[11:8]
#define X_OUTPUT_SIZE_L 0x3809 //Bit[7:0]:
#define Y_OUTPUT_SIZE_H 0x380a //Bit[2:0]: DVP output vertical height[10:8]
#define Y_OUTPUT_SIZE_L 0x380b //Bit[7:0]:
#define X_TOTAL_SIZE_H 0x380c //Bit[3:0]: Total horizontal size[11:8]
#define X_TOTAL_SIZE_L 0x380d //Bit[7:0]:
#define Y_TOTAL_SIZE_H 0x380e //Bit[7:0]: Total vertical size[15:8]
#define Y_TOTAL_SIZE_L 0x380f //Bit[7:0]:
#define X_OFFSET_H 0x3810 //Bit[3:0]: ISP horizontal offset[11:8]
#define X_OFFSET_L 0x3811 //Bit[7:0]:
#define Y_OFFSET_H 0x3812 //Bit[2:0]: ISP vertical offset[10:8]
#define Y_OFFSET_L 0x3813 //Bit[7:0]:
#define X_INCREMENT 0x3814 //Bit[7:4]: Horizontal odd subsample increment
//Bit[3:0]: Horizontal even subsample increment
#define Y_INCREMENT 0x3815 //Bit[7:4]: Vertical odd subsample increment
//Bit[3:0]: Vertical even subsample increment
// Size before scaling
//#define X_INPUT_SIZE (X_ADDR_END - X_ADDR_ST + 1 - (2 * X_OFFSET))
//#define Y_INPUT_SIZE (Y_ADDR_END - Y_ADDR_ST + 1 - (2 * Y_OFFSET))
#define ISP_CONTROL_01 0x3021 // Bit[5]: Scale enable
// 0: Disable
// 1: Enable
#define SCALE_CTRL_1 0x5601 // Bit[6:4]: HDIV RW
// DCW scale times
// 000: DCW 1 time
// 001: DCW 2 times
// 010: DCW 4 times
// 100: DCW 8 times
// 101: DCW 16 times
// Others: DCW 16 times
// Bit[2:0]: VDIV RW
// DCW scale times
// 000: DCW 1 time
// 001: DCW 2 times
// 010: DCW 4 times
// 100: DCW 8 times
// 101: DCW 16 times
// Others: DCW 16 times
#define SCALE_CTRL_2 0x5602 // X_SCALE High Bits
#define SCALE_CTRL_3 0x5603 // X_SCALE Low Bits
#define SCALE_CTRL_4 0x5604 // Y_SCALE High Bits
#define SCALE_CTRL_5 0x5605 // Y_SCALE Low Bits
#define SCALE_CTRL_6 0x5606 // Bit[3:0]: V Offset
#define PCLK_RATIO 0x3824 // Bit[4:0]: PCLK ratio manual
#define VFIFO_CTRL0C 0x460C // Bit[1]: PCLK manual enable
// 0: Auto
// 1: Manual by PCLK_RATIO
#define VFIFO_X_SIZE_H 0x4602
#define VFIFO_X_SIZE_L 0x4603
#define VFIFO_Y_SIZE_H 0x4604
#define VFIFO_Y_SIZE_L 0x4605
#define SC_PLLS_CTRL0 0x303a // Bit[7]: PLLS bypass
#define SC_PLLS_CTRL1 0x303b // Bit[4:0]: PLLS multiplier
#define SC_PLLS_CTRL2 0x303c // Bit[6:4]: PLLS charge pump control
// Bit[3:0]: PLLS system divider
#define SC_PLLS_CTRL3 0x303d // Bit[5:4]: PLLS pre-divider
// 00: 1
// 01: 1.5
// 10: 2
// 11: 3
// Bit[2]: PLLS root-divider - 1
// Bit[1:0]: PLLS seld5
// 00: 1
// 01: 1
// 10: 2
// 11: 2.5
#define COMPRESSION_CTRL00 0x4400 //
#define COMPRESSION_CTRL01 0x4401 //
#define COMPRESSION_CTRL02 0x4402 //
#define COMPRESSION_CTRL03 0x4403 //
#define COMPRESSION_CTRL04 0x4404 //
#define COMPRESSION_CTRL05 0x4405 //
#define COMPRESSION_CTRL06 0x4406 //
#define COMPRESSION_CTRL07 0x3401 // Bit[5:0]: QS
#define COMPRESSION_ISI_CTRL 0x4408 //
#define COMPRESSION_CTRL09 0x4409 //
#define COMPRESSION_CTRL0a 0x440a //
#define COMPRESSION_CTRL0b 0x440b //
#define COMPRESSION_CTRL0c 0x440c //
#define COMPRESSION_CTRL0d 0x440d //
#define COMPRESSION_CTRL0E 0x440e //
/**
* @brief register value
*/
#define TEST_COLOR_BAR 0x02 /* Enable Color Bar roling Test */
#define AEC_PK_MANUAL_AGC_MANUALEN 0x02 /* Enable AGC Manual enable */
#define AEC_PK_MANUAL_AEC_MANUALEN 0x01 /* Enable AEC Manual enable */
#define TIMING_TC_REG20_VFLIP 0x01 /* Vertical flip enable */
#define TIMING_TC_REG21_HMIRROR 0x02 /* Horizontal mirror enable */
#endif // __NT99141_REG_REGS_H__

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sensors/private_include/nt99141_settings.h
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#ifndef _NT99141_SETTINGS_H_
#define _NT99141_SETTINGS_H_
#include <stdint.h>
#include <stdbool.h>
#include "esp_attr.h"
#include "nt99141_regs.h"
static const ratio_settings_t ratio_table[] = {
// mw, mh, sx, sy, ex, ey, ox, oy, tx, ty
{ 1280, 720, 0, 4, 1283, 723, 0, 4, 1660, 963 },
};
#define REG_DLY 0xffff
#define REGLIST_TAIL 0x0000
static const DRAM_ATTR uint16_t sensor_default_regs[][2] = {
//initial
{REG_DLY, 10}, // delay 10ms
{0x3109, 0x04},
{0x3040, 0x04},
{0x3041, 0x02},
{0x3042, 0xFF},
{0x3043, 0x08},
{0x3052, 0xE0},
{0x305F, 0x33},
{0x3100, 0x07},
{0x3106, 0x03},
{0x3105, 0x01},
{0x3108, 0x05},
{0x3110, 0x22},
{0x3111, 0x57},
{0x3112, 0x22},
{0x3113, 0x55},
{0x3114, 0x05},
{0x3135, 0x00},
{0x32F0, 0x01},
{0x3290, 0x01},
{0x3291, 0x80},
{0x3296, 0x01},
{0x3297, 0x73},
{0x3250, 0x80},
{0x3251, 0x03},
{0x3252, 0xFF},
{0x3253, 0x00},
{0x3254, 0x03},
{0x3255, 0xFF},
{0x3256, 0x00},
{0x3257, 0x50},
{0x3270, 0x00},
{0x3271, 0x0C},
{0x3272, 0x18},
{0x3273, 0x32},
{0x3274, 0x44},
{0x3275, 0x54},
{0x3276, 0x70},
{0x3277, 0x88},
{0x3278, 0x9D},
{0x3279, 0xB0},
{0x327A, 0xCF},
{0x327B, 0xE2},
{0x327C, 0xEF},
{0x327D, 0xF7},
{0x327E, 0xFF},
{0x3302, 0x00},
{0x3303, 0x40},
{0x3304, 0x00},
{0x3305, 0x96},
{0x3306, 0x00},
{0x3307, 0x29},
{0x3308, 0x07},
{0x3309, 0xBA},
{0x330A, 0x06},
{0x330B, 0xF5},
{0x330C, 0x01},
{0x330D, 0x51},
{0x330E, 0x01},
{0x330F, 0x30},
{0x3310, 0x07},
{0x3311, 0x16},
{0x3312, 0x07},
{0x3313, 0xBA},
{0x3326, 0x02},
{0x32F6, 0x0F},
{0x32F9, 0x42},
{0x32FA, 0x24},
{0x3325, 0x4A},
{0x3330, 0x00},
{0x3331, 0x0A},
{0x3332, 0xFF},
{0x3338, 0x30},
{0x3339, 0x84},
{0x333A, 0x48},
{0x333F, 0x07},
{0x3360, 0x10},
{0x3361, 0x18},
{0x3362, 0x1f},
{0x3363, 0x37},
{0x3364, 0x80},
{0x3365, 0x80},
{0x3366, 0x68},
{0x3367, 0x60},
{0x3368, 0x30},
{0x3369, 0x28},
{0x336A, 0x20},
{0x336B, 0x10},
{0x336C, 0x00},
{0x336D, 0x20},
{0x336E, 0x1C},
{0x336F, 0x18},
{0x3370, 0x10},
{0x3371, 0x38},
{0x3372, 0x3C},
{0x3373, 0x3F},
{0x3374, 0x3F},
{0x338A, 0x34},
{0x338B, 0x7F},
{0x338C, 0x10},
{0x338D, 0x23},
{0x338E, 0x7F},
{0x338F, 0x14},
{0x3375, 0x08},
{0x3376, 0x0C},
{0x3377, 0x18},
{0x3378, 0x20},
{0x3012, 0x02},
{0x3013, 0xD0},
//[JPEG_1280x720_15.00_15.01_Fps]
{0x32BF, 0x60},
{0x32C0, 0x6A},
{0x32C1, 0x6A},
{0x32C2, 0x6A},
{0x32C3, 0x00},
{0x32C4, 0x20},
{0x32C5, 0x20},
{0x32C6, 0x20},
{0x32C7, 0x00},
{0x32C8, 0x91},
{0x32C9, 0x6A},
{0x32CA, 0x8A},
{0x32CB, 0x8A},
{0x32CC, 0x8A},
{0x32CD, 0x8A},
{0x32DB, 0x72},
{0x32F0, 0x70},
{0x3400, 0x08},
{0x3400, 0x00},
{0x3401, 0x4E},
{0x3404, 0x00},
{0x3405, 0x00},
{0x3410, 0x00},
{0x3200, 0x3E},
{0x3201, 0x0F},
{0x3028, 0x07},
{0x3029, 0x00},
{0x302A, 0x04},
{0x3022, 0x24},
{0x3023, 0x24},
{0x3002, 0x00},
{0x3003, 0x04},
{0x3004, 0x00},
{0x3005, 0x04},
{0x3006, 0x05},
{0x3007, 0x03},
{0x3008, 0x02},
{0x3009, 0xD3},
{0x300A, 0x06},
{0x300B, 0x7C},
{0x300C, 0x03},
{0x300D, 0xC3},
{0x300E, 0x05},
{0x300F, 0x00},
{0x3010, 0x02},
{0x3011, 0xD0},
{0x32B8, 0x3F},
{0x32B9, 0x31},
{0x32BB, 0x87},
{0x32BC, 0x38},
{0x32BD, 0x3C},
{0x32BE, 0x34},
{0x3201, 0x3F},
{0x3021, 0x06},
{0x3400, 0x01},
{0x3060, 0x01},
{REGLIST_TAIL, 0x00}, // tail
};
static const DRAM_ATTR uint16_t sensor_fmt_jpeg[][2] = {
{0x32F0, 0x70}, // YUV422
};
static const DRAM_ATTR uint16_t sensor_fmt_raw[][2] = {
{0x32F0, 0x50}, // RAW
};
static const DRAM_ATTR uint16_t sensor_fmt_grayscale[][2] = {
{0x32F1, 0x01},
};
static const DRAM_ATTR uint16_t sensor_fmt_yuv422[][2] = {
{0x32F0, 0x00}, // YUV422
};
static const DRAM_ATTR uint16_t sensor_fmt_rgb565[][2] = {
{0x32F0, 0x01}, // RGB
};
static const DRAM_ATTR uint8_t sensor_saturation_levels[9][1] = {
{0x60},//-4
{0x68},//-3
{0x70},//-2
{0x78},//-1
{0x80},//0
{0x88},//+1
{0x90},//+2
{0x98},//+3
{0xA0},//+4
};
static const DRAM_ATTR uint8_t sensor_special_effects[7][4] = {
{0x00, 0x80, 0x80, 0x01},//Normal
{0x03, 0x80, 0x80, 0x01},//Negative
{0x01, 0x80, 0x80, 0x01},//Grayscale
{0x05, 0x2A, 0xF0, 0x01},//Red Tint
{0x05, 0x60, 0x20, 0x01},//Green Tint
{0x05, 0xF0, 0x80, 0x01},//Blue Tint
{0x02, 0x80, 0x80, 0x01},//Sepia
};
static const DRAM_ATTR uint16_t sensor_framesize_HD[][2] = {
//[JPEG_1280x720_8.18_8.18_Fps]
{REG_DLY, 10}, // delay 10ms
{0x32BF, 0x60},
{0x32C0, 0x5A},
{0x32C1, 0x5A},
{0x32C2, 0x5A},
{0x32C3, 0x00},
{0x32C4, 0x20},
{0x32C5, 0x20},
{0x32C6, 0x20},
{0x32C7, 0x00},
{0x32C8, 0x3C},
{0x32C9, 0x5A},
{0x32CA, 0x7A},
{0x32CB, 0x7A},
{0x32CC, 0x7A},
{0x32CD, 0x7A},
{0x32DB, 0x5E},
{0x32F0, 0x70},
{0x3400, 0x08},
{0x3400, 0x00},
{0x3401, 0x4E},
{0x3404, 0x00},
{0x3405, 0x00},
{0x3410, 0x00},
{0x3200, 0x3E},
{0x3201, 0x0F},
{0x3028, 0x0F},
{0x3029, 0x00},
{0x302A, 0x08},
{0x3022, 0x24},
{0x3023, 0x24},
{0x3002, 0x00},
{0x3003, 0x04},
{0x3004, 0x00},
{0x3005, 0x04},
{0x3006, 0x05},
{0x3007, 0x03},
{0x3008, 0x02},
{0x3009, 0xD3},
{0x300A, 0x06},
{0x300B, 0x7C},
{0x300C, 0x02},
{0x300D, 0xE0},
{0x300E, 0x05},
{0x300F, 0x00},
{0x3010, 0x02},
{0x3011, 0xD0},
{0x32B8, 0x3F},
{0x32B9, 0x31},
{0x32BB, 0x87},
{0x32BC, 0x38},
{0x32BD, 0x3C},
{0x32BE, 0x34},
{0x3201, 0x3F},
{0x3021, 0x06},
{0x3400, 0x01},
{0x3060, 0x01},
{REGLIST_TAIL, 0x00}, // tail
};
static const DRAM_ATTR uint16_t sensor_framesize_VGA[][2] = {
//[JPEG_640x480_10.14_10.14_Fps]
{REG_DLY, 10}, // delay 10ms
{0x32BF, 0x60},
{0x32C0, 0x5A},
{0x32C1, 0x5A},
{0x32C2, 0x5A},
{0x32C3, 0x00},
{0x32C4, 0x20},
{0x32C5, 0x20},
{0x32C6, 0x20},
{0x32C7, 0x00},
{0x32C8, 0x4B},
{0x32C9, 0x5A},
{0x32CA, 0x7A},
{0x32CB, 0x7A},
{0x32CC, 0x7A},
{0x32CD, 0x7A},
{0x32DB, 0x62},
{0x32F0, 0x70},
{0x3400, 0x08},
{0x3400, 0x00},
{0x3401, 0x4E},
{0x3404, 0x00},
{0x3405, 0x00},
{0x3410, 0x00},
{0x32E0, 0x02},
{0x32E1, 0x80},
{0x32E2, 0x01},
{0x32E3, 0xE0},
{0x32E4, 0x00},
{0x32E5, 0x80},
{0x32E6, 0x00},
{0x32E7, 0x80},
{0x3200, 0x3E},
{0x3201, 0x0F},
{0x3028, 0x0F},
{0x3029, 0x00},
{0x302A, 0x08},
{0x3022, 0x24},
{0x3023, 0x24},
{0x3002, 0x00},
{0x3003, 0xA4},
{0x3004, 0x00},
{0x3005, 0x04},
{0x3006, 0x04},
{0x3007, 0x63},
{0x3008, 0x02},
{0x3009, 0xD3},
{0x300A, 0x05},
{0x300B, 0x3C},
{0x300C, 0x02},
{0x300D, 0xE0},
{0x300E, 0x03},
{0x300F, 0xC0},
{0x3010, 0x02},
{0x3011, 0xD0},
{0x32B8, 0x3F},
{0x32B9, 0x31},
{0x32BB, 0x87},
{0x32BC, 0x38},
{0x32BD, 0x3C},
{0x32BE, 0x34},
{0x3201, 0x7F},
{0x3021, 0x06},
{0x3400, 0x01},
{0x3060, 0x01},
{REGLIST_TAIL, 0x00}, // tail
};
static const DRAM_ATTR uint16_t sensor_framesize_QVGA[][2] = {
//[JPEG_320x240_10.14_10.14_Fps]
{REG_DLY, 10}, // delay 10ms
{0x32BF, 0x60},
{0x32C0, 0x5A},
{0x32C1, 0x5A},
{0x32C2, 0x5A},
{0x32C3, 0x00},
{0x32C4, 0x20},
{0x32C5, 0x20},
{0x32C6, 0x20},
{0x32C7, 0x00},
{0x32C8, 0x4B},
{0x32C9, 0x5A},
{0x32CA, 0x7A},
{0x32CB, 0x7A},
{0x32CC, 0x7A},
{0x32CD, 0x7A},
{0x32DB, 0x62},
{0x32F0, 0x70},
{0x3400, 0x08},
{0x3400, 0x00},
{0x3401, 0x4E},
{0x3404, 0x00},
{0x3405, 0x00},
{0x3410, 0x00},
{0x32E0, 0x01},
{0x32E1, 0x40},
{0x32E2, 0x00},
{0x32E3, 0xF0},
{0x32E4, 0x02},
{0x32E5, 0x02},
{0x32E6, 0x02},
{0x32E7, 0x03},
{0x3200, 0x3E},
{0x3201, 0x0F},
{0x3028, 0x0F},
{0x3029, 0x00},
{0x302A, 0x08},
{0x3022, 0x24},
{0x3023, 0x24},
{0x3002, 0x00},
{0x3003, 0xA4},
{0x3004, 0x00},
{0x3005, 0x04},
{0x3006, 0x04},
{0x3007, 0x63},
{0x3008, 0x02},
{0x3009, 0xD3},
{0x300A, 0x05},
{0x300B, 0x3C},
{0x300C, 0x02},
{0x300D, 0xE0},
{0x300E, 0x03},
{0x300F, 0xC0},
{0x3010, 0x02},
{0x3011, 0xD0},
{0x32B8, 0x3F},
{0x32B9, 0x31},
{0x32BB, 0x87},
{0x32BC, 0x38},
{0x32BD, 0x3C},
{0x32BE, 0x34},
{0x3201, 0x7F},
{0x3021, 0x06},
{0x3400, 0x01},
{0x3060, 0x01},
{REGLIST_TAIL, 0x00}, // tail
};
static const DRAM_ATTR uint16_t sensor_framesize_VGA_xskip[][2] = {
//[JPEG_640x480_Xskip_13.32_13.32_Fps]
{REG_DLY, 10}, // delay 10ms
{0x32BF, 0x60},
{0x32C0, 0x5A},
{0x32C1, 0x5A},
{0x32C2, 0x5A},
{0x32C3, 0x00},
{0x32C4, 0x20},
{0x32C5, 0x20},
{0x32C6, 0x20},
{0x32C7, 0x00},
{0x32C8, 0x62},
{0x32C9, 0x5A},
{0x32CA, 0x7A},
{0x32CB, 0x7A},
{0x32CC, 0x7A},
{0x32CD, 0x7A},
{0x32DB, 0x68},
{0x32F0, 0x70},
{0x3400, 0x08},
{0x3400, 0x00},
{0x3401, 0x4E},
{0x3404, 0x00},
{0x3405, 0x00},
{0x3410, 0x00},
{0x32E0, 0x02},
{0x32E1, 0x80},
{0x32E2, 0x01},
{0x32E3, 0xE0},
{0x32E4, 0x00},
{0x32E5, 0x00},
{0x32E6, 0x00},
{0x32E7, 0x80},
{0x3200, 0x3E},
{0x3201, 0x0F},
{0x3028, 0x0F},
{0x3029, 0x00},
{0x302A, 0x08},
{0x3022, 0x24},
{0x3023, 0x2C},
{0x3002, 0x00},
{0x3003, 0x04},
{0x3004, 0x00},
{0x3005, 0x04},
{0x3006, 0x05},
{0x3007, 0x03},
{0x3008, 0x02},
{0x3009, 0xD3},
{0x300A, 0x03},
{0x300B, 0xFC},
{0x300C, 0x02},
{0x300D, 0xE0},
{0x300E, 0x02},
{0x300F, 0x80},
{0x3010, 0x02},
{0x3011, 0xD0},
{0x32B8, 0x3F},
{0x32B9, 0x31},
{0x32BB, 0x87},
{0x32BC, 0x38},
{0x32BD, 0x3C},
{0x32BE, 0x34},
{0x3201, 0x7F},
{0x3021, 0x06},
{0x3400, 0x01},
{0x3060, 0x01},
{REGLIST_TAIL, 0x00}, // tail
};
static const DRAM_ATTR uint16_t sensor_framesize_QVGA_xskip[][2] = {
{REG_DLY, 10}, // delay 10ms
//[JPEG_320x240_Xskip_13.32_13.32_Fps]
{0x32BF, 0x60},
{0x32C0, 0x5A},
{0x32C1, 0x5A},
{0x32C2, 0x5A},
{0x32C3, 0x00},
{0x32C4, 0x20},
{0x32C5, 0x20},
{0x32C6, 0x20},
{0x32C7, 0x00},
{0x32C8, 0x62},
{0x32C9, 0x5A},
{0x32CA, 0x7A},
{0x32CB, 0x7A},
{0x32CC, 0x7A},
{0x32CD, 0x7A},
{0x32DB, 0x68},
{0x32F0, 0x70},
{0x3400, 0x08},
{0x3400, 0x00},
{0x3401, 0x4E},
{0x3404, 0x00},
{0x3405, 0x00},
{0x3410, 0x00},
{0x32E0, 0x01},
{0x32E1, 0x40},
{0x32E2, 0x00},
{0x32E3, 0xF0},
{0x32E4, 0x01},
{0x32E5, 0x01},
{0x32E6, 0x02},
{0x32E7, 0x03},
{0x3200, 0x3E},
{0x3201, 0x0F},
{0x3028, 0x0F},
{0x3029, 0x00},
{0x302A, 0x08},
{0x3022, 0x24},
{0x3023, 0x2C},
{0x3002, 0x00},
{0x3003, 0x04},
{0x3004, 0x00},
{0x3005, 0x04},
{0x3006, 0x05},
{0x3007, 0x03},
{0x3008, 0x02},
{0x3009, 0xD3},
{0x300A, 0x03},
{0x300B, 0xFC},
{0x300C, 0x02},
{0x300D, 0xE0},
{0x300E, 0x02},
{0x300F, 0x80},
{0x3010, 0x02},
{0x3011, 0xD0},
{0x32B8, 0x3F},
{0x32B9, 0x31},
{0x32BB, 0x87},
{0x32BC, 0x38},
{0x32BD, 0x3C},
{0x32BE, 0x34},
{0x3201, 0x7F},
{0x3021, 0x06},
{0x3400, 0x01},
{0x3060, 0x01},
{REGLIST_TAIL, 0x00}, // tail
};
static const DRAM_ATTR uint16_t sensor_framesize_VGA_crop[][2] = {
//[JPEG_640x480_Crop_19.77_19.77_Fps]
{REG_DLY, 10}, // delay 10ms
{0x32BF, 0x60},
{0x32C0, 0x5A},
{0x32C1, 0x5A},
{0x32C2, 0x5A},
{0x32C3, 0x00},
{0x32C4, 0x20},
{0x32C5, 0x20},
{0x32C6, 0x20},
{0x32C7, 0x00},
{0x32C8, 0x62},
{0x32C9, 0x5A},
{0x32CA, 0x7A},
{0x32CB, 0x7A},
{0x32CC, 0x7A},
{0x32CD, 0x7A},
{0x32DB, 0x68},
{0x32F0, 0x70},
{0x3400, 0x08},
{0x3400, 0x00},
{0x3401, 0x4E},
{0x3404, 0x00},
{0x3405, 0x00},
{0x3410, 0x00},
{0x3200, 0x3E},
{0x3201, 0x0F},
{0x3028, 0x0F},
{0x3029, 0x00},
{0x302A, 0x08},
{0x3022, 0x24},
{0x3023, 0x24},
{0x3002, 0x01},
{0x3003, 0x44},
{0x3004, 0x00},
{0x3005, 0x7C},
{0x3006, 0x03},
{0x3007, 0xC3},
{0x3008, 0x02},
{0x3009, 0x5B},
{0x300A, 0x03},
{0x300B, 0xFC},
{0x300C, 0x01},
{0x300D, 0xF0},
{0x300E, 0x02},
{0x300F, 0x80},
{0x3010, 0x01},
{0x3011, 0xE0},
{0x32B8, 0x3F},
{0x32B9, 0x31},
{0x32BB, 0x87},
{0x32BC, 0x38},
{0x32BD, 0x3C},
{0x32BE, 0x34},
{0x3201, 0x3F},
{0x3021, 0x06},
{0x3400, 0x01},
{0x3060, 0x01},
{REGLIST_TAIL, 0x00}, // tail
};
static const DRAM_ATTR uint16_t sensor_framesize_QVGA_crop[][2] = {
//[JPEG_320x240_Crop_19.77_19.77_Fps]
{REG_DLY, 10}, // delay 10ms
{0x32BF, 0x60},
{0x32C0, 0x5A},
{0x32C1, 0x5A},
{0x32C2, 0x5A},
{0x32C3, 0x00},
{0x32C4, 0x20},
{0x32C5, 0x20},
{0x32C6, 0x20},
{0x32C7, 0x00},
{0x32C8, 0x62},
{0x32C9, 0x5A},
{0x32CA, 0x7A},
{0x32CB, 0x7A},
{0x32CC, 0x7A},
{0x32CD, 0x7A},
{0x32DB, 0x68},
{0x32F0, 0x70},
{0x3400, 0x08},
{0x3400, 0x00},
{0x3401, 0x4E},
{0x3404, 0x00},
{0x3405, 0x00},
{0x3410, 0x00},
{0x32E0, 0x01},
{0x32E1, 0x40},
{0x32E2, 0x00},
{0x32E3, 0xF0},
{0x32E4, 0x01},
{0x32E5, 0x01},
{0x32E6, 0x01},
{0x32E7, 0x02},
{0x3200, 0x3E},
{0x3201, 0x0F},
{0x3028, 0x0F},
{0x3029, 0x00},
{0x302A, 0x08},
{0x3022, 0x24},
{0x3023, 0x24},
{0x3002, 0x01},
{0x3003, 0x44},
{0x3004, 0x00},
{0x3005, 0x7C},
{0x3006, 0x03},
{0x3007, 0xC3},
{0x3008, 0x02},
{0x3009, 0x5B},
{0x300A, 0x03},
{0x300B, 0xFC},
{0x300C, 0x01},
{0x300D, 0xF0},
{0x300E, 0x02},
{0x300F, 0x80},
{0x3010, 0x01},
{0x3011, 0xE0},
{0x32B8, 0x3F},
{0x32B9, 0x31},
{0x32BB, 0x87},
{0x32BC, 0x38},
{0x32BD, 0x3C},
{0x32BE, 0x34},
{0x3201, 0x7F},
{0x3021, 0x06},
{0x3400, 0x01},
{0x3060, 0x01},
{REGLIST_TAIL, 0x00}, // tail
};
#endif
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