wonderfullook
2 years ago
16 changed files with 1984 additions and 38 deletions
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,14 @@
@@ -0,0 +1,14 @@
|
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<?xml version="1" encoding="UTF-8"?> |
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<!DOCTYPE gowin-fpga-project> |
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<Project> |
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<Template>FPGA</Template> |
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<Version>5</Version> |
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<Device name="GW2AR-18C" pn="GW2AR-LV18QN88PC8/I7">gw2ar18c-011</Device> |
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<FileList> |
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<File path="src/TOP.v" type="file.verilog" enable="1"/> |
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<File path="src/VGAMod.v" type="file.verilog" enable="1"/> |
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<File path="src/gowin_rpll/gowin_rpll.v" type="file.verilog" enable="1"/> |
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<File path="src/Tang_nano_20K_LCD.cst" type="file.cst" enable="1"/> |
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<File path="src/Tang_nano_20K_LCD.sdc" type="file.sdc" enable="1"/> |
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</FileList> |
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</Project> |
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@ -0,0 +1,13 @@
@@ -0,0 +1,13 @@
|
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<?xml version="1" encoding="UTF-8"?> |
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<!DOCTYPE ProjectUserData> |
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<UserConfig> |
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<Version>1.0</Version> |
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<FlowState> |
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<Process ID="Synthesis" State="0"/> |
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<Process ID="Pnr" State="0"/> |
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<Process ID="Gao" State="0"/> |
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<Process ID="Rtl_Gao" State="0"/> |
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</FlowState> |
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<ResultFileList/> |
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<Ui>000000ff00000001fd000000020000000000000100000002dcfc0200000001fc00000037000002dc0000000000fffffffaffffffff0200000003fb00000030004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00440065007300690067006e0100000000ffffffff0000000000000000fb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00500072006f00630065007300730100000000ffffffff0000000000000000fb00000036004600700067006100500072006f006a006500630074002e00500061006e0065006c002e0048006900650072006100720063006800790100000000ffffffff000000000000000000000003000005d10000010bfc0100000001fc00000000000005d10000000000fffffffaffffffff0100000002fb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00470065006e006500720061006c0100000000ffffffff0000000000000000fb0000002e004600700067006100500072006f006a006500630074002e00500061006e0065006c002e004900730073007500650100000000ffffffff0000000000000000000004cd000002dc00000004000000040000000800000008fc000000010000000200000003000000220043006f00720065002e0054006f006f006c006200610072002e00460069006c00650100000000ffffffff0000000000000000000000220043006f00720065002e0054006f006f006c006200610072002e004500640069007401000000adffffffff0000000000000000000000240043006f00720065002e0054006f006f006c006200610072002e0054006f006f006c0073010000017fffffffff0000000000000000</Ui> |
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</UserConfig> |
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@ -0,0 +1,82 @@
@@ -0,0 +1,82 @@
|
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{ |
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"Allow_Duplicate_Modules" : false, |
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"Annotated_Properties_for_Analyst" : true, |
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"BACKGROUND_PROGRAMMING" : "off", |
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"COMPRESS" : false, |
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"CRC_CHECK" : true, |
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"Clock_Conversion" : true, |
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"DONE" : false, |
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"DOWNLOAD_SPEED" : "250/20", |
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"Default_Enum_Encoding" : "default", |
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"Disable_Insert_Pad" : false, |
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"ENCRYPTION_KEY" : false, |
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"ENCRYPTION_KEY_TEXT" : "00000000000000000000000000000000", |
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"FORMAT" : "txt", |
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"FSM Compiler" : true, |
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"Fanout_Guide" : 10000, |
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"Frequency" : "Auto", |
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"Generate_Constraint_File_of_Ports" : false, |
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"Generate_IBIS_File" : false, |
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"Generate_Plain_Text_Timing_Report" : false, |
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"Generate_Post_PNR_Simulation_Model_File" : false, |
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"Generate_Post_Place_File" : false, |
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"Generate_SDF_File" : false, |
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"GwSyn_Loop_Limit" : 2000, |
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"HOTBOOT" : false, |
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"I2C" : false, |
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"I2C_SLAVE_ADDR" : "00", |
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"Implicit_Initial_Value_Support" : false, |
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"IncludePath" : [ |
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|
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], |
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"Incremental_Compile" : "", |
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"Initialize_Primitives" : false, |
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"JTAG" : false, |
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"MODE_IO" : false, |
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"MSPI" : true, |
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"Multiple_File_Compilation_Unit" : true, |
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"Number_of_Critical_Paths" : "", |
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"Number_of_Start/End_Points" : "", |
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"OUTPUT_BASE_NAME" : "Tang_Nano_20K_LCD", |
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"POWER_ON_RESET_MONITOR" : true, |
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"PRINT_BSRAM_VALUE" : true, |
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"PROGRAM_DONE_BYPASS" : false, |
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"Pipelining" : true, |
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"PlaceInRegToIob" : true, |
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"PlaceIoRegToIob" : true, |
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"PlaceOutRegToIob" : true, |
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"Place_Option" : "0", |
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"Process_Configuration_Verion" : "1.0", |
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"Promote_Physical_Constraint_Warning_to_Error" : false, |
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"Push_Tristates" : true, |
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"READY" : false, |
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"RECONFIG_N" : false, |
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"Ram_RW_Check" : true, |
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"Report_Auto-Placed_Io_Information" : false, |
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"Resolve_Mixed_Drivers" : false, |
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"Resource_Sharing" : true, |
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"Retiming" : false, |
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"Route_Maxfan" : 23, |
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"Route_Option" : "0", |
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"Run_Timing_Driven" : true, |
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"SECURE_MODE" : false, |
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"SECURITY_BIT" : true, |
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"SPI_FLASH_ADDR" : "00000000", |
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"SSPI" : true, |
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"Show_All_Warnings" : false, |
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"Synthesis On/Off Implemented as Translate On/Off" : false, |
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"Synthesize_tool" : "GowinSyn", |
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"TopModule" : "TOP", |
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"USERCODE" : "default", |
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"Unused_Pin" : "As_input_tri_stated_with_pull_up", |
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"Update_Compile_Point_Timing_Data" : false, |
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"Use_Clock_Period_for_Unconstrainted IO" : false, |
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"Use_SCF" : false, |
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"VHDL_Standard" : "VHDL_Std_1993", |
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"Verilog_Standard" : "Vlg_Std_Sysv2017", |
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"WAKE_UP" : "0", |
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"Write_Vendor_Constraint_File" : true, |
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"dsp_balance" : false, |
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"show_all_warnings" : false, |
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"turn_off_bg" : false |
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} |
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@ -0,0 +1,72 @@
@@ -0,0 +1,72 @@
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module TOP |
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( |
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input Reset_Button, |
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input User_Button, |
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input XTAL_IN, |
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|
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output LCD_CLK, |
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output LCD_HYNC, |
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output LCD_SYNC, |
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output LCD_DEN, |
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output [4:0] LCD_R, |
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output [5:0] LCD_G, |
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output [4:0] LCD_B, |
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output [5:0] LED |
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); |
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|
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|
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wire CLK_SYS; |
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wire CLK_PIX; |
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wire oscout_o; |
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Gowin_rPLL chip_pll |
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( |
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.clkout(CLK_PIX), //output clkout |
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.clkin(XTAL_IN) //input clkin |
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); |
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|
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VGAMod D1 |
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( |
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.nRST ( Reset_Button), |
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.PixelClk ( CLK_PIX ), |
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.LCD_DE ( LCD_DEN ), |
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.LCD_HSYNC ( LCD_HYNC ), |
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.LCD_VSYNC ( LCD_SYNC ), |
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|
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.LCD_B ( LCD_B ), |
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.LCD_G ( LCD_G ), |
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.LCD_R ( LCD_R ) |
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); |
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assign LCD_CLK = CLK_PIX; |
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|
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|
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//LED drive |
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reg [31:0] counter; |
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reg [5:0] LED; |
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always @(posedge XTAL_IN or negedge Reset_Button) begin |
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if (!Reset_Button) |
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counter <= 24'd0; |
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else if (counter < 24'd400_0000) // 0.5s delay |
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counter <= counter + 1; |
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else |
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counter <= 24'd0; |
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end |
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|
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always @(posedge XTAL_IN or negedge Reset_Button) begin |
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if (!Reset_Button) |
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LED <= 6'b111110; |
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else if (counter == 24'd400_0000) // 0.5s delay |
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LED[5:0] <= {LED[4:0],LED[5]}; |
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else |
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LED <= LED; |
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end |
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|
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endmodule |
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@ -0,0 +1,44 @@
@@ -0,0 +1,44 @@
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IO_LOC "LCD_B[4]" 27; |
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IO_PORT "LCD_B[4]" IO_TYPE=LVCMOS33; |
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IO_LOC "LCD_B[3]" 28; |
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IO_PORT "LCD_B[3]" IO_TYPE=LVCMOS33; |
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IO_LOC "LCD_B[2]" 29; |
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IO_PORT "LCD_B[2]" IO_TYPE=LVCMOS33; |
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IO_LOC "LCD_B[1]" 30; |
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IO_PORT "LCD_B[1]" IO_TYPE=LVCMOS33; |
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IO_LOC "LCD_B[0]" 31; |
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IO_PORT "LCD_B[0]" IO_TYPE=LVCMOS33; |
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IO_LOC "LCD_G[5]" 32; |
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IO_PORT "LCD_G[5]" IO_TYPE=LVCMOS33; |
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IO_LOC "LCD_G[4]" 33; |
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IO_PORT "LCD_G[4]" IO_TYPE=LVCMOS33; |
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IO_LOC "LCD_G[3]" 34; |
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IO_PORT "LCD_G[3]" IO_TYPE=LVCMOS33; |
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IO_LOC "LCD_G[2]" 35; |
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IO_PORT "LCD_G[2]" IO_TYPE=LVCMOS33; |
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IO_LOC "LCD_G[1]" 36; |
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IO_PORT "LCD_G[1]" IO_TYPE=LVCMOS33; |
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IO_LOC "LCD_G[0]" 37; |
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IO_PORT "LCD_G[0]" IO_TYPE=LVCMOS33; |
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IO_LOC "LCD_R[4]" 38; |
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IO_PORT "LCD_R[4]" IO_TYPE=LVCMOS33; |
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IO_LOC "LCD_R[3]" 39; |
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IO_PORT "LCD_R[3]" IO_TYPE=LVCMOS33; |
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IO_LOC "LCD_R[2]" 40; |
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IO_PORT "LCD_R[2]" IO_TYPE=LVCMOS33; |
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IO_LOC "LCD_R[1]" 41; |
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IO_PORT "LCD_R[1]" IO_TYPE=LVCMOS33; |
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IO_LOC "LCD_R[0]" 42; |
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IO_PORT "LCD_R[0]" IO_TYPE=LVCMOS33; |
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IO_LOC "LCD_DEN" 48; |
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IO_PORT "LCD_DEN" IO_TYPE=LVCMOS33; |
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IO_LOC "LCD_SYNC" 25; |
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IO_PORT "LCD_SYNC" IO_TYPE=LVCMOS33; |
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IO_LOC "LCD_HYNC" 26; |
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IO_PORT "LCD_HYNC" IO_TYPE=LVCMOS33; |
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IO_LOC "LCD_CLK" 77; |
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IO_PORT "LCD_CLK" IO_TYPE=LVCMOS33; |
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IO_LOC "XTAL_IN" 4; |
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IO_PORT "XTAL_IN" PULL_MODE=NONE; |
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IO_LOC "Reset_Button" 4; |
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IO_LOC "User_Button" 3; |
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@ -0,0 +1,7 @@
@@ -0,0 +1,7 @@
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//Copyright (C)2014-2021 GOWIN Semiconductor Corporation. |
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//All rights reserved. |
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//File Title: Timing Constraints file |
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//GOWIN Version: 1.9.6.02 Beta |
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//Created Time: 2021-11-04 19:03:59 |
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create_clock -name XTAL -period 37.037 -waveform {0 18.518} [get_ports {XTAL_IN}] -add |
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create_clock -name LCD_CLK -period 30.03 -waveform {0 15.015} [get_ports {LCD_CLK}] -add |
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@ -0,0 +1,127 @@
@@ -0,0 +1,127 @@
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module VGAMod |
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( |
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input CLK, |
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input nRST, |
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|
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input PixelClk, |
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|
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output LCD_DE, |
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output LCD_HSYNC, |
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output LCD_VSYNC, |
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|
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output [4:0] LCD_B, |
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output [5:0] LCD_G, |
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output [4:0] LCD_R |
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); |
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|
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reg [15:0] PixelCount; |
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reg [15:0] LineCount; |
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|
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localparam V_BackPorch = 16'd0; //6 |
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localparam V_Pluse = 16'd5; |
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localparam HightPixel = 16'd480; |
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localparam V_FrontPorch= 16'd45; //62 |
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|
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localparam H_BackPorch = 16'd182; //NOTE: 高像素时钟时，增加这里的延迟，方便K210加入中断 |
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localparam H_Pluse = 16'd1; |
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localparam WidthPixel = 16'd800; |
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localparam H_FrontPorch= 16'd210; |
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|
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localparam Width_bar = 45; |
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reg [15:0] BarCount; |
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|
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localparam PixelForHS = WidthPixel + H_BackPorch + H_FrontPorch; |
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localparam LineForVS = HightPixel + V_BackPorch + V_FrontPorch; |
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always @( posedge PixelClk or negedge nRST )begin |
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if( !nRST ) begin |
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LineCount <= 16'b0; |
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PixelCount <= 16'b0; |
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end |
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else if( PixelCount == PixelForHS ) begin |
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PixelCount <= 16'b0; |
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LineCount <= LineCount + 1'b1; |
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end |
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else if( LineCount == LineForVS ) begin |
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LineCount <= 16'b0; |
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PixelCount <= 16'b0; |
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end |
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else |
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PixelCount <= PixelCount + 1'b1; |
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end |
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reg [9:0] Data_R; |
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reg [9:0] Data_G; |
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reg [9:0] Data_B; |
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always @( posedge PixelClk or negedge nRST )begin |
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if( !nRST ) begin |
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Data_R <= 9'b0; |
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Data_G <= 9'b0; |
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Data_B <= 9'b0; |
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BarCount <=9'd5; |
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end |
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else begin |
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end |
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end |
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|
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//注意这里HSYNC和VSYNC负极性 |
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assign LCD_HSYNC = (( PixelCount >= H_Pluse)&&( PixelCount <= (PixelForHS-H_FrontPorch))) ? 1'b0 : 1'b1; |
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//assign LCD_VSYNC = ((( LineCount >= 0 )&&( LineCount <= (V_Pluse-1) )) ) ? 1'b1 : 1'b0; //这里不减一的话，图片底部会往下拖尾？ |
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assign LCD_VSYNC = ((( LineCount >= V_Pluse )&&( LineCount <= (LineForVS-0) )) ) ? 1'b0 : 1'b1; |
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//assign FIFO_RST = (( PixelCount ==0)) ? 1'b1 : 1'b0; //留给主机H_BackPorch的时间进入中断，发送数据 |
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|
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assign LCD_DE = ( ( PixelCount >= H_BackPorch )&& |
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( PixelCount <= PixelForHS-H_FrontPorch ) && |
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( LineCount >= V_BackPorch ) && |
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( LineCount <= LineForVS-V_FrontPorch-1 )) ? 1'b1 : 1'b0; |
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//这里不减一，会抖动 |
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|
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// assign LCD_R = (PixelCount<200)? 5'b00000 : |
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// (PixelCount<240 ? 5'b00001 : |
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// (PixelCount<280 ? 5'b00010 : |
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// (PixelCount<320 ? 5'b00100 : |
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// (PixelCount<360 ? 5'b01000 : |
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// (PixelCount<400 ? 5'b10000 : 5'b00000 ))))); |
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|
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// assign LCD_G = (PixelCount<400)? 6'b000000 : |
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// (PixelCount<440 ? 6'b000001 : |
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// (PixelCount<480 ? 6'b000010 : |
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// (PixelCount<520 ? 6'b000100 : |
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// (PixelCount<560 ? 6'b001000 : |
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// (PixelCount<600 ? 6'b010000 : |
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// (PixelCount<640 ? 6'b100000 : 6'b000000 )))))); |
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|
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// assign LCD_B = (PixelCount<640)? 5'b00000 : |
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// (PixelCount<680 ? 5'b00001 : |
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// (PixelCount<720 ? 5'b00010 : |
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// (PixelCount<760 ? 5'b00100 : |
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// (PixelCount<800 ? 5'b01000 : |
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// (PixelCount<840 ? 5'b10000 : 5'b00000 ))))); |
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|
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|
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assign LCD_R = (PixelCount<Width_bar*BarCount)? 5'b00000 : |
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(PixelCount<(Width_bar*(BarCount+1)) ? 5'b00001 : |
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(PixelCount<(Width_bar*(BarCount+2)) ? 5'b00010 : |
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(PixelCount<(Width_bar*(BarCount+3)) ? 5'b00100 : |
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(PixelCount<(Width_bar*(BarCount+4)) ? 5'b01000 : |
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(PixelCount<(Width_bar*(BarCount+5)) ? 5'b10000 : 5'b00000 ))))); |
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|
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assign LCD_G = (PixelCount<(Width_bar*(BarCount+5)))? 6'b000000 : |
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(PixelCount<(Width_bar*(BarCount+6)) ? 6'b000001 : |
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(PixelCount<(Width_bar*(BarCount+7)) ? 6'b000010 : |
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(PixelCount<(Width_bar*(BarCount+8)) ? 6'b000100 : |
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(PixelCount<(Width_bar*(BarCount+9)) ? 6'b001000 : |
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(PixelCount<(Width_bar*(BarCount+10)) ? 6'b010000 : |
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(PixelCount<(Width_bar*(BarCount+11)) ? 6'b100000 : 6'b000000 )))))); |
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|
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assign LCD_B = (PixelCount<(Width_bar*(BarCount+11)))? 5'b00000 : |
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(PixelCount<(Width_bar*(BarCount+12)) ? 5'b00001 : |
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(PixelCount<(Width_bar*(BarCount+13)) ? 5'b00010 : |
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(PixelCount<(Width_bar*(BarCount+14)) ? 5'b00100 : |
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(PixelCount<(Width_bar*(BarCount+15)) ? 5'b01000 : |
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(PixelCount<(Width_bar*(BarCount+16)) ? 5'b10000 : 5'b00000 ))))); |
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|
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endmodule |
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@ -0,0 +1,24 @@
@@ -0,0 +1,24 @@
|
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[General] |
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ipc_version=4 |
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file=gowin_rpll |
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module=Gowin_rPLL |
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target_device=gw2ar18c-000 |
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type=clock_rpll |
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version=1.0 |
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|
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[Config] |
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CKLOUTD3=false |
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CLKFB_SOURCE=0 |
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CLKIN_FREQ=27 |
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CLKOUTD=false |
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CLKOUTP=false |
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CLKOUT_BYPASS=false |
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CLKOUT_DIVIDE_DYN=true |
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CLKOUT_FREQ=33 |
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CLKOUT_TOLERANCE=0 |
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DYNAMIC=true |
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LANG=0 |
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LOCK_EN=false |
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MODE_GENERAL=true |
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PLL_PWD=false |
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RESET_PLL=false |
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@ -0,0 +1,32 @@
@@ -0,0 +1,32 @@
|
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-series GW2AR |
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-device GW2AR-18C |
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-package QFN88 |
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-part_number GW2AR-LV18QN88C8/I7 |
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|
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|
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-mod_name Gowin_rPLL |
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-file_name gowin_rpll |
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-path F:/TangNano-20K-example/5_inch_lcd/src/gowin_rpll/ |
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-type PLL |
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-rPll true |
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-file_type vlg |
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-dev_type GW2AR-18C |
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-dyn_idiv_sel false |
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-idiv_sel 9 |
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-dyn_fbdiv_sel false |
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-fbdiv_sel 11 |
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-dyn_odiv_sel false |
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-odiv_sel 16 |
||||
-dyn_da_en true |
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-rst_sig false |
||||
-rst_sig_p false |
||||
-fclkin 27 |
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-clkfb_sel 0 |
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-en_lock false |
||||
-clkout_bypass false |
||||
-clkout_ft_dir 1 |
||||
-en_clkoutp false |
||||
-clkoutp_bypass false |
||||
-en_clkoutd false |
||||
-clkoutd_bypass false |
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-en_clkoutd3 false |
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@ -0,0 +1,63 @@
@@ -0,0 +1,63 @@
|
||||
//Copyright (C)2014-2022 Gowin Semiconductor Corporation. |
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//All rights reserved. |
||||
//File Title: IP file |
||||
//GOWIN Version: V1.9.8.09 |
||||
//Part Number: GW2AR-LV18QN88C8/I7 |
||||
//Device: GW2AR-18C |
||||
//Created Time: Thu Mar 23 10:55:30 2023 |
||||
|
||||
module Gowin_rPLL (clkout, clkin); |
||||
|
||||
output clkout; |
||||
input clkin; |
||||
|
||||
wire lock_o; |
||||
wire clkoutp_o; |
||||
wire clkoutd_o; |
||||
wire clkoutd3_o; |
||||
wire gw_gnd; |
||||
|
||||
assign gw_gnd = 1'b0; |
||||
|
||||
rPLL rpll_inst ( |
||||
.CLKOUT(clkout), |
||||
.LOCK(lock_o), |
||||
.CLKOUTP(clkoutp_o), |
||||
.CLKOUTD(clkoutd_o), |
||||
.CLKOUTD3(clkoutd3_o), |
||||
.RESET(gw_gnd), |
||||
.RESET_P(gw_gnd), |
||||
.CLKIN(clkin), |
||||
.CLKFB(gw_gnd), |
||||
.FBDSEL({gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd}), |
||||
.IDSEL({gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd}), |
||||
.ODSEL({gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd}), |
||||
.PSDA({gw_gnd,gw_gnd,gw_gnd,gw_gnd}), |
||||
.DUTYDA({gw_gnd,gw_gnd,gw_gnd,gw_gnd}), |
||||
.FDLY({gw_gnd,gw_gnd,gw_gnd,gw_gnd}) |
||||
); |
||||
|
||||
defparam rpll_inst.FCLKIN = "27"; |
||||
defparam rpll_inst.DYN_IDIV_SEL = "false"; |
||||
defparam rpll_inst.IDIV_SEL = 8; |
||||
defparam rpll_inst.DYN_FBDIV_SEL = "false"; |
||||
defparam rpll_inst.FBDIV_SEL = 10; |
||||
defparam rpll_inst.DYN_ODIV_SEL = "false"; |
||||
defparam rpll_inst.ODIV_SEL = 16; |
||||
defparam rpll_inst.PSDA_SEL = "0000"; |
||||
defparam rpll_inst.DYN_DA_EN = "true"; |
||||
defparam rpll_inst.DUTYDA_SEL = "1000"; |
||||
defparam rpll_inst.CLKOUT_FT_DIR = 1'b1; |
||||
defparam rpll_inst.CLKOUTP_FT_DIR = 1'b1; |
||||
defparam rpll_inst.CLKOUT_DLY_STEP = 0; |
||||
defparam rpll_inst.CLKOUTP_DLY_STEP = 0; |
||||
defparam rpll_inst.CLKFB_SEL = "internal"; |
||||
defparam rpll_inst.CLKOUT_BYPASS = "false"; |
||||
defparam rpll_inst.CLKOUTP_BYPASS = "false"; |
||||
defparam rpll_inst.CLKOUTD_BYPASS = "false"; |
||||
defparam rpll_inst.DYN_SDIV_SEL = 2; |
||||
defparam rpll_inst.CLKOUTD_SRC = "CLKOUT"; |
||||
defparam rpll_inst.CLKOUTD3_SRC = "CLKOUT"; |
||||
defparam rpll_inst.DEVICE = "GW2AR-18C"; |
||||
|
||||
endmodule //Gowin_rPLL |
||||
@ -0,0 +1,82 @@
@@ -0,0 +1,82 @@
|
||||
{ |
||||
"Allow_Duplicate_Modules" : false, |
||||
"Annotated_Properties_for_Analyst" : true, |
||||
"BACKGROUND_PROGRAMMING" : "off", |
||||
"COMPRESS" : false, |
||||
"CRC_CHECK" : true, |
||||
"Clock_Conversion" : true, |
||||
"DONE" : false, |
||||
"DOWNLOAD_SPEED" : "default", |
||||
"Default_Enum_Encoding" : "default", |
||||
"Disable_Insert_Pad" : false, |
||||
"ENCRYPTION_KEY" : false, |
||||
"ENCRYPTION_KEY_TEXT" : "00000000000000000000000000000000", |
||||
"FORMAT" : "binary", |
||||
"FSM Compiler" : true, |
||||
"Fanout_Guide" : 10000, |
||||
"Frequency" : "Auto", |
||||
"Generate_Constraint_File_of_Ports" : false, |
||||
"Generate_IBIS_File" : false, |
||||
"Generate_Plain_Text_Timing_Report" : false, |
||||
"Generate_Post_PNR_Simulation_Model_File" : false, |
||||
"Generate_Post_Place_File" : false, |
||||
"Generate_SDF_File" : false, |
||||
"GwSyn_Loop_Limit" : 2000, |
||||
"HOTBOOT" : false, |
||||
"I2C" : false, |
||||
"I2C_SLAVE_ADDR" : "00", |
||||
"Implicit_Initial_Value_Support" : false, |
||||
"IncludePath" : [ |
||||
|
||||
], |
||||
"Incremental_Compile" : "", |
||||
"Initialize_Primitives" : false, |
||||
"JTAG" : false, |
||||
"MODE_IO" : false, |
||||
"MSPI" : false, |
||||
"Multiple_File_Compilation_Unit" : true, |
||||
"Number_of_Critical_Paths" : "", |
||||
"Number_of_Start/End_Points" : "", |
||||
"OUTPUT_BASE_NAME" : "ws2812", |
||||
"POWER_ON_RESET_MONITOR" : true, |
||||
"PRINT_BSRAM_VALUE" : true, |
||||
"PROGRAM_DONE_BYPASS" : false, |
||||
"Pipelining" : true, |
||||
"PlaceInRegToIob" : true, |
||||
"PlaceIoRegToIob" : true, |
||||
"PlaceOutRegToIob" : true, |
||||
"Place_Option" : "0", |
||||
"Process_Configuration_Verion" : "1.0", |
||||
"Promote_Physical_Constraint_Warning_to_Error" : true, |
||||
"Push_Tristates" : true, |
||||
"READY" : false, |
||||
"RECONFIG_N" : false, |
||||
"Ram_RW_Check" : true, |
||||
"Report_Auto-Placed_Io_Information" : false, |
||||
"Resolve_Mixed_Drivers" : false, |
||||
"Resource_Sharing" : true, |
||||
"Retiming" : false, |
||||
"Route_Maxfan" : "23", |
||||
"Route_Option" : "0", |
||||
"Run_Timing_Driven" : true, |
||||
"SECURE_MODE" : false, |
||||
"SECURITY_BIT" : true, |
||||
"SPI_FLASH_ADDR" : "00000000", |
||||
"SSPI" : false, |
||||
"Show_All_Warnings" : false, |
||||
"Synthesis On/Off Implemented as Translate On/Off" : false, |
||||
"Synthesize_tool" : "GowinSyn", |
||||
"TopModule" : "", |
||||
"USERCODE" : "default", |
||||
"Unused_Pin" : "As_input_tri_stated_with_pull_up", |
||||
"Update_Compile_Point_Timing_Data" : false, |
||||
"Use_Clock_Period_for_Unconstrainted IO" : false, |
||||
"Use_SCF" : false, |
||||
"VHDL_Standard" : "VHDL_Std_1993", |
||||
"Verilog_Standard" : "Vlg_Std_2001", |
||||
"WAKE_UP" : "0", |
||||
"Write_Vendor_Constraint_File" : true, |
||||
"dsp_balance" : false, |
||||
"show_all_warnings" : false, |
||||
"turn_off_bg" : false |
||||
} |
||||
@ -1,4 +1,12 @@
@@ -1,4 +1,12 @@
|
||||
IO_LOC "WS2812_Di" 79; |
||||
IO_PORT "WS2812_Di" DRIVE=8; |
||||
//Copyright (C)2014-2022 Gowin Semiconductor Corporation. |
||||
//All rights reserved. |
||||
//File Title: Physical Constraints file |
||||
//GOWIN Version: 1.9.8.09 |
||||
//Part Number: GW2AR-LV18QN88C8/I7 |
||||
//Device: GW2AR-18C |
||||
//Created Time: Thu 03 23 10:49:15 2023 |
||||
|
||||
IO_LOC "WS2812" 79; |
||||
IO_PORT "WS2812" DRIVE=8; |
||||
IO_LOC "clk" 4; |
||||
IO_PORT "clk" PULL_MODE=NONE; |
||||
IO_PORT "clk" PULL_MODE=UP; |
||||
|
||||
Loading…
Reference in new issue