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100 lines
2.7 KiB
100 lines
2.7 KiB
/* |
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* Copyright (c) 2022 Intel Corporation |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#ifndef ZEPHYR_SOC_INTEL_ADSP_CAVS_CLK_H_ |
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#define ZEPHYR_SOC_INTEL_ADSP_CAVS_CLK_H_ |
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#include <stdint.h> |
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#include <adsp_shim.h> |
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struct adsp_cpu_clock_info { |
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uint32_t default_freq; |
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uint32_t current_freq; |
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uint32_t lowest_freq; |
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}; |
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void adsp_clock_init(void); |
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/** @brief Set cAVS clock frequency |
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* |
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* Set xtensa core clock speed. |
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* |
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* @param freq Clock frequency index to be set |
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* |
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* @return 0 on success, -EINVAL if freq_idx is not valid |
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*/ |
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int adsp_clock_set_cpu_freq(uint32_t freq_idx); |
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/** @brief Get list of cAVS clock information |
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* |
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* Returns an array of clock information, one for each core. |
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* |
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* @return array with clock information |
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*/ |
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struct adsp_cpu_clock_info *adsp_cpu_clocks_get(void); |
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/* Device tree defined constants */ |
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#ifdef CONFIG_SOC_SERIES_INTEL_ACE |
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#define ADSP_CLKCTL ACE_DfPMCCU.dfclkctl |
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#else |
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#define ADSP_CLKCTL CAVS_SHIM.clkctl |
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#endif |
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#define ADSP_CPU_CLOCK_FREQ_ENC DT_PROP(DT_NODELABEL(clkctl), adsp_clkctl_freq_enc) |
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#define ADSP_CPU_CLOCK_FREQ_MASK DT_PROP(DT_NODELABEL(clkctl), adsp_clkctl_freq_mask) |
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#define ADSP_CPU_CLOCK_FREQ_LEN DT_PROP_LEN(DT_NODELABEL(clkctl), adsp_clkctl_freq_enc) |
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#define ADSP_CPU_CLOCK_FREQ_DEFAULT DT_PROP(DT_NODELABEL(clkctl), adsp_clkctl_freq_default) |
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#define ADSP_CPU_CLOCK_FREQ_LOWEST DT_PROP(DT_NODELABEL(clkctl), adsp_clkctl_freq_lowest) |
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#define ADSP_CPU_CLOCK_FREQ(name) DT_PROP(DT_NODELABEL(clkctl), adsp_clkctl_clk_##name) |
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#define ADSP_CLOCK_HAS_WOVCRO DT_PROP(DT_NODELABEL(clkctl), wovcro_supported) |
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#define ADSP_CPU_CLOCK_FREQ_LPRO ADSP_CPU_CLOCK_FREQ(lpro) |
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#define ADSP_CPU_CLOCK_FREQ_HPRO ADSP_CPU_CLOCK_FREQ(hpro) |
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#if ADSP_CLOCK_HAS_WOVCRO |
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#define ADSP_CPU_CLOCK_FREQ_WOVCRO ADSP_CPU_CLOCK_FREQ(wovcro) |
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#endif |
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#define ADSP_CPU_CLOCK_FREQ_IPLL ADSP_CPU_CLOCK_FREQ(ipll) |
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/* Clock sources used by dai */ |
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#define ADSP_CLOCK_SOURCE_XTAL_OSC 0 |
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(audioclk), okay) |
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#define ADSP_CLOCK_SOURCE_AUDIO_CARDINAL 1 |
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#endif |
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(pllclk), okay) |
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#define ADSP_CLOCK_SOURCE_AUDIO_PLL_FIXED 2 |
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#endif |
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#define ADSP_CLOCK_SOURCE_MLCK_INPUT 3 |
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#if ADSP_CLOCK_HAS_WOVCRO |
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#define ADSP_CLOCK_SOURCE_WOV_RING_OSC 4 |
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#endif |
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#define ADSP_CLOCK_SOURCE_COUNT 5 |
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struct adsp_clock_source_desc { |
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uint32_t frequency; |
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}; |
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/** @brief Check if clock source is supported |
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* |
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* @param freq Clock frequency index |
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* |
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* @return true if clock source is supported |
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*/ |
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bool adsp_clock_source_is_supported(int source); |
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/** @brief Get clock source frequency |
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* |
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* @param freq Clock frequency index |
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* |
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* @return frequency on success, 0 on error |
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*/ |
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uint32_t adsp_clock_source_frequency(int source); |
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#endif /* ZEPHYR_SOC_INTEL_ADSP_CAVS_CLK_H_ */
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