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78 lines
1.8 KiB
78 lines
1.8 KiB
/* |
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* Copyright (c) 2019 Vestas Wind Systems A/S |
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* |
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* Based on clock_control_rv32m1_pcc.c, which is: |
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* Copyright (c) 2018 Foundries.io |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#include <errno.h> |
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#include <soc.h> |
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#include <drivers/clock_control.h> |
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#include <fsl_clock.h> |
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#define LOG_LEVEL CONFIG_CLOCK_CONTROL_LOG_LEVEL |
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#include <logging/log.h> |
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LOG_MODULE_REGISTER(clock_control_mcux_pcc); |
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struct mcux_pcc_config { |
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u32_t base_address; |
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}; |
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#define DEV_CFG(dev) ((struct mcux_pcc_config *)(dev->config->config_info)) |
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#define DEV_BASE(dev) (DEV_CFG(dev)->base_address) |
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#ifndef MAKE_PCC_REGADDR |
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#define MAKE_PCC_REGADDR(base, offset) ((base) + (offset)) |
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#endif |
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static inline clock_ip_name_t clock_ip(struct device *dev, |
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clock_control_subsys_t sub_system) |
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{ |
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u32_t offset = POINTER_TO_UINT(sub_system); |
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return MAKE_PCC_REGADDR(DEV_BASE(dev), offset); |
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} |
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static int mcux_pcc_on(struct device *dev, clock_control_subsys_t sub_system) |
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{ |
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CLOCK_EnableClock(clock_ip(dev, sub_system)); |
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return 0; |
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} |
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static int mcux_pcc_off(struct device *dev, clock_control_subsys_t sub_system) |
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{ |
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CLOCK_DisableClock(clock_ip(dev, sub_system)); |
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return 0; |
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} |
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static int mcux_pcc_get_rate(struct device *dev, |
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clock_control_subsys_t sub_system, |
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u32_t *rate) |
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{ |
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*rate = CLOCK_GetIpFreq(clock_ip(dev, sub_system)); |
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return 0; |
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} |
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static int mcux_pcc_init(struct device *dev) |
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{ |
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return 0; |
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} |
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static const struct clock_control_driver_api mcux_pcc_api = { |
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.on = mcux_pcc_on, |
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.off = mcux_pcc_off, |
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.get_rate = mcux_pcc_get_rate, |
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}; |
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#if defined(DT_MCUX_PCC_0_NAME) |
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static const struct mcux_pcc_config mcux_pcc0_config = { |
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.base_address = DT_MCUX_PCC_0_BASE_ADDRESS |
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}; |
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DEVICE_AND_API_INIT(mcux_pcc0, DT_MCUX_PCC_0_NAME, |
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&mcux_pcc_init, |
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NULL, &mcux_pcc0_config, |
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_OBJECTS, |
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&mcux_pcc_api); |
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#endif
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