Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
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# Copyright (c) 2014-2015 Wind River Systems, Inc.
# Copyright (c) 2016 Cadence Design Systems, Inc.
# Copyright (c) 2019 Intel Corp.
# SPDX-License-Identifier: Apache-2.0
DT_CHOSEN_IDLE_TIMER := zephyr,cortex-m-idle-timer
config CORTEX_M_SYSTICK
bool "Cortex-M SYSTICK timer"
depends on CPU_CORTEX_M_HAS_SYSTICK
default y
depends on DT_HAS_ARM_ARMV6M_SYSTICK_ENABLED || \
DT_HAS_ARM_ARMV7M_SYSTICK_ENABLED || \
DT_HAS_ARM_ARMV8M_SYSTICK_ENABLED || \
DT_HAS_ARM_ARMV8_1M_SYSTICK_ENABLED
select TICKLESS_CAPABLE
select SYSTEM_TIMER_HAS_DISABLE_SUPPORT
select CORTEX_M_SYSTICK_INSTALL_ISR
help
This module implements a kernel device driver for the Cortex-M processor
SYSTICK timer and provides the standard "system clock driver" interfaces.
config CORTEX_M_SYSTICK_INSTALL_ISR
bool
depends on CPU_CORTEX_M_HAS_SYSTICK
help
This option should be selected by SysTick-based drivers so that the
sys_clock_isr() function is installed.
config CORTEX_M_SYSTICK_64BIT_CYCLE_COUNTER
bool "Cortex-M SYSTICK timer with sys_clock_cycle_get_64() support"
depends on CORTEX_M_SYSTICK
default y if (SYS_CLOCK_HW_CYCLES_PER_SEC > 60000000)
select TIMER_HAS_64BIT_CYCLE_COUNTER
help
This driver, due to its limited 24-bits hardware counter, is already
tracking a separate cycle count in software. This option make that
count a 64-bits value to support sys_clock_cycle_get_64().
This is cheap to do as expensive math operations (i.e. divisions)
are performed only on counter interval values that always fit in
32 bits.
This is set to y by default when the hardware clock is fast enough
to wrap sys_clock_cycle_get_32() in about a minute or less.
choice CORTEX_M_SYSTICK_LPM_TIMER
prompt "SysTick companion low-power mode timer"
depends on CORTEX_M_SYSTICK
# If all dependencies are enabled, and /chosen/cortex-m-idle-timer
# is enabled, default to using the Counter API-based LPM timer.
# Otherwise, the first choice (LPM_TIMER_NONE) will be selected
# automatically, and no LPM timer will be enabled.
default CORTEX_M_SYSTICK_LPM_TIMER_COUNTER
help
It is common for SoCs equipped with SysTick to use it as system timer.
However, depending on the SoC implementation, entering low-power mode
may turn off the SysTick clock or place SysTick under reset.
On such SoCs, a vendor-specific timer that remains active in low-power
mode will usually be provided - however, it may be unfit for usage as
system timer, for example because its frequency is too low.
With this option, such vendor-specific timer can be selected and used by
the SysTick driver to ensure proper system operation in low-power mode.
NOTE: since Power Management has to be enabled if the SoC may enter in
low-power mode, no LPM timer can be selected if PM is not enabled.
Tickless kernel must also be enabled, since periodic interrupts would
prevent the system from entering in low-power modes.
config CORTEX_M_SYSTICK_LPM_TIMER_NONE
bool "None"
help
Use no additional device as low-power mode timer.
The SoC must never enter a low-power mode where SysTick is disabled when
this option is selected; otherwise, system behavior becomes unpredictable.
if TICKLESS_KERNEL && PM
config CORTEX_M_SYSTICK_LPM_TIMER_COUNTER
bool "Counter API timer"
depends on $(dt_chosen_enabled,$(DT_CHOSEN_IDLE_TIMER))
depends on COUNTER
help
Use a device that implements the counter API as low-power mode timer.
The device is selected by property "/chosen/cortex-m-idle-timer".
config CORTEX_M_SYSTICK_LPM_TIMER_HOOKS
bool "Hook-based timer"
help
Use hooks in the SysTick driver to configure the low-power mode timer.
Refer to `include/drivers/timer/cortex_m_systick.h` for more details.
endif # PM
endchoice # CORTEX_M_SYSTICK_LPM_TIMER
config CORTEX_M_SYSTICK_RESET_BY_LPM
bool
depends on !CORTEX_M_SYSTICK_LPM_TIMER_NONE
help
Some SoCs provide one or more low-power mode which, as part of their
operation, place SysTick or the entire CPU under reset. This requires
special care from the driver - notably, SysTick needs to be restarted
after waking up from such a low-power mode.
Select this symbol if your SoC has a low-power mode that places SysTick
under reset. Note that this requires that the platform provides a timer
active in low-power mode, since SysTick cannot be used for timekeeping.
Refer to CONFIG_CORTEX_M_SYSTICK_LPM_TIMER for more details.