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376 lines
8.9 KiB
376 lines
8.9 KiB
/* |
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* Copyright (c) 2018 Justin Watson |
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* Copyright (c) 2016 Piotr Mienkowski |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#define DT_DRV_COMPAT atmel_sam_usart |
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/** @file |
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* @brief USART driver for Atmel SAM MCU family. |
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* |
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* Note: |
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* - Only basic USART features sufficient to support printf functionality |
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* are currently implemented. |
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*/ |
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#include <errno.h> |
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#include <sys/__assert.h> |
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#include <device.h> |
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#include <init.h> |
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#include <soc.h> |
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#include <drivers/uart.h> |
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/* Device constant configuration parameters */ |
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struct usart_sam_dev_cfg { |
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Usart *regs; |
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uint32_t periph_id; |
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struct soc_gpio_pin pin_rx; |
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struct soc_gpio_pin pin_tx; |
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN |
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uart_irq_config_func_t irq_config_func; |
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#endif |
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}; |
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/* Device run time data */ |
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struct usart_sam_dev_data { |
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uint32_t baud_rate; |
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN |
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uart_irq_callback_user_data_t irq_cb; /* Interrupt Callback */ |
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void *cb_data; /* Interrupt Callback Arg */ |
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ |
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}; |
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#define DEV_CFG(dev) \ |
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((const struct usart_sam_dev_cfg *const)(dev)->config) |
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#define DEV_DATA(dev) \ |
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((struct usart_sam_dev_data *const)(dev)->data) |
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static int baudrate_set(Usart *const usart, uint32_t baudrate, |
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uint32_t mck_freq_hz); |
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static int usart_sam_init(const struct device *dev) |
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{ |
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int retval; |
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const struct usart_sam_dev_cfg *const cfg = DEV_CFG(dev); |
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struct usart_sam_dev_data *const dev_data = DEV_DATA(dev); |
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Usart *const usart = cfg->regs; |
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/* Enable USART clock in PMC */ |
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soc_pmc_peripheral_enable(cfg->periph_id); |
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/* Connect pins to the peripheral */ |
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soc_gpio_configure(&cfg->pin_rx); |
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soc_gpio_configure(&cfg->pin_tx); |
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/* Reset and disable USART */ |
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usart->US_CR = US_CR_RSTRX | US_CR_RSTTX |
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| US_CR_RXDIS | US_CR_TXDIS | US_CR_RSTSTA; |
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/* Disable Interrupts */ |
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usart->US_IDR = 0xFFFFFFFF; |
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/* 8 bits of data, no parity, 1 stop bit in normal mode */ |
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usart->US_MR = US_MR_NBSTOP_1_BIT |
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| US_MR_PAR_NO |
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| US_MR_CHRL_8_BIT |
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| US_MR_USCLKS_MCK |
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| US_MR_CHMODE_NORMAL; |
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/* Set baud rate */ |
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retval = baudrate_set(usart, dev_data->baud_rate, |
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SOC_ATMEL_SAM_MCK_FREQ_HZ); |
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if (retval != 0) { |
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return retval; |
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} |
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/* Enable receiver and transmitter */ |
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usart->US_CR = US_CR_RXEN | US_CR_TXEN; |
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN |
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cfg->irq_config_func(dev); |
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ |
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return 0; |
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} |
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static int usart_sam_poll_in(const struct device *dev, unsigned char *c) |
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{ |
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Usart *const usart = DEV_CFG(dev)->regs; |
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if (!(usart->US_CSR & US_CSR_RXRDY)) { |
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return -EBUSY; |
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} |
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/* got a character */ |
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*c = (unsigned char)usart->US_RHR; |
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return 0; |
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} |
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static void usart_sam_poll_out(const struct device *dev, unsigned char c) |
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{ |
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Usart *const usart = DEV_CFG(dev)->regs; |
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/* Wait for transmitter to be ready */ |
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while (!(usart->US_CSR & US_CSR_TXRDY)) { |
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} |
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/* send a character */ |
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usart->US_THR = (uint32_t)c; |
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} |
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static int usart_sam_err_check(const struct device *dev) |
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{ |
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volatile Usart * const usart = DEV_CFG(dev)->regs; |
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int errors = 0; |
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if (usart->US_CSR & US_CSR_OVRE) { |
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errors |= UART_ERROR_OVERRUN; |
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} |
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if (usart->US_CSR & US_CSR_PARE) { |
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errors |= UART_ERROR_PARITY; |
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} |
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if (usart->US_CSR & US_CSR_FRAME) { |
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errors |= UART_ERROR_FRAMING; |
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} |
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return errors; |
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} |
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static int baudrate_set(Usart *const usart, uint32_t baudrate, |
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uint32_t mck_freq_hz) |
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{ |
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uint32_t divisor; |
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__ASSERT(baudrate, |
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"baud rate has to be bigger than 0"); |
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__ASSERT(mck_freq_hz/16U >= baudrate, |
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"MCK frequency is too small to set required baud rate"); |
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divisor = mck_freq_hz / 16U / baudrate; |
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if (divisor > 0xFFFF) { |
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return -EINVAL; |
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} |
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usart->US_BRGR = US_BRGR_CD(divisor); |
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return 0; |
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} |
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#if CONFIG_UART_INTERRUPT_DRIVEN |
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static int usart_sam_fifo_fill(const struct device *dev, |
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const uint8_t *tx_data, |
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int size) |
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{ |
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volatile Usart * const usart = DEV_CFG(dev)->regs; |
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/* Wait for transmitter to be ready. */ |
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while ((usart->US_CSR & US_CSR_TXRDY) == 0) { |
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} |
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usart->US_THR = *tx_data; |
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return 1; |
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} |
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static int usart_sam_fifo_read(const struct device *dev, uint8_t *rx_data, |
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const int size) |
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{ |
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volatile Usart * const usart = DEV_CFG(dev)->regs; |
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int bytes_read; |
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bytes_read = 0; |
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while (bytes_read < size) { |
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if (usart->US_CSR & US_CSR_RXRDY) { |
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rx_data[bytes_read] = usart->US_RHR; |
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bytes_read++; |
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} else { |
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break; |
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} |
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} |
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return bytes_read; |
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} |
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static void usart_sam_irq_tx_enable(const struct device *dev) |
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{ |
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volatile Usart * const usart = DEV_CFG(dev)->regs; |
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usart->US_IER = US_IER_TXRDY; |
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} |
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static void usart_sam_irq_tx_disable(const struct device *dev) |
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{ |
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volatile Usart * const usart = DEV_CFG(dev)->regs; |
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usart->US_IDR = US_IDR_TXRDY; |
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} |
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static int usart_sam_irq_tx_ready(const struct device *dev) |
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{ |
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volatile Usart * const usart = DEV_CFG(dev)->regs; |
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return (usart->US_CSR & US_CSR_TXRDY); |
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} |
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static void usart_sam_irq_rx_enable(const struct device *dev) |
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{ |
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volatile Usart * const usart = DEV_CFG(dev)->regs; |
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usart->US_IER = US_IER_RXRDY; |
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} |
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static void usart_sam_irq_rx_disable(const struct device *dev) |
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{ |
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volatile Usart * const usart = DEV_CFG(dev)->regs; |
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usart->US_IDR = US_IDR_RXRDY; |
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} |
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static int usart_sam_irq_tx_complete(const struct device *dev) |
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{ |
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volatile Usart * const usart = DEV_CFG(dev)->regs; |
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return !(usart->US_CSR & US_CSR_TXRDY); |
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} |
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static int usart_sam_irq_rx_ready(const struct device *dev) |
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{ |
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volatile Usart * const usart = DEV_CFG(dev)->regs; |
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return (usart->US_CSR & US_CSR_RXRDY); |
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} |
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static void usart_sam_irq_err_enable(const struct device *dev) |
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{ |
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volatile Usart * const usart = DEV_CFG(dev)->regs; |
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usart->US_IER = US_IER_OVRE | US_IER_FRAME | US_IER_PARE; |
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} |
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static void usart_sam_irq_err_disable(const struct device *dev) |
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{ |
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volatile Usart * const usart = DEV_CFG(dev)->regs; |
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usart->US_IDR = US_IDR_OVRE | US_IDR_FRAME | US_IDR_PARE; |
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} |
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static int usart_sam_irq_is_pending(const struct device *dev) |
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{ |
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volatile Usart * const usart = DEV_CFG(dev)->regs; |
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return (usart->US_IMR & (US_IMR_TXRDY | US_IMR_RXRDY)) & |
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(usart->US_CSR & (US_CSR_TXRDY | US_CSR_RXRDY)); |
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} |
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static int usart_sam_irq_update(const struct device *dev) |
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{ |
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ARG_UNUSED(dev); |
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return 1; |
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} |
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static void usart_sam_irq_callback_set(const struct device *dev, |
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uart_irq_callback_user_data_t cb, |
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void *cb_data) |
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{ |
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struct usart_sam_dev_data *const dev_data = DEV_DATA(dev); |
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dev_data->irq_cb = cb; |
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dev_data->cb_data = cb_data; |
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} |
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static void usart_sam_isr(const struct device *dev) |
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{ |
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struct usart_sam_dev_data *const dev_data = DEV_DATA(dev); |
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if (dev_data->irq_cb) { |
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dev_data->irq_cb(dev, dev_data->cb_data); |
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} |
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} |
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ |
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static const struct uart_driver_api usart_sam_driver_api = { |
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.poll_in = usart_sam_poll_in, |
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.poll_out = usart_sam_poll_out, |
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.err_check = usart_sam_err_check, |
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN |
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.fifo_fill = usart_sam_fifo_fill, |
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.fifo_read = usart_sam_fifo_read, |
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.irq_tx_enable = usart_sam_irq_tx_enable, |
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.irq_tx_disable = usart_sam_irq_tx_disable, |
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.irq_tx_ready = usart_sam_irq_tx_ready, |
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.irq_rx_enable = usart_sam_irq_rx_enable, |
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.irq_rx_disable = usart_sam_irq_rx_disable, |
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.irq_tx_complete = usart_sam_irq_tx_complete, |
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.irq_rx_ready = usart_sam_irq_rx_ready, |
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.irq_err_enable = usart_sam_irq_err_enable, |
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.irq_err_disable = usart_sam_irq_err_disable, |
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.irq_is_pending = usart_sam_irq_is_pending, |
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.irq_update = usart_sam_irq_update, |
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.irq_callback_set = usart_sam_irq_callback_set, |
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ |
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}; |
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#define USART_SAM_DECLARE_CFG(n, IRQ_FUNC_INIT) \ |
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static const struct usart_sam_dev_cfg usart##n##_sam_config = { \ |
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.regs = (Usart *)DT_INST_REG_ADDR(n), \ |
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.periph_id = DT_INST_PROP(n, peripheral_id), \ |
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\ |
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.pin_rx = ATMEL_SAM_DT_INST_PIN(n, 0), \ |
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.pin_tx = ATMEL_SAM_DT_INST_PIN(n, 1), \ |
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\ |
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IRQ_FUNC_INIT \ |
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} |
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN |
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#define USART_SAM_CONFIG_FUNC(n) \ |
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static void usart##n##_sam_irq_config_func(const struct device *port) \ |
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{ \ |
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IRQ_CONNECT(DT_INST_IRQN(n), \ |
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DT_INST_IRQ(n, priority), \ |
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usart_sam_isr, \ |
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DEVICE_DT_INST_GET(n), 0); \ |
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irq_enable(DT_INST_IRQN(n)); \ |
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} |
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#define USART_SAM_IRQ_CFG_FUNC_INIT(n) \ |
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.irq_config_func = usart##n##_sam_irq_config_func |
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#define USART_SAM_INIT_CFG(n) \ |
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USART_SAM_DECLARE_CFG(n, USART_SAM_IRQ_CFG_FUNC_INIT(n)) |
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#else |
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#define USART_SAM_CONFIG_FUNC(n) |
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#define USART_SAM_IRQ_CFG_FUNC_INIT |
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#define USART_SAM_INIT_CFG(n) \ |
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USART_SAM_DECLARE_CFG(n, USART_SAM_IRQ_CFG_FUNC_INIT) |
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#endif |
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#define USART_SAM_INIT(n) \ |
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static struct usart_sam_dev_data usart##n##_sam_data = { \ |
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.baud_rate = DT_INST_PROP(n, current_speed), \ |
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}; \ |
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\ |
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static const struct usart_sam_dev_cfg usart##n##_sam_config; \ |
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\ |
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DEVICE_DT_INST_DEFINE(n, \ |
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&usart_sam_init, NULL, \ |
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&usart##n##_sam_data, \ |
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&usart##n##_sam_config, PRE_KERNEL_1, \ |
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CONFIG_SERIAL_INIT_PRIORITY, \ |
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&usart_sam_driver_api); \ |
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\ |
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USART_SAM_CONFIG_FUNC(n) \ |
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\ |
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USART_SAM_INIT_CFG(n); |
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DT_INST_FOREACH_STATUS_OKAY(USART_SAM_INIT)
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