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50 lines
1.1 KiB
50 lines
1.1 KiB
/* |
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* |
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* Copyright (c) 2018 Ilya Tagunov |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#include <soc.h> |
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#include <stm32_ll_bus.h> |
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#include <stm32_ll_rcc.h> |
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#include <stm32_ll_utils.h> |
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#include <drivers/clock_control.h> |
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#include <sys/util.h> |
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#include <drivers/clock_control/stm32_clock_control.h> |
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#include "clock_stm32_ll_common.h" |
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#if STM32_SYSCLK_SRC_PLL |
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/* Macros to fill up multiplication and division factors values */ |
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#define z_pll_mul(v) LL_RCC_PLL_MUL_ ## v |
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#define pll_mul(v) z_pll_mul(v) |
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#define z_pll_div(v) LL_RCC_PLL_DIV_ ## v |
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#define pll_div(v) z_pll_div(v) |
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/** |
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* @brief Fill PLL configuration structure |
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*/ |
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void config_pll_init(LL_UTILS_PLLInitTypeDef *pllinit) |
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{ |
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pllinit->PLLMul = pll_mul(STM32_PLL_MULTIPLIER); |
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pllinit->PLLDiv = pll_div(STM32_PLL_DIVISOR); |
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} |
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#endif /* STM32_SYSCLK_SRC_PLL */ |
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/** |
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* @brief Activate default clocks |
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*/ |
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void config_enable_default_clocks(void) |
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{ |
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#if defined(CONFIG_EXTI_STM32) || defined(CONFIG_USB_DC_STM32) || \ |
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(defined(CONFIG_SOC_SERIES_STM32L0X) && \ |
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defined(CONFIG_ENTROPY_STM32_RNG)) |
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/* Enable System Configuration Controller clock. */ |
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LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG); |
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#endif |
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}
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