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453 lines
12 KiB
453 lines
12 KiB
/* |
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* Copyright (c) 2016-2017 Jean-Paul Etienne <fractalclone@gmail.com> |
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* Copyright (c) 2021 Andes Technology Corporation |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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/** |
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* @file |
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* @brief Linker command/script file |
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* |
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* Linker script for the ae350 platform |
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*/ |
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#include <zephyr/devicetree.h> |
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#include <zephyr/linker/sections.h> |
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#include <zephyr/linker/devicetree_regions.h> |
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#include <zephyr/linker/linker-defs.h> |
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#include <zephyr/linker/linker-tool.h> |
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#ifdef CONFIG_XIP |
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#define ROMABLE_REGION ROM |
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#else |
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#define ROMABLE_REGION RAM |
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#endif |
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#define RAMABLE_REGION RAM |
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#define _EXCEPTION_SECTION_NAME exceptions |
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#define _RESET_SECTION_NAME reset |
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#ifdef CONFIG_XIP |
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#if DT_NODE_HAS_COMPAT_STATUS(DT_CHOSEN(zephyr_flash), soc_nv_flash, okay) |
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#ifdef CONFIG_FLASH_LOAD_OFFSET |
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#define ROM_BASE (DT_REG_ADDR(DT_CHOSEN(zephyr_flash)) + \ |
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CONFIG_FLASH_LOAD_OFFSET) |
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#else /* !CONFIG_FLASH_LOAD_OFFSET */ |
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#define ROM_BASE DT_REG_ADDR(DT_CHOSEN(zephyr_flash)) |
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#endif /* CONFIG_FLASH_LOAD_OFFSET */ |
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#define ROM_SIZE DT_REG_SIZE(DT_CHOSEN(zephyr_flash)) |
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#elif DT_NODE_HAS_COMPAT(DT_CHOSEN(zephyr_flash), jedec_spi_nor) |
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/* For jedec,spi-nor we expect the spi controller to memory map the flash |
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* and for that mapping to be the second register property of the spi |
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* controller. |
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*/ |
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#define SPI_CTRL DT_PARENT(DT_CHOSEN(zephyr_flash)) |
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#define ROM_BASE DT_REG_ADDR_BY_IDX(SPI_CTRL, 1) |
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#define ROM_SIZE DT_REG_SIZE_BY_IDX(SPI_CTRL, 1) |
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#endif |
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#else /* CONFIG_XIP */ |
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#define ROM_BASE CONFIG_SRAM_BASE_ADDRESS |
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#define ROM_SIZE KB(CONFIG_SRAM_SIZE) |
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#endif /* CONFIG_XIP */ |
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#define RAM_BASE CONFIG_SRAM_BASE_ADDRESS |
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#define RAM_SIZE KB(CONFIG_SRAM_SIZE) |
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#ifdef CONFIG_RISCV_PMP |
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#define MPU_MIN_SIZE CONFIG_PMP_GRANULARITY |
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#define MPU_MIN_SIZE_ALIGN . = ALIGN(MPU_MIN_SIZE); |
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#if defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT) |
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#define MPU_ALIGN(region_size) \ |
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. = ALIGN(MPU_MIN_SIZE); \ |
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. = ALIGN( 1 << LOG2CEIL(region_size)) |
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#else |
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#define MPU_ALIGN(region_size) \ |
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. = ALIGN(MPU_MIN_SIZE) |
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#endif |
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#else |
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#define MPU_MIN_SIZE_ALIGN |
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#define MPU_ALIGN(region_size) . = ALIGN(4) |
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#endif |
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MEMORY |
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{ |
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#ifdef CONFIG_XIP |
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ROM (rx) : ORIGIN = ROM_BASE, LENGTH = ROM_SIZE |
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#endif |
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RAM (rwx) : ORIGIN = RAM_BASE, LENGTH = RAM_SIZE |
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LINKER_DT_REGIONS() |
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/* Used by and documented in include/linker/intlist.ld */ |
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IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K |
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} |
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ENTRY(CONFIG_KERNEL_ENTRY) |
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SECTIONS |
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{ |
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#include <zephyr/linker/rel-sections.ld> |
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#ifdef CONFIG_LLEXT |
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#include <zephyr/linker/llext-sections.ld> |
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#endif |
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/* |
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* The .plt and .iplt are here according to |
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* 'riscv32-zephyr-elf-ld --verbose', before text section. |
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*/ |
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SECTION_PROLOGUE(.plt,,) |
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{ |
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*(.plt) |
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} |
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SECTION_PROLOGUE(.iplt,,) |
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{ |
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*(.iplt) |
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} |
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GROUP_START(ROMABLE_REGION) |
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SECTION_PROLOGUE(rom_start,,) |
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{ |
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. = ALIGN(16); |
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MPU_ALIGN(__rom_region_size); |
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__rom_region_start = ABSOLUTE(.); |
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/* Located in generated directory. This file is populated by calling |
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* zephyr_linker_sources(ROM_START ...). |
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*/ |
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#include <snippets-rom-start.ld> |
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} GROUP_LINK_IN(ROMABLE_REGION) |
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#ifdef CONFIG_CODE_DATA_RELOCATION |
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#include <linker_relocate.ld> |
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#endif |
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SECTION_PROLOGUE(_RESET_SECTION_NAME,,) |
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{ |
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KEEP(*(.reset.*)) |
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} GROUP_LINK_IN(ROMABLE_REGION) |
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SECTION_PROLOGUE(_EXCEPTION_SECTION_NAME,,) |
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{ |
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KEEP(*(".exception.entry.*")) |
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*(".exception.other.*") |
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} GROUP_LINK_IN(ROMABLE_REGION) |
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SECTION_PROLOGUE(_TEXT_SECTION_NAME,,) |
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{ |
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. = ALIGN(4); |
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KEEP(*(.openocd_debug)) |
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KEEP(*(".openocd_debug.*")) |
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__text_region_start = .; |
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*(.text) |
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*(".text.*") |
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*(.gnu.linkonce.t.*) |
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#include <zephyr/linker/kobject-text.ld> |
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} GROUP_LINK_IN(ROMABLE_REGION) |
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__text_region_end = .; |
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__rodata_region_start = .; |
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#include <zephyr/linker/common-rom.ld> |
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/* Located in generated directory. This file is populated by calling |
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* zephyr_linker_sources(ROM_SECTIONS ...). Useful for grouping iterable RO structs. |
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*/ |
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#include <snippets-rom-sections.ld> |
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#include <zephyr/linker/thread-local-storage.ld> |
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SECTION_PROLOGUE(_RODATA_SECTION_NAME,,) |
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{ |
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. = ALIGN(4); |
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*(.srodata) |
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*(".srodata.*") |
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*(.rodata) |
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*(".rodata.*") |
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*(.gnu.linkonce.r.*) |
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*(.sdata2 .sdata2.* .gnu.linkonce.s2.*) |
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/* Located in generated directory. This file is populated by the |
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* zephyr_linker_sources() Cmake function. |
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*/ |
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#include <snippets-rodata.ld> |
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#include <zephyr/linker/kobject-rom.ld> |
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. = ALIGN(4); |
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} GROUP_LINK_IN(ROMABLE_REGION) |
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#include <zephyr/linker/cplusplus-rom.ld> |
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__rodata_region_end = .; |
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/* For non-XIP system, __rom_region_end symbol should be set to |
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* the end of common ROMABLE_REGIONs (text and rodata) instead of |
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* the linker script end, so it wouldn't mistakenly contain |
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* RAMABLE_REGION in it. |
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*/ |
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#ifndef CONFIG_XIP |
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#ifdef CONFIG_RISCV_PMP |
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SECTION_PROLOGUE(rom_mpu_padding,,) |
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{ |
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MPU_ALIGN(__rodata_region_end - __rom_region_start); |
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} GROUP_LINK_IN(ROMABLE_REGION) |
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#endif /* CONFIG_RISCV_PMP */ |
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__rom_region_end = .; |
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__rom_region_size = __rom_region_end - __rom_region_start; |
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#endif /* CONFIG_XIP */ |
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GROUP_END(ROMABLE_REGION) |
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GROUP_START(RAMABLE_REGION) |
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. = RAM_BASE; |
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_image_ram_start = .; |
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#ifdef CONFIG_SOC_ANDES_V5_PMA |
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#pragma push_macro("MPU_ALIGN") |
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#undef MPU_ALIGN |
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/* Make linker section alignment comply with PMA granularity. */ |
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#define MPU_ALIGN(region_size) \ |
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. = ALIGN(CONFIG_SOC_ANDES_V5_PMA_REGION_MIN_ALIGN_AND_SIZE); \ |
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. = ALIGN( 1 << LOG2CEIL(region_size)) |
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#endif |
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/* Located in generated directory. This file is populated by the |
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* zephyr_linker_sources() Cmake function. |
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*/ |
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#include <snippets-ram-sections.ld> |
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#ifdef CONFIG_SOC_ANDES_V5_PMA |
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#pragma pop_macro("MPU_ALIGN") |
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#endif |
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#if defined(CONFIG_USERSPACE) |
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#define APP_SHARED_ALIGN MPU_MIN_SIZE_ALIGN |
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#define SMEM_PARTITION_ALIGN MPU_ALIGN |
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#include <app_smem.ld> |
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_app_smem_size = _app_smem_end - _app_smem_start; |
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_app_smem_rom_start = LOADADDR(_APP_SMEM_SECTION_NAME); |
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#endif /* CONFIG_USERSPACE */ |
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SECTION_DATA_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD),) |
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{ |
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MPU_MIN_SIZE_ALIGN |
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/* |
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* For performance, BSS section is assumed to be 4 byte aligned and |
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* a multiple of 4 bytes |
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*/ |
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. = ALIGN(4); |
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__bss_start = .; |
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__kernel_ram_start = .; |
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*(.sbss) |
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*(".sbss.*") |
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*(.bss) |
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*(".bss.*") |
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COMMON_SYMBOLS |
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#ifdef CONFIG_CODE_DATA_RELOCATION |
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#include <linker_sram_bss_relocate.ld> |
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#endif |
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/* |
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* As memory is cleared in words only, it is simpler to ensure the BSS |
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* section ends on a 4 byte boundary. This wastes a maximum of 3 bytes. |
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*/ |
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__bss_end = ALIGN(4); |
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION) |
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#include <zephyr/linker/common-noinit.ld> |
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SECTION_DATA_PROLOGUE(_DATA_SECTION_NAME,,) |
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{ |
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. = ALIGN(4); |
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/* _image_ram_start = .; */ |
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__data_region_start = .; |
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__data_start = .; |
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*(.data) |
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*(".data.*") |
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#ifdef CONFIG_RISCV_GP |
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/* |
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* RISC-V architecture has 12-bit signed immediate offsets in the |
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* instructions. If we can put the most commonly accessed globals |
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* in a special 4K span of memory addressed by the GP register, then |
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* we can access those values in a single instruction, saving both |
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* codespace and runtime. |
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* |
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* Since these immediate offsets are signed, place gp 0x800 past the |
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* beginning of .sdata so that we can use both positive and negative |
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* offsets. |
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*/ |
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. = ALIGN(8); |
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PROVIDE (__global_pointer$ = . + 0x800); |
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#endif |
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*(.sdata .sdata.* .gnu.linkonce.s.*) |
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/* Located in generated directory. This file is populated by the |
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* zephyr_linker_sources() Cmake function. |
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*/ |
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#include <snippets-rwdata.ld> |
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#ifdef CONFIG_CODE_DATA_RELOCATION |
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#include <linker_sram_data_relocate.ld> |
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#endif |
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__data_end = .; |
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION) |
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__data_size = __data_end - __data_start; |
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__data_load_start = LOADADDR(_DATA_SECTION_NAME); |
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__data_region_load_start = LOADADDR(_DATA_SECTION_NAME); |
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#include <zephyr/linker/common-ram.ld> |
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#include <zephyr/linker/kobject-data.ld> |
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#include <zephyr/linker/cplusplus-ram.ld> |
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/* Located in generated directory. This file is populated by the |
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* zephyr_linker_sources() Cmake function. |
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*/ |
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#include <snippets-data-sections.ld> |
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__data_region_end = .; |
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__kernel_ram_end = .; |
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__kernel_ram_size = __kernel_ram_end - __kernel_ram_start; |
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#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_itcm), okay) |
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GROUP_START(ITCM) |
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SECTION_PROLOGUE(_ITCM_SECTION_NAME,,SUBALIGN(8)) |
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{ |
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__itcm_start = .; |
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*(.itcm) |
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*(".itcm.*") |
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/* Located in generated directory. This file is populated by the |
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* zephyr_linker_sources() Cmake function. */ |
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#include <snippets-itcm-section.ld> |
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__itcm_end = .; |
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} GROUP_LINK_IN(ITCM AT> ROMABLE_REGION) |
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__itcm_size = __itcm_end - __itcm_start; |
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__itcm_load_start = LOADADDR(_ITCM_SECTION_NAME); |
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GROUP_END(ITCM) |
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#endif |
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#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_dtcm), okay) |
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GROUP_START(DTCM) |
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SECTION_PROLOGUE(_DTCM_BSS_SECTION_NAME, (NOLOAD),SUBALIGN(8)) |
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{ |
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__dtcm_start = .; |
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__dtcm_bss_start = .; |
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*(.dtcm_bss) |
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*(".dtcm_bss.*") |
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__dtcm_bss_end = .; |
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} GROUP_LINK_IN(DTCM) |
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SECTION_PROLOGUE(_DTCM_NOINIT_SECTION_NAME, (NOLOAD),SUBALIGN(8)) |
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{ |
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__dtcm_noinit_start = .; |
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*(.dtcm_noinit) |
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*(".dtcm_noinit.*") |
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__dtcm_noinit_end = .; |
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} GROUP_LINK_IN(DTCM) |
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SECTION_PROLOGUE(_DTCM_DATA_SECTION_NAME,,SUBALIGN(8)) |
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{ |
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__dtcm_data_start = .; |
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*(.dtcm_data) |
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*(".dtcm_data.*") |
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/* Located in generated directory. This file is populated by the |
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* zephyr_linker_sources() Cmake function. */ |
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#include <snippets-dtcm-section.ld> |
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__dtcm_data_end = .; |
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} GROUP_LINK_IN(DTCM AT> ROMABLE_REGION) |
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__dtcm_end = .; |
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__dtcm_data_load_start = LOADADDR(_DTCM_DATA_SECTION_NAME); |
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GROUP_END(DTCM) |
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#endif |
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/* Located in generated directory. This file is populated by the |
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* zephyr_linker_sources() Cmake function. |
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*/ |
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#include <snippets-sections.ld> |
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#define LAST_RAM_ALIGN MPU_MIN_SIZE_ALIGN |
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#include <zephyr/linker/ram-end.ld> |
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GROUP_END(RAMABLE_REGION) |
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#include <zephyr/linker/debug-sections.ld> |
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/DISCARD/ : { *(.note.GNU-stack) } |
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SECTION_PROLOGUE(.riscv.attributes, 0,) |
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{ |
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KEEP(*(.riscv.attributes)) |
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KEEP(*(.gnu.attributes)) |
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} |
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/* Output section descriptions are needed for these sections to suppress |
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* warnings when "--orphan-handling=warn" is set for lld. |
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*/ |
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#if defined(CONFIG_LLVM_USE_LLD) |
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SECTION_PROLOGUE(.symtab, 0,) { *(.symtab) } |
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SECTION_PROLOGUE(.strtab, 0,) { *(.strtab) } |
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SECTION_PROLOGUE(.shstrtab, 0,) { *(.shstrtab) } |
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#endif |
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/* Sections generated from 'zephyr,memory-region' nodes */ |
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LINKER_DT_SECTIONS() |
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#ifdef CONFIG_XIP |
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/* Must be last in romable region */ |
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SECTION_PROLOGUE(.last_section,,) |
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{ |
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/* .last_section contains a fixed word to ensure location counter and actual |
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* rom region data usage match when CONFIG_LINKER_LAST_SECTION_ID=y. */ |
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KEEP(*(.last_section)) |
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} GROUP_LINK_IN(ROMABLE_REGION) |
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/* Because ROMABLE_REGION != RAMABLE_REGION in XIP-system, it is valid |
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* to set __rom_region_end symbol at the end of linker script and |
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* doesn't mistakenly contain the RAMABLE_REGION in it. |
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*/ |
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#ifndef CONFIG_RISCV_PMP |
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__rom_region_end = LOADADDR(.last_section) + SIZEOF(.last_section); |
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#else |
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/* Padding __rom_region_end to matches the requirement of the MPU region. |
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* __rom_region_size is used to configure the MPU region, but the actual rom |
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* region data usage is ends at .last_section. |
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*/ |
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SECTION_PROLOGUE(rom_mpu_padding,(NOLOAD),) |
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{ |
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MPU_ALIGN(__rom_region_size); |
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} GROUP_LINK_IN(ROMABLE_REGION) |
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__rom_region_end = LOADADDR(rom_mpu_padding) + SIZEOF(rom_mpu_padding); |
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#endif /* !CONFIG_RISCV_PMP */ |
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/* To provide the rom region size as a const expression, |
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* calculate this value here. |
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*/ |
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__rom_region_size = __rom_region_end - __rom_region_start; |
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#endif |
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}
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