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103 lines
3.1 KiB
103 lines
3.1 KiB
.. zephyr:board:: qemu_cortex_r5 |
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Overview |
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This board configuration will use QEMU to emulate the Xilinx Zynq UltraScale+ |
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(ZynqMP) platform. |
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This configuration provides support for an ARM Cortex-R5 CPU and these devices: |
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* ARM PL-390 Generic Interrupt Controller |
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* Xilinx Zynq TTC (Cadence TTC) |
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* Xilinx Zynq UART |
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.. note:: |
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This board configuration makes no claims about its suitability for use |
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with an actual ZCU102 hardware system, or any other hardware system. |
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Hardware |
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Supported Features |
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================== |
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The following hardware features are supported: |
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+--------------+------------+----------------------+ |
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| Interface | Controller | Driver/Component | |
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+==============+============+======================+ |
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| GIC | on-chip | generic interrupt | |
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| | | controller | |
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+--------------+------------+----------------------+ |
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| TTC | on-chip | system timer | |
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+--------------+------------+----------------------+ |
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| UART | on-chip | serial port | |
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+--------------+------------+----------------------+ |
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The kernel currently does not support other hardware features on this platform. |
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Devices |
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======== |
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System Timer |
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------------ |
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This board configuration uses a system timer tick frequency of 1000 Hz. |
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Serial Port |
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----------- |
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This board configuration uses a single serial communication channel with the |
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on-chip UART0. |
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Known Problems or Limitations |
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============================== |
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The following platform features are unsupported: |
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* Dual-redundant Core Lock-step (DCLS) execution is not emulated. |
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* Xilinx Zynq TTC driver does not support tickless mode operation. |
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Programming and Debugging |
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************************* |
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Use this configuration to run basic Zephyr applications and kernel tests in the |
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QEMU emulated environment, for example, with the :zephyr:code-sample:`synchronization` sample: |
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.. zephyr-app-commands:: |
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:zephyr-app: samples/synchronization |
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:host-os: unix |
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:board: qemu_cortex_r5 |
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:goals: run |
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This will build an image with the synchronization sample app, boot it using |
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QEMU, and display the following console output: |
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.. code-block:: console |
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*** Booting Zephyr OS build v2.2.0 *** |
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threadA: Hello World from qemu_cortex_r5! |
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threadB: Hello World from qemu_cortex_r5! |
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threadA: Hello World from qemu_cortex_r5! |
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threadB: Hello World from qemu_cortex_r5! |
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threadA: Hello World from qemu_cortex_r5! |
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threadB: Hello World from qemu_cortex_r5! |
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threadA: Hello World from qemu_cortex_r5! |
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threadB: Hello World from qemu_cortex_r5! |
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threadA: Hello World from qemu_cortex_r5! |
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threadB: Hello World from qemu_cortex_r5! |
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Exit QEMU by pressing :kbd:`CTRL+A` :kbd:`x`. |
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Debugging |
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========= |
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Refer to the detailed overview about :ref:`application_debugging`. |
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References |
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********** |
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.. target-notes:: |
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1. ARMv7-A and ARMv7-R Architecture Reference Manual (ARM DDI 0406C ID051414) |
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2. Cortex-R5 and Cortex-R5F Technical Reference Manual (ARM DDI 0460C ID021511) |
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3. Zynq UltraScale+ Device Technical Reference Manual (UG1085)
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