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40 lines
1.1 KiB
40 lines
1.1 KiB
/* |
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* Copyright (c) 2020 Espressif Systems (Shanghai) Co., Ltd. |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#include <xtensa/coreasm.h> |
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#include <xtensa/corebits.h> |
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#include <xtensa/config/system.h> |
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#include <xtensa/hal.h> |
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#include <xtensa_asm2_context.h> |
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#include <zephyr/offsets.h> |
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.section .iram1, "ax" |
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.align 4 |
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.global xtensa_backtrace_get_start |
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.type xtensa_backtrace_get_start, @function |
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xtensa_backtrace_get_start: |
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entry a1, 32 |
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/* Spill registers onto stack (excluding this function) */ |
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call8 xthal_window_spill |
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/* a2, a3, a4 should be out arguments for i PC, i SP, i-1 PC respectively. |
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* Use a6 and a7 as scratch */ |
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/* Load address for interrupted stack */ |
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l32i a6, a5, 0 |
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/* Load i PC in a7 */ |
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l32i a7, a6, ___xtensa_irq_bsa_t_pc_OFFSET |
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/* Store value of i PC in a2 */ |
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s32i a7, a2, 0 |
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/* Load value for (i-1) PC, which return address of i into a7 */ |
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l32i a7, a6, ___xtensa_irq_bsa_t_a0_OFFSET |
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/* Store value of (i-1) PC in a4 */ |
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s32i a7, a4, 0 |
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/* Add base stack frame size in interrupted stack to get i SP */ |
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addi a6, a6, ___xtensa_irq_bsa_t_SIZEOF |
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/* Store i SP in a3 */ |
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s32i a6, a3, 0 |
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retw
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