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75 lines
1.7 KiB
75 lines
1.7 KiB
/* |
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* Copyright (c) 2025 Renesas Electronics Corporation |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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/** |
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* @file |
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* @brief System/hardware module for Renesas RA4L1 family processor |
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*/ |
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#include <zephyr/device.h> |
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#include <zephyr/init.h> |
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#include <zephyr/kernel.h> |
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#include <zephyr/arch/cpu.h> |
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#include <cmsis_core.h> |
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#include <zephyr/arch/arm/nmi.h> |
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#include <zephyr/irq.h> |
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#include <zephyr/logging/log.h> |
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LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL); |
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#include "bsp_cfg.h" |
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#include "bsp_api.h" |
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uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT; |
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volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT; |
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#ifdef CONFIG_RUNTIME_NMI |
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extern bsp_grp_irq_cb_t g_bsp_group_irq_sources[]; |
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extern void NMI_Handler(void); |
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#endif /* CONFIG_RUNTIME_NMI */ |
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/** |
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* @brief Perform basic hardware initialization at boot. |
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* |
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* This needs to be run from the very beginning. |
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*/ |
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void soc_early_init_hook(void) |
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{ |
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extern volatile uint16_t g_protect_counters[]; |
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for (uint32_t i = 0; i < 4; i++) { |
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g_protect_counters[i] = 0; |
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} |
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#if FSP_PRIV_TZ_USE_SECURE_REGS |
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/* Disable protection using PRCR register. */ |
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R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_SAR); |
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/* Initialize peripherals to secure mode for flat projects */ |
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R_PSCU->PSARB = 0; |
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R_PSCU->PSARC = 0; |
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R_PSCU->PSARD = 0; |
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R_PSCU->PSARE = 0; |
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R_CPSCU->ICUSARG = 0; |
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R_CPSCU->ICUSARH = 0; |
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R_CPSCU->ICUSARI = 0; |
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/* Enable protection using PRCR register. */ |
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R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_SAR); |
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#endif |
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SystemCoreClock = BSP_MOCO_HZ; |
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g_protect_pfswe_counter = 0; |
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#ifdef CONFIG_RUNTIME_NMI |
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for (uint32_t i = 0; i < 16; i++) { |
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g_bsp_group_irq_sources[i] = 0; |
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} |
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z_arm_nmi_set_handler(NMI_Handler); |
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#endif /* CONFIG_RUNTIME_NMI */ |
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}
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