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53 lines
1.2 KiB
53 lines
1.2 KiB
/* |
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* Copyright (c) 2022 Intel Corp. |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#ifndef _ADSP_MEMORY_WINDOW_H_ |
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#define _ADSP_MEMORY_WINDOW_H_ |
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#define WIN_SIZE(N) (CONFIG_MEMORY_WIN_##N##_SIZE) |
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#define MEM_WINDOW_NODE(n) DT_NODELABEL(mem_window##n) |
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#define WIN0_OFFSET DT_PROP(MEM_WINDOW_NODE(0), offset) |
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#define WIN1_OFFSET WIN0_OFFSET + WIN_SIZE(0) |
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#define WIN2_OFFSET WIN1_OFFSET + WIN_SIZE(1) |
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#define WIN3_OFFSET WIN2_OFFSET + WIN_SIZE(2) |
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#define WIN_OFFSET(n) (DT_PROP_OR(MEM_WINDOW_NODE(n), offset, (WIN##n##_OFFSET))) |
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#define HP_SRAM_WIN0_BASE L2_SRAM_BASE + WIN0_OFFSET |
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#define HP_SRAM_WIN0_SIZE WIN_SIZE(0) |
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#define HP_SRAM_WIN1_BASE L2_SRAM_BASE + WIN1_OFFSET |
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#define HP_SRAM_WIN1_SIZE WIN_SIZE(1) |
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#define HP_SRAM_WIN2_BASE L2_SRAM_BASE + WIN2_OFFSET |
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#define HP_SRAM_WIN2_SIZE WIN_SIZE(2) |
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#define HP_SRAM_WIN3_BASE L2_SRAM_BASE + WIN3_OFFSET |
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#define HP_SRAM_WIN3_SIZE WIN_SIZE(3) |
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#ifndef _LINKER |
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struct mem_win_config { |
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uint32_t base_addr; |
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uint32_t size; |
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uint32_t offset; |
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uint32_t mem_base; |
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bool initialize; |
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bool read_only; |
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}; |
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/** |
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* @brief Reinitializes device after power state change. |
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* Should be run on Primary Core only. |
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*/ |
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void mem_window_idle_exit(void); |
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#endif |
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#endif
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