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631 lines
17 KiB
631 lines
17 KiB
/* |
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* Copyright (c) 2019 Brett Witherspoon |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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|
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#define DT_DRV_COMPAT ti_cc13xx_cc26xx_uart |
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|
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#include <zephyr/device.h> |
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#include <errno.h> |
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#include <zephyr/sys/__assert.h> |
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#include <zephyr/sys/atomic.h> |
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#include <zephyr/pm/device.h> |
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#include <zephyr/pm/policy.h> |
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#include <zephyr/drivers/uart.h> |
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#include <zephyr/drivers/pinctrl.h> |
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|
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#include <driverlib/prcm.h> |
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#include <driverlib/uart.h> |
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#include <ti/drivers/Power.h> |
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#include <ti/drivers/power/PowerCC26X2.h> |
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#include <zephyr/irq.h> |
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struct uart_cc13xx_cc26xx_config { |
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uint32_t reg; |
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uint32_t sys_clk_freq; |
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}; |
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enum uart_cc13xx_cc26xx_pm_locks { |
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UART_CC13XX_CC26XX_PM_LOCK_TX, |
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UART_CC13XX_CC26XX_PM_LOCK_RX, |
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UART_CC13XX_CC26XX_PM_LOCK_COUNT, |
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}; |
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struct uart_cc13xx_cc26xx_data { |
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struct uart_config uart_config; |
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const struct pinctrl_dev_config *pcfg; |
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN |
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uart_irq_callback_user_data_t callback; |
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void *user_data; |
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ |
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#ifdef CONFIG_PM |
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Power_NotifyObj postNotify; |
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ATOMIC_DEFINE(pm_lock, UART_CC13XX_CC26XX_PM_LOCK_COUNT); |
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#endif |
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}; |
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static int uart_cc13xx_cc26xx_poll_in(const struct device *dev, |
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unsigned char *c) |
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{ |
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const struct uart_cc13xx_cc26xx_config *config = dev->config; |
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if (!UARTCharsAvail(config->reg)) { |
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return -1; |
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} |
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*c = UARTCharGetNonBlocking(config->reg); |
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return 0; |
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} |
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static void uart_cc13xx_cc26xx_poll_out(const struct device *dev, |
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unsigned char c) |
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{ |
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const struct uart_cc13xx_cc26xx_config *config = dev->config; |
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UARTCharPut(config->reg, c); |
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/* |
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* Need to wait for character to be transmitted to ensure cpu does not |
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* enter standby when uart is busy |
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*/ |
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while (UARTBusy(config->reg) == true) { |
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} |
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} |
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static int uart_cc13xx_cc26xx_err_check(const struct device *dev) |
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{ |
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const struct uart_cc13xx_cc26xx_config *config = dev->config; |
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uint32_t flags = UARTRxErrorGet(config->reg); |
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int error = (flags & UART_RXERROR_FRAMING ? UART_ERROR_FRAMING : 0) | |
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(flags & UART_RXERROR_PARITY ? UART_ERROR_PARITY : 0) | |
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(flags & UART_RXERROR_BREAK ? UART_BREAK : 0) | |
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(flags & UART_RXERROR_OVERRUN ? UART_ERROR_OVERRUN : 0); |
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UARTRxErrorClear(config->reg); |
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return error; |
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} |
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static int uart_cc13xx_cc26xx_configure(const struct device *dev, |
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const struct uart_config *cfg) |
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{ |
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const struct uart_cc13xx_cc26xx_config *config = dev->config; |
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struct uart_cc13xx_cc26xx_data *data = dev->data; |
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uint32_t line_ctrl = 0; |
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bool flow_ctrl; |
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switch (cfg->parity) { |
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case UART_CFG_PARITY_NONE: |
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line_ctrl |= UART_CONFIG_PAR_NONE; |
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break; |
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case UART_CFG_PARITY_ODD: |
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line_ctrl |= UART_CONFIG_PAR_ODD; |
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break; |
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case UART_CFG_PARITY_EVEN: |
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line_ctrl |= UART_CONFIG_PAR_EVEN; |
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break; |
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case UART_CFG_PARITY_MARK: |
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line_ctrl |= UART_CONFIG_PAR_ONE; |
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break; |
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case UART_CFG_PARITY_SPACE: |
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line_ctrl |= UART_CONFIG_PAR_ZERO; |
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break; |
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default: |
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return -EINVAL; |
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} |
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switch (cfg->stop_bits) { |
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case UART_CFG_STOP_BITS_1: |
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line_ctrl |= UART_CONFIG_STOP_ONE; |
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break; |
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case UART_CFG_STOP_BITS_2: |
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line_ctrl |= UART_CONFIG_STOP_TWO; |
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break; |
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case UART_CFG_STOP_BITS_0_5: |
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case UART_CFG_STOP_BITS_1_5: |
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return -ENOTSUP; |
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default: |
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return -EINVAL; |
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} |
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switch (cfg->data_bits) { |
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case UART_CFG_DATA_BITS_5: |
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line_ctrl |= UART_CONFIG_WLEN_5; |
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break; |
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case UART_CFG_DATA_BITS_6: |
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line_ctrl |= UART_CONFIG_WLEN_6; |
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break; |
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case UART_CFG_DATA_BITS_7: |
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line_ctrl |= UART_CONFIG_WLEN_7; |
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break; |
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case UART_CFG_DATA_BITS_8: |
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line_ctrl |= UART_CONFIG_WLEN_8; |
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break; |
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default: |
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return -EINVAL; |
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} |
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switch (cfg->flow_ctrl) { |
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case UART_CFG_FLOW_CTRL_NONE: |
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flow_ctrl = false; |
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break; |
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case UART_CFG_FLOW_CTRL_RTS_CTS: |
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flow_ctrl = true; |
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break; |
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case UART_CFG_FLOW_CTRL_DTR_DSR: |
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return -ENOTSUP; |
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default: |
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return -EINVAL; |
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} |
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/* Disables UART before setting control registers */ |
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UARTConfigSetExpClk(config->reg, |
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config->sys_clk_freq, cfg->baudrate, |
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line_ctrl); |
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/* Clear all UART interrupts */ |
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UARTIntClear(config->reg, |
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UART_INT_OE | UART_INT_BE | UART_INT_PE | |
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UART_INT_FE | UART_INT_RT | UART_INT_TX | |
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UART_INT_RX | UART_INT_CTS); |
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if (flow_ctrl) { |
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UARTHwFlowControlEnable(config->reg); |
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} else { |
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UARTHwFlowControlDisable(config->reg); |
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} |
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/* Re-enable UART */ |
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UARTEnable(config->reg); |
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/* Disabled FIFOs act as 1-byte-deep holding registers (character mode) */ |
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UARTFIFODisable(config->reg); |
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data->uart_config = *cfg; |
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return 0; |
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} |
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#ifdef CONFIG_UART_USE_RUNTIME_CONFIGURE |
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static int uart_cc13xx_cc26xx_config_get(const struct device *dev, |
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struct uart_config *cfg) |
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{ |
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struct uart_cc13xx_cc26xx_data *data = dev->data; |
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*cfg = data->uart_config; |
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return 0; |
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} |
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#endif /* CONFIG_UART_USE_RUNTIME_CONFIGURE */ |
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN |
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static int uart_cc13xx_cc26xx_fifo_fill(const struct device *dev, |
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const uint8_t *buf, |
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int len) |
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{ |
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const struct uart_cc13xx_cc26xx_config *config = dev->config; |
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int n = 0; |
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while (n < len) { |
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if (!UARTCharPutNonBlocking(config->reg, buf[n])) { |
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break; |
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} |
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n++; |
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} |
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return n; |
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} |
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static int uart_cc13xx_cc26xx_fifo_read(const struct device *dev, |
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uint8_t *buf, |
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const int len) |
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{ |
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const struct uart_cc13xx_cc26xx_config *config = dev->config; |
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int c, n; |
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n = 0; |
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while (n < len) { |
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c = UARTCharGetNonBlocking(config->reg); |
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if (c == -1) { |
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break; |
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} |
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buf[n++] = c; |
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} |
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return n; |
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} |
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static void uart_cc13xx_cc26xx_irq_tx_enable(const struct device *dev) |
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{ |
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const struct uart_cc13xx_cc26xx_config *config = dev->config; |
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#ifdef CONFIG_PM |
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struct uart_cc13xx_cc26xx_data *data = dev->data; |
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if (!atomic_test_and_set_bit(data->pm_lock, UART_CC13XX_CC26XX_PM_LOCK_TX)) { |
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/* |
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* When tx irq is enabled, it is implicit that we are expecting |
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* to transmit using the uart, hence we should no longer go |
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* into standby. |
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* |
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* Instead of using pm_device_busy_set(), which currently does |
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* not impact the PM policy, we specifically disable the |
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* standby mode instead, since it is the power state that |
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* would interfere with a transfer. |
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*/ |
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pm_policy_state_lock_get(PM_STATE_STANDBY, PM_ALL_SUBSTATES); |
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} |
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#endif |
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UARTIntEnable(config->reg, UART_INT_TX); |
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} |
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static void uart_cc13xx_cc26xx_irq_tx_disable(const struct device *dev) |
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{ |
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const struct uart_cc13xx_cc26xx_config *config = dev->config; |
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UARTIntDisable(config->reg, UART_INT_TX); |
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#ifdef CONFIG_PM |
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struct uart_cc13xx_cc26xx_data *data = dev->data; |
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if (atomic_test_and_clear_bit(data->pm_lock, UART_CC13XX_CC26XX_PM_LOCK_TX)) { |
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pm_policy_state_lock_put(PM_STATE_STANDBY, PM_ALL_SUBSTATES); |
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} |
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#endif |
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} |
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static int uart_cc13xx_cc26xx_irq_tx_ready(const struct device *dev) |
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{ |
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const struct uart_cc13xx_cc26xx_config *config = dev->config; |
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return UARTSpaceAvail(config->reg) ? 1 : 0; |
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} |
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static void uart_cc13xx_cc26xx_irq_rx_enable(const struct device *dev) |
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{ |
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const struct uart_cc13xx_cc26xx_config *config = dev->config; |
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#ifdef CONFIG_PM |
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struct uart_cc13xx_cc26xx_data *data = dev->data; |
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/* |
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* When rx is enabled, it is implicit that we are expecting |
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* to receive from the uart, hence we can no longer go into |
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* standby. |
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*/ |
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if (!atomic_test_and_set_bit(data->pm_lock, UART_CC13XX_CC26XX_PM_LOCK_RX)) { |
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pm_policy_state_lock_get(PM_STATE_STANDBY, PM_ALL_SUBSTATES); |
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} |
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#endif |
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UARTIntEnable(config->reg, UART_INT_RX); |
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} |
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static void uart_cc13xx_cc26xx_irq_rx_disable(const struct device *dev) |
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{ |
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const struct uart_cc13xx_cc26xx_config *config = dev->config; |
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#ifdef CONFIG_PM |
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struct uart_cc13xx_cc26xx_data *data = dev->data; |
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if (atomic_test_and_clear_bit(data->pm_lock, UART_CC13XX_CC26XX_PM_LOCK_RX)) { |
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pm_policy_state_lock_put(PM_STATE_STANDBY, PM_ALL_SUBSTATES); |
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} |
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#endif |
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UARTIntDisable(config->reg, UART_INT_RX); |
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} |
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static int uart_cc13xx_cc26xx_irq_tx_complete(const struct device *dev) |
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{ |
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const struct uart_cc13xx_cc26xx_config *config = dev->config; |
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return UARTBusy(config->reg) ? 0 : 1; |
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} |
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static int uart_cc13xx_cc26xx_irq_rx_ready(const struct device *dev) |
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{ |
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const struct uart_cc13xx_cc26xx_config *config = dev->config; |
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return UARTCharsAvail(config->reg) ? 1 : 0; |
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} |
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static void uart_cc13xx_cc26xx_irq_err_enable(const struct device *dev) |
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{ |
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const struct uart_cc13xx_cc26xx_config *config = dev->config; |
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UARTIntEnable(config->reg, UART_INT_OE | UART_INT_BE | UART_INT_PE | UART_INT_FE); |
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} |
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static void uart_cc13xx_cc26xx_irq_err_disable(const struct device *dev) |
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{ |
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const struct uart_cc13xx_cc26xx_config *config = dev->config; |
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UARTIntDisable(config->reg, UART_INT_OE | UART_INT_BE | UART_INT_PE | UART_INT_FE); |
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} |
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static int uart_cc13xx_cc26xx_irq_is_pending(const struct device *dev) |
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{ |
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const struct uart_cc13xx_cc26xx_config *config = dev->config; |
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uint32_t status = UARTIntStatus(config->reg, true); |
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return status & (UART_INT_TX | UART_INT_RX) ? 1 : 0; |
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} |
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static int uart_cc13xx_cc26xx_irq_update(const struct device *dev) |
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{ |
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ARG_UNUSED(dev); |
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return 1; |
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} |
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static void uart_cc13xx_cc26xx_irq_callback_set(const struct device *dev, |
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uart_irq_callback_user_data_t cb, |
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void *user_data) |
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{ |
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struct uart_cc13xx_cc26xx_data *data = dev->data; |
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data->callback = cb; |
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data->user_data = user_data; |
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} |
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static void uart_cc13xx_cc26xx_isr(const struct device *dev) |
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{ |
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struct uart_cc13xx_cc26xx_data *data = dev->data; |
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if (data->callback) { |
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data->callback(dev, data->user_data); |
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} |
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} |
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ |
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|
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#ifdef CONFIG_PM |
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/* |
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* ======== postNotifyFxn ======== |
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* Called by Power module when waking up the CPU from Standby, to support |
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* the case when PM is set but PM_DEVICE is |
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* not. The uart needs to be reconfigured afterwards unless Zephyr's device |
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* PM turned it off, in which case it'd be responsible for turning it back |
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* on and reconfiguring it. |
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*/ |
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static int postNotifyFxn(unsigned int eventType, uintptr_t eventArg, |
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uintptr_t clientArg) |
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{ |
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const struct device *dev = (const struct device *)clientArg; |
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const struct uart_cc13xx_cc26xx_config *config = dev->config; |
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struct uart_cc13xx_cc26xx_data *data = dev->data; |
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int ret = Power_NOTIFYDONE; |
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int16_t res_id; |
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/* Reconfigure the hardware if returning from standby */ |
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if (eventType == PowerCC26XX_AWAKE_STANDBY) { |
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if (config->reg == DT_INST_REG_ADDR(0)) { |
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res_id = PowerCC26XX_PERIPH_UART0; |
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} else { /* DT_INST_REG_ADDR(1) */ |
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res_id = PowerCC26X2_PERIPH_UART1; |
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} |
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|
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if (Power_getDependencyCount(res_id) != 0) { |
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/* |
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* Reconfigure and enable UART only if not |
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* actively powered down |
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*/ |
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if (uart_cc13xx_cc26xx_configure(dev, |
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&data->uart_config) != 0) { |
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ret = Power_NOTIFYERROR; |
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} |
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} |
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} |
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return (ret); |
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} |
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#endif |
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|
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#ifdef CONFIG_PM_DEVICE |
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static int uart_cc13xx_cc26xx_pm_action(const struct device *dev, |
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enum pm_device_action action) |
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{ |
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const struct uart_cc13xx_cc26xx_config *config = dev->config; |
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struct uart_cc13xx_cc26xx_data *data = dev->data; |
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int ret = 0; |
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|
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switch (action) { |
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case PM_DEVICE_ACTION_RESUME: |
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if (config->reg == DT_INST_REG_ADDR(0)) { |
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Power_setDependency(PowerCC26XX_PERIPH_UART0); |
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} else { |
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Power_setDependency(PowerCC26X2_PERIPH_UART1); |
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} |
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/* Configure and enable UART */ |
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ret = uart_cc13xx_cc26xx_configure(dev, &data->uart_config); |
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break; |
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case PM_DEVICE_ACTION_SUSPEND: |
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UARTDisable(config->reg); |
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/* |
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* Release power dependency - i.e. potentially power |
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* down serial domain. |
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*/ |
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if (config->reg == DT_INST_REG_ADDR(0)) { |
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Power_releaseDependency(PowerCC26XX_PERIPH_UART0); |
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} else { |
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Power_releaseDependency(PowerCC26X2_PERIPH_UART1); |
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} |
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break; |
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default: |
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return -ENOTSUP; |
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} |
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|
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return ret; |
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} |
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#endif /* CONFIG_PM_DEVICE */ |
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|
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static DEVICE_API(uart, uart_cc13xx_cc26xx_driver_api) = { |
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.poll_in = uart_cc13xx_cc26xx_poll_in, |
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.poll_out = uart_cc13xx_cc26xx_poll_out, |
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.err_check = uart_cc13xx_cc26xx_err_check, |
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#ifdef CONFIG_UART_USE_RUNTIME_CONFIGURE |
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.configure = uart_cc13xx_cc26xx_configure, |
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.config_get = uart_cc13xx_cc26xx_config_get, |
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#endif |
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN |
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.fifo_fill = uart_cc13xx_cc26xx_fifo_fill, |
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.fifo_read = uart_cc13xx_cc26xx_fifo_read, |
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.irq_tx_enable = uart_cc13xx_cc26xx_irq_tx_enable, |
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.irq_tx_disable = uart_cc13xx_cc26xx_irq_tx_disable, |
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.irq_tx_ready = uart_cc13xx_cc26xx_irq_tx_ready, |
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.irq_rx_enable = uart_cc13xx_cc26xx_irq_rx_enable, |
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.irq_rx_disable = uart_cc13xx_cc26xx_irq_rx_disable, |
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.irq_tx_complete = uart_cc13xx_cc26xx_irq_tx_complete, |
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.irq_rx_ready = uart_cc13xx_cc26xx_irq_rx_ready, |
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.irq_err_enable = uart_cc13xx_cc26xx_irq_err_enable, |
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.irq_err_disable = uart_cc13xx_cc26xx_irq_err_disable, |
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.irq_is_pending = uart_cc13xx_cc26xx_irq_is_pending, |
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.irq_update = uart_cc13xx_cc26xx_irq_update, |
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.irq_callback_set = uart_cc13xx_cc26xx_irq_callback_set, |
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ |
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}; |
|
|
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#ifdef CONFIG_PM |
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#define UART_CC13XX_CC26XX_POWER_UART(n) \ |
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do { \ |
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struct uart_cc13xx_cc26xx_data *dev_data = dev->data; \ |
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\ |
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atomic_clear_bit(dev_data->pm_lock, UART_CC13XX_CC26XX_PM_LOCK_RX); \ |
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atomic_clear_bit(dev_data->pm_lock, UART_CC13XX_CC26XX_PM_LOCK_TX); \ |
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\ |
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/* Set Power dependencies */ \ |
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if (DT_INST_REG_ADDR(n) == 0x40001000) { \ |
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Power_setDependency(PowerCC26XX_PERIPH_UART0); \ |
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} else { \ |
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Power_setDependency(PowerCC26X2_PERIPH_UART1); \ |
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} \ |
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\ |
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/* Register notification function */ \ |
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Power_registerNotify(&dev_data->postNotify, \ |
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PowerCC26XX_AWAKE_STANDBY, \ |
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postNotifyFxn, (uintptr_t)dev); \ |
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} while (false) |
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#else |
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#define UART_CC13XX_CC26XX_POWER_UART(n) \ |
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do { \ |
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uint32_t domain, periph; \ |
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\ |
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/* Enable UART power domain */ \ |
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if (DT_INST_REG_ADDR(n) == 0x40001000) { \ |
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domain = PRCM_DOMAIN_SERIAL; \ |
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periph = PRCM_PERIPH_UART0; \ |
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} else { \ |
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domain = PRCM_DOMAIN_PERIPH; \ |
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periph = PRCM_PERIPH_UART1; \ |
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} \ |
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PRCMPowerDomainOn(domain); \ |
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\ |
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/* Enable UART peripherals */ \ |
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PRCMPeripheralRunEnable(periph); \ |
|
PRCMPeripheralSleepEnable(periph); \ |
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\ |
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/* Load PRCM settings */ \ |
|
PRCMLoadSet(); \ |
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while (!PRCMLoadGet()) { \ |
|
continue; \ |
|
} \ |
|
\ |
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/* UART should not be accessed until power domain is on. */ \ |
|
while (PRCMPowerDomainsAllOn(domain) != \ |
|
PRCM_DOMAIN_POWER_ON) { \ |
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continue; \ |
|
} \ |
|
} while (false) |
|
#endif |
|
|
|
#ifdef CONFIG_UART_INTERRUPT_DRIVEN |
|
#define UART_CC13XX_CC26XX_IRQ_CFG(n) \ |
|
do { \ |
|
const struct uart_cc13xx_cc26xx_config *config = \ |
|
dev->config; \ |
|
\ |
|
UARTIntClear(config->reg, UART_INT_RX); \ |
|
\ |
|
IRQ_CONNECT(DT_INST_IRQN(n), \ |
|
DT_INST_IRQ(n, priority), \ |
|
uart_cc13xx_cc26xx_isr, \ |
|
DEVICE_DT_INST_GET(n), \ |
|
0); \ |
|
irq_enable(DT_INST_IRQN(n)); \ |
|
/* Causes an initial TX ready INT when TX INT enabled */\ |
|
UARTCharPutNonBlocking(config->reg, '\0'); \ |
|
} while (false) |
|
|
|
#define UART_CC13XX_CC26XX_INT_FIELDS \ |
|
.callback = NULL, \ |
|
.user_data = NULL, |
|
#else |
|
#define UART_CC13XX_CC26XX_IRQ_CFG(n) |
|
#define UART_CC13XX_CC26XX_INT_FIELDS |
|
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ |
|
|
|
#define UART_CC13XX_CC26XX_DEVICE_DEFINE(n) \ |
|
PM_DEVICE_DT_INST_DEFINE(n, uart_cc13xx_cc26xx_pm_action); \ |
|
\ |
|
DEVICE_DT_INST_DEFINE(n, \ |
|
uart_cc13xx_cc26xx_init_##n, \ |
|
PM_DEVICE_DT_INST_GET(n), \ |
|
&uart_cc13xx_cc26xx_data_##n, &uart_cc13xx_cc26xx_config_##n,\ |
|
PRE_KERNEL_1, CONFIG_SERIAL_INIT_PRIORITY, \ |
|
&uart_cc13xx_cc26xx_driver_api) |
|
|
|
#define UART_CC13XX_CC26XX_INIT_FUNC(n) \ |
|
static int uart_cc13xx_cc26xx_init_##n(const struct device *dev) \ |
|
{ \ |
|
struct uart_cc13xx_cc26xx_data *data = dev->data; \ |
|
int ret; \ |
|
\ |
|
UART_CC13XX_CC26XX_POWER_UART(n); \ |
|
\ |
|
ret = pinctrl_apply_state(data->pcfg, PINCTRL_STATE_DEFAULT); \ |
|
if (ret < 0) { \ |
|
return ret; \ |
|
} \ |
|
\ |
|
/* Configure and enable UART */ \ |
|
ret = uart_cc13xx_cc26xx_configure(dev, &data->uart_config);\ |
|
\ |
|
/* Enable interrupts */ \ |
|
UART_CC13XX_CC26XX_IRQ_CFG(n); \ |
|
\ |
|
return ret; \ |
|
} |
|
|
|
|
|
#define UART_CC13XX_CC26XX_INIT(n) \ |
|
PINCTRL_DT_INST_DEFINE(n); \ |
|
UART_CC13XX_CC26XX_INIT_FUNC(n); \ |
|
\ |
|
static const struct uart_cc13xx_cc26xx_config \ |
|
uart_cc13xx_cc26xx_config_##n = { \ |
|
.reg = DT_INST_REG_ADDR(n), \ |
|
.sys_clk_freq = DT_INST_PROP_BY_PHANDLE(n, clocks, \ |
|
clock_frequency) \ |
|
}; \ |
|
\ |
|
static struct uart_cc13xx_cc26xx_data \ |
|
uart_cc13xx_cc26xx_data_##n = { \ |
|
.uart_config = { \ |
|
.baudrate = DT_INST_PROP(n, current_speed), \ |
|
.parity = DT_INST_ENUM_IDX(n, parity), \ |
|
.stop_bits = DT_INST_ENUM_IDX(n, stop_bits), \ |
|
.data_bits = DT_INST_ENUM_IDX(n, data_bits), \ |
|
.flow_ctrl = UART_CFG_FLOW_CTRL_NONE, \ |
|
}, \ |
|
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \ |
|
UART_CC13XX_CC26XX_INT_FIELDS \ |
|
}; \ |
|
\ |
|
UART_CC13XX_CC26XX_DEVICE_DEFINE(n); |
|
|
|
DT_INST_FOREACH_STATUS_OKAY(UART_CC13XX_CC26XX_INIT)
|
|
|