Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
 
 
 
 
 
 

67 lines
1.7 KiB

# Copyright (c) 2018 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
menuconfig I2C_STM32
bool "STM32 I2C driver"
default y
depends on DT_HAS_ST_STM32_I2C_V1_ENABLED || DT_HAS_ST_STM32_I2C_V2_ENABLED
select PINCTRL
help
Enable I2C support on the STM32 SoCs
if I2C_STM32
config I2C_STM32_V1
bool
default y
depends on DT_HAS_ST_STM32_I2C_V1_ENABLED
select I2C_STM32_INTERRUPT if I2C_TARGET
help
Driver variant matching `st,stm32-i2c-v1` compatible.
config I2C_STM32_V2
bool
default y
depends on DT_HAS_ST_STM32_I2C_V2_ENABLED
select I2C_STM32_INTERRUPT if I2C_TARGET
help
Driver variant matching `st,stm32-i2c-v2` compatible.
If I2C_TARGET is enabled it selects I2C_STM32_INTERRUPT, since target mode
is only supported by this driver with interrupts enabled.
config I2C_STM32_INTERRUPT
bool "STM32 MCU I2C Interrupt Support"
depends on I2C_STM32_V1 || I2C_STM32_V2
default y
help
Enable Interrupt support for the I2C Driver
config I2C_STM32_COMBINED_INTERRUPT
bool
depends on I2C_STM32_INTERRUPT
default y if SOC_SERIES_STM32C0X || SOC_SERIES_STM32F0X || \
SOC_SERIES_STM32G0X || SOC_SERIES_STM32L0X || \
SOC_SERIES_STM32U0X || SOC_SERIES_STM32WB0X
config I2C_STM32_BUS_RECOVERY
bool "Bus recovery support"
select I2C_BITBANG
help
Enable STM32 driver bus recovery support via GPIO bitbanging.
config I2C_STM32_V2_TIMING
bool "compute the I2C V2 bus timing"
depends on I2C_STM32_V2
help
Enable STM32 driver bus to calculate the Timing.
config I2C_STM32_V2_DMA
bool "DMA support"
depends on I2C_STM32_V2
select DMA
select CACHE_MANAGEMENT if CPU_HAS_DCACHE
select EXPERIMENTAL
help
Enable DMA support for the STM32 I2C driver.
endif # I2C_STM32