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28 lines
335 B
28 lines
335 B
/* |
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* Copyright (c) 2023 Intel Corporation |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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/dts-v1/; |
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#include <mem.h> |
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#define DT_DRAM_SIZE DT_SIZE_M(2048) |
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#include <intel/alder_lake.dtsi> |
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/ { |
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chosen { |
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zephyr,sram = &dram0; |
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}; |
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aliases { |
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watchdog0 = &tco_wdt; |
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sdhc0 = &emmc; |
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}; |
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}; |
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&cpu { |
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compatible = "intel,x86_64"; |
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};
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