Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
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/*
* Copyright (c) 2022-2025 Grant Ramsay <grant.ramsay@hotmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <espressif/esp32/esp32_wrover_e_n4r8.dtsi>
#include "esp32_ethernet_kit-pinctrl.dtsi"
#include <espressif/partitions_0x1000_amp.dtsi>
/ {
model = "Espressif ESP32-Ethernet-Kit PROCPU";
compatible = "espressif,esp32";
aliases {
uart-0 = &uart0;
watchdog0 = &wdt0;
};
chosen {
zephyr,sram = &sram1;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,bt-hci = &esp32_bt_hci;
};
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&i2s0 {
pinctrl-0 = <&i2s0_default>;
pinctrl-names = "default";
status = "disabled";
};
&i2s1 {
pinctrl-0 = <&i2s1_default>;
pinctrl-names = "default";
status = "disabled";
};
&spi2 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-0 = <&spim2_default>;
pinctrl-names = "default";
};
&timer0 {
status = "okay";
};
&timer1 {
status = "okay";
};
&timer2 {
status = "okay";
};
&timer3 {
status = "okay";
};
&trng0 {
status = "okay";
};
&mdio {
pinctrl-0 = <&mdio_default>;
pinctrl-names = "default";
phy: ethernet-phy@1 {
compatible = "ethernet-phy";
status = "disabled";
reg = <1>;
};
};
&eth {
phy-handle = <&phy>;
};
&esp32_bt_hci {
status = "okay";
};
&wifi {
status = "okay";
};