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490 lines
13 KiB
490 lines
13 KiB
/* |
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* Copyright (c) 2017, NXP |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#define DT_DRV_COMPAT nxp_lpc_usart |
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/** @file |
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* @brief USART driver for LPC54XXX and LPC55xxx families. |
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* |
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* Note: |
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* - The driver is implemented for only one device, multiple instances |
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* will be implemented in the future. |
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*/ |
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#include <errno.h> |
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#include <zephyr/device.h> |
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#include <zephyr/drivers/uart.h> |
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#include <zephyr/drivers/clock_control.h> |
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#include <zephyr/irq.h> |
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#include <fsl_usart.h> |
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#include <soc.h> |
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#include <fsl_device_registers.h> |
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#include <zephyr/drivers/pinctrl.h> |
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struct mcux_flexcomm_config { |
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USART_Type *base; |
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const struct device *clock_dev; |
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clock_control_subsys_t clock_subsys; |
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uint32_t baud_rate; |
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uint8_t parity; |
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN |
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void (*irq_config_func)(const struct device *dev); |
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#endif |
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const struct pinctrl_dev_config *pincfg; |
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}; |
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struct mcux_flexcomm_data { |
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN |
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uart_irq_callback_user_data_t callback; |
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void *cb_data; |
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#endif |
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#ifdef CONFIG_UART_USE_RUNTIME_CONFIGURE |
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struct uart_config uart_config; |
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#endif |
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}; |
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static int mcux_flexcomm_poll_in(const struct device *dev, unsigned char *c) |
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{ |
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const struct mcux_flexcomm_config *config = dev->config; |
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uint32_t flags = USART_GetStatusFlags(config->base); |
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int ret = -1; |
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if (flags & kUSART_RxFifoNotEmptyFlag) { |
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*c = USART_ReadByte(config->base); |
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ret = 0; |
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} |
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return ret; |
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} |
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static void mcux_flexcomm_poll_out(const struct device *dev, |
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unsigned char c) |
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{ |
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const struct mcux_flexcomm_config *config = dev->config; |
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/* Wait until space is available in TX FIFO */ |
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while (!(USART_GetStatusFlags(config->base) & kUSART_TxFifoEmptyFlag)) { |
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} |
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USART_WriteByte(config->base, c); |
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} |
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static int mcux_flexcomm_err_check(const struct device *dev) |
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{ |
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const struct mcux_flexcomm_config *config = dev->config; |
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uint32_t flags = USART_GetStatusFlags(config->base); |
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int err = 0; |
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if (flags & kStatus_USART_RxRingBufferOverrun) { |
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err |= UART_ERROR_OVERRUN; |
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} |
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if (flags & kStatus_USART_ParityError) { |
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err |= UART_ERROR_PARITY; |
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} |
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if (flags & kStatus_USART_FramingError) { |
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err |= UART_ERROR_FRAMING; |
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} |
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USART_ClearStatusFlags(config->base, |
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kStatus_USART_RxRingBufferOverrun | |
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kStatus_USART_ParityError | |
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kStatus_USART_FramingError); |
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return err; |
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} |
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN |
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static int mcux_flexcomm_fifo_fill(const struct device *dev, |
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const uint8_t *tx_data, |
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int len) |
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{ |
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const struct mcux_flexcomm_config *config = dev->config; |
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uint8_t num_tx = 0U; |
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while ((len - num_tx > 0) && |
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(USART_GetStatusFlags(config->base) |
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& kUSART_TxFifoNotFullFlag)) { |
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USART_WriteByte(config->base, tx_data[num_tx++]); |
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} |
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return num_tx; |
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} |
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static int mcux_flexcomm_fifo_read(const struct device *dev, uint8_t *rx_data, |
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const int len) |
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{ |
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const struct mcux_flexcomm_config *config = dev->config; |
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uint8_t num_rx = 0U; |
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while ((len - num_rx > 0) && |
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(USART_GetStatusFlags(config->base) |
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& kUSART_RxFifoNotEmptyFlag)) { |
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rx_data[num_rx++] = USART_ReadByte(config->base); |
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} |
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return num_rx; |
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} |
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static void mcux_flexcomm_irq_tx_enable(const struct device *dev) |
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{ |
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const struct mcux_flexcomm_config *config = dev->config; |
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uint32_t mask = kUSART_TxLevelInterruptEnable; |
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USART_EnableInterrupts(config->base, mask); |
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} |
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static void mcux_flexcomm_irq_tx_disable(const struct device *dev) |
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{ |
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const struct mcux_flexcomm_config *config = dev->config; |
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uint32_t mask = kUSART_TxLevelInterruptEnable; |
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USART_DisableInterrupts(config->base, mask); |
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} |
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static int mcux_flexcomm_irq_tx_complete(const struct device *dev) |
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{ |
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const struct mcux_flexcomm_config *config = dev->config; |
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return (config->base->STAT & USART_STAT_TXIDLE_MASK) != 0; |
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} |
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static int mcux_flexcomm_irq_tx_ready(const struct device *dev) |
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{ |
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const struct mcux_flexcomm_config *config = dev->config; |
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uint32_t mask = kUSART_TxLevelInterruptEnable; |
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uint32_t flags = USART_GetStatusFlags(config->base); |
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return (USART_GetEnabledInterrupts(config->base) & mask) |
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&& (flags & kUSART_TxFifoEmptyFlag); |
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} |
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static void mcux_flexcomm_irq_rx_enable(const struct device *dev) |
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{ |
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const struct mcux_flexcomm_config *config = dev->config; |
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uint32_t mask = kUSART_RxLevelInterruptEnable; |
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USART_EnableInterrupts(config->base, mask); |
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} |
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static void mcux_flexcomm_irq_rx_disable(const struct device *dev) |
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{ |
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const struct mcux_flexcomm_config *config = dev->config; |
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uint32_t mask = kUSART_RxLevelInterruptEnable; |
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USART_DisableInterrupts(config->base, mask); |
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} |
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static int mcux_flexcomm_irq_rx_full(const struct device *dev) |
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{ |
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const struct mcux_flexcomm_config *config = dev->config; |
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uint32_t flags = USART_GetStatusFlags(config->base); |
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return (flags & kUSART_RxFifoNotEmptyFlag) != 0U; |
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} |
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static int mcux_flexcomm_irq_rx_pending(const struct device *dev) |
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{ |
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const struct mcux_flexcomm_config *config = dev->config; |
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uint32_t mask = kUSART_RxLevelInterruptEnable; |
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return (USART_GetEnabledInterrupts(config->base) & mask) |
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&& mcux_flexcomm_irq_rx_full(dev); |
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} |
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static void mcux_flexcomm_irq_err_enable(const struct device *dev) |
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{ |
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const struct mcux_flexcomm_config *config = dev->config; |
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uint32_t mask = kStatus_USART_NoiseError | |
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kStatus_USART_FramingError | |
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kStatus_USART_ParityError; |
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USART_EnableInterrupts(config->base, mask); |
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} |
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static void mcux_flexcomm_irq_err_disable(const struct device *dev) |
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{ |
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const struct mcux_flexcomm_config *config = dev->config; |
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uint32_t mask = kStatus_USART_NoiseError | |
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kStatus_USART_FramingError | |
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kStatus_USART_ParityError; |
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USART_DisableInterrupts(config->base, mask); |
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} |
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static int mcux_flexcomm_irq_is_pending(const struct device *dev) |
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{ |
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return (mcux_flexcomm_irq_tx_ready(dev) |
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|| mcux_flexcomm_irq_rx_pending(dev)); |
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} |
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static int mcux_flexcomm_irq_update(const struct device *dev) |
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{ |
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return 1; |
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} |
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static void mcux_flexcomm_irq_callback_set(const struct device *dev, |
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uart_irq_callback_user_data_t cb, |
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void *cb_data) |
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{ |
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struct mcux_flexcomm_data *data = dev->data; |
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data->callback = cb; |
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data->cb_data = cb_data; |
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} |
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static void mcux_flexcomm_isr(const struct device *dev) |
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{ |
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struct mcux_flexcomm_data *data = dev->data; |
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if (data->callback) { |
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data->callback(dev, data->cb_data); |
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} |
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} |
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ |
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#ifdef CONFIG_UART_USE_RUNTIME_CONFIGURE |
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static int mcux_flexcomm_uart_configure(const struct device *dev, const struct uart_config *cfg) |
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{ |
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const struct mcux_flexcomm_config *config = dev->config; |
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struct mcux_flexcomm_data *data = dev->data; |
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struct uart_config *uart_config = &data->uart_config; |
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usart_config_t usart_config; |
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usart_parity_mode_t parity_mode; |
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usart_stop_bit_count_t stop_bits; |
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usart_data_len_t data_bits = kUSART_8BitsPerChar; |
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bool nine_bit_mode = false; |
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uint32_t clock_freq; |
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/* Set up structure to reconfigure UART */ |
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USART_GetDefaultConfig(&usart_config); |
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/* Set parity */ |
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if (cfg->parity == UART_CFG_PARITY_ODD) { |
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parity_mode = kUSART_ParityOdd; |
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} else if (cfg->parity == UART_CFG_PARITY_EVEN) { |
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parity_mode = kUSART_ParityEven; |
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} else if (cfg->parity == UART_CFG_PARITY_NONE) { |
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parity_mode = kUSART_ParityDisabled; |
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} else { |
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return -ENOTSUP; |
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} |
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usart_config.parityMode = parity_mode; |
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/* Set baudrate */ |
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usart_config.baudRate_Bps = cfg->baudrate; |
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/* Set stop bits */ |
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if (cfg->stop_bits == UART_CFG_STOP_BITS_1) { |
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stop_bits = kUSART_OneStopBit; |
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} else if (cfg->stop_bits == UART_CFG_STOP_BITS_2) { |
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stop_bits = kUSART_TwoStopBit; |
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} else { |
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return -ENOTSUP; |
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} |
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usart_config.stopBitCount = stop_bits; |
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/* Set data bits */ |
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if (cfg->data_bits == UART_CFG_DATA_BITS_5 || |
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cfg->data_bits == UART_CFG_DATA_BITS_6) { |
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return -ENOTSUP; |
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} else if (cfg->data_bits == UART_CFG_DATA_BITS_7) { |
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data_bits = kUSART_7BitsPerChar; |
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} else if (cfg->data_bits == UART_CFG_DATA_BITS_8) { |
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data_bits = kUSART_8BitsPerChar; |
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} else if (cfg->data_bits == UART_CFG_DATA_BITS_9) { |
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nine_bit_mode = true; |
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} else { |
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return -EINVAL; |
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} |
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usart_config.bitCountPerChar = data_bits; |
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/* Set flow control */ |
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if (cfg->flow_ctrl == UART_CFG_FLOW_CTRL_NONE) { |
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usart_config.enableHardwareFlowControl = false; |
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} else if (cfg->flow_ctrl == UART_CFG_FLOW_CTRL_RTS_CTS) { |
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usart_config.enableHardwareFlowControl = true; |
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} else { |
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return -ENOTSUP; |
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} |
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/* Wait for USART to finish transmission and turn off */ |
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USART_Deinit(config->base); |
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/* Get UART clock frequency */ |
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clock_control_get_rate(config->clock_dev, |
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config->clock_subsys, &clock_freq); |
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/* Handle 9 bit mode */ |
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USART_Enable9bitMode(config->base, nine_bit_mode); |
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/* Reconfigure UART */ |
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USART_Init(config->base, &usart_config, clock_freq); |
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/* Update driver device data */ |
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uart_config->parity = cfg->parity; |
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uart_config->baudrate = cfg->baudrate; |
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uart_config->stop_bits = cfg->stop_bits; |
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uart_config->data_bits = cfg->data_bits; |
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uart_config->flow_ctrl = cfg->flow_ctrl; |
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return 0; |
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} |
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static int mcux_flexcomm_uart_config_get(const struct device *dev, |
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struct uart_config *cfg) |
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{ |
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struct mcux_flexcomm_data *data = dev->data; |
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*cfg = data->uart_config; |
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return 0; |
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} |
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#endif /* CONFIG_UART_USE_RUNTIME_CONFIGURE */ |
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static int mcux_flexcomm_init(const struct device *dev) |
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{ |
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const struct mcux_flexcomm_config *config = dev->config; |
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#ifdef CONFIG_UART_USE_RUNTIME_CONFIGURE |
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struct mcux_flexcomm_data *data = dev->data; |
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struct uart_config *cfg = &data->uart_config; |
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#endif /* CONFIG_UART_USE_RUNTIME_CONFIGURE */ |
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usart_config_t usart_config; |
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usart_parity_mode_t parity_mode; |
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uint32_t clock_freq; |
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int err; |
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err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT); |
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if (err) { |
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return err; |
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} |
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if (!device_is_ready(config->clock_dev)) { |
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return -ENODEV; |
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} |
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/* Get the clock frequency */ |
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if (clock_control_get_rate(config->clock_dev, config->clock_subsys, |
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&clock_freq)) { |
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return -EINVAL; |
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} |
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if (config->parity == UART_CFG_PARITY_ODD) { |
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parity_mode = kUSART_ParityOdd; |
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} else if (config->parity == UART_CFG_PARITY_EVEN) { |
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parity_mode = kUSART_ParityEven; |
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} else { |
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parity_mode = kUSART_ParityDisabled; |
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} |
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USART_GetDefaultConfig(&usart_config); |
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usart_config.enableTx = true; |
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usart_config.enableRx = true; |
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usart_config.parityMode = parity_mode; |
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usart_config.baudRate_Bps = config->baud_rate; |
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#ifdef CONFIG_UART_USE_RUNTIME_CONFIGURE |
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cfg->baudrate = config->baud_rate; |
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cfg->parity = config->parity; |
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/* From USART_GetDefaultConfig */ |
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cfg->stop_bits = UART_CFG_STOP_BITS_1; |
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cfg->data_bits = UART_CFG_DATA_BITS_8; |
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cfg->flow_ctrl = UART_CFG_FLOW_CTRL_NONE; |
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#endif /* CONFIG_UART_USE_RUNTIME_CONFIGURE */ |
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USART_Init(config->base, &usart_config, clock_freq); |
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN |
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config->irq_config_func(dev); |
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#endif |
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return 0; |
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} |
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static const struct uart_driver_api mcux_flexcomm_driver_api = { |
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.poll_in = mcux_flexcomm_poll_in, |
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.poll_out = mcux_flexcomm_poll_out, |
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.err_check = mcux_flexcomm_err_check, |
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#ifdef CONFIG_UART_USE_RUNTIME_CONFIGURE |
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.configure = mcux_flexcomm_uart_configure, |
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.config_get = mcux_flexcomm_uart_config_get, |
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#endif |
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN |
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.fifo_fill = mcux_flexcomm_fifo_fill, |
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.fifo_read = mcux_flexcomm_fifo_read, |
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.irq_tx_enable = mcux_flexcomm_irq_tx_enable, |
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.irq_tx_disable = mcux_flexcomm_irq_tx_disable, |
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.irq_tx_complete = mcux_flexcomm_irq_tx_complete, |
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.irq_tx_ready = mcux_flexcomm_irq_tx_ready, |
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.irq_rx_enable = mcux_flexcomm_irq_rx_enable, |
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.irq_rx_disable = mcux_flexcomm_irq_rx_disable, |
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.irq_rx_ready = mcux_flexcomm_irq_rx_full, |
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.irq_err_enable = mcux_flexcomm_irq_err_enable, |
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.irq_err_disable = mcux_flexcomm_irq_err_disable, |
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.irq_is_pending = mcux_flexcomm_irq_is_pending, |
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.irq_update = mcux_flexcomm_irq_update, |
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.irq_callback_set = mcux_flexcomm_irq_callback_set, |
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#endif |
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}; |
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN |
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#define UART_MCUX_FLEXCOMM_CONFIG_FUNC(n) \ |
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static void mcux_flexcomm_config_func_##n(const struct device *dev) \ |
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{ \ |
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IRQ_CONNECT(DT_INST_IRQN(n), \ |
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DT_INST_IRQ(n, priority), \ |
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mcux_flexcomm_isr, DEVICE_DT_INST_GET(n), 0);\ |
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\ |
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irq_enable(DT_INST_IRQN(n)); \ |
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} |
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#define UART_MCUX_FLEXCOMM_IRQ_CFG_FUNC_INIT(n) \ |
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.irq_config_func = mcux_flexcomm_config_func_##n |
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#define UART_MCUX_FLEXCOMM_INIT_CFG(n) \ |
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UART_MCUX_FLEXCOMM_DECLARE_CFG(n, \ |
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UART_MCUX_FLEXCOMM_IRQ_CFG_FUNC_INIT(n)) |
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#else |
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#define UART_MCUX_FLEXCOMM_CONFIG_FUNC(n) |
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#define UART_MCUX_FLEXCOMM_IRQ_CFG_FUNC_INIT |
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#define UART_MCUX_FLEXCOMM_INIT_CFG(n) \ |
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UART_MCUX_FLEXCOMM_DECLARE_CFG(n, UART_MCUX_FLEXCOMM_IRQ_CFG_FUNC_INIT) |
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#endif |
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#define UART_MCUX_FLEXCOMM_DECLARE_CFG(n, IRQ_FUNC_INIT) \ |
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static const struct mcux_flexcomm_config mcux_flexcomm_##n##_config = { \ |
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.base = (USART_Type *)DT_INST_REG_ADDR(n), \ |
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.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \ |
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.clock_subsys = \ |
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(clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),\ |
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.baud_rate = DT_INST_PROP(n, current_speed), \ |
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.parity = DT_INST_ENUM_IDX_OR(n, parity, UART_CFG_PARITY_NONE), \ |
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.pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \ |
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IRQ_FUNC_INIT \ |
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} |
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#define UART_MCUX_FLEXCOMM_INIT(n) \ |
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\ |
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PINCTRL_DT_INST_DEFINE(n); \ |
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\ |
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static struct mcux_flexcomm_data mcux_flexcomm_##n##_data; \ |
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\ |
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static const struct mcux_flexcomm_config mcux_flexcomm_##n##_config;\ |
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\ |
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DEVICE_DT_INST_DEFINE(n, \ |
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&mcux_flexcomm_init, \ |
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NULL, \ |
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&mcux_flexcomm_##n##_data, \ |
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&mcux_flexcomm_##n##_config, \ |
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PRE_KERNEL_1, \ |
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CONFIG_SERIAL_INIT_PRIORITY, \ |
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&mcux_flexcomm_driver_api); \ |
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\ |
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UART_MCUX_FLEXCOMM_CONFIG_FUNC(n) \ |
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\ |
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UART_MCUX_FLEXCOMM_INIT_CFG(n); |
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DT_INST_FOREACH_STATUS_OKAY(UART_MCUX_FLEXCOMM_INIT)
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