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252 lines
5.3 KiB
252 lines
5.3 KiB
/* |
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* Copyright 2023 Google LLC |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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/dts-v1/; |
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#include <st/h7/stm32h747Xi_m7.dtsi> |
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#include <st/h7/stm32h747xihx-pinctrl.dtsi> |
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#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h> |
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#include "arduino_giga_r1.dtsi" |
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/ { |
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model = "Arduino GIGA R1 WiFi Board (M7)"; |
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compatible = "arduino,giga-r1"; |
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chosen { |
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zephyr,console = &usart1; |
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zephyr,shell-uart = &usart1; |
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zephyr,uart-mcumgr = &usart1; |
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zephyr,bt-uart = &uart7; |
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zephyr,sram = &sram0; |
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zephyr,flash = &flash0; |
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zephyr,canbus = &fdcan2; |
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zephyr,code-partition = &slot0_partition; |
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}; |
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sdram1: sdram@c0000000 { |
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compatible = "zephyr,memory-region", "mmio-sram"; |
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device_type = "memory"; |
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reg = <0xc0000000 DT_SIZE_M(8)>; |
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zephyr,memory-region = "SDRAM1"; |
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zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>; |
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}; |
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aliases { |
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led0 = &red_led; |
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led1 = &green_led; |
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sw0 = &user_button; |
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spi-flash0 = &n25q128a1; |
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}; |
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}; |
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&clk_hse { |
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status = "okay"; |
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clock-frequency = <DT_FREQ_M(16)>; |
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}; |
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&clk_lse { |
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status = "okay"; |
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}; |
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&clk_hsi48 { |
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status = "okay"; |
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}; |
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&pll { |
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div-m = <2>; |
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mul-n = <120>; |
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div-p = <2>; |
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div-q = <4>; |
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div-r = <2>; |
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clocks = <&clk_hse>; |
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status = "okay"; |
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}; |
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&rcc { |
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clocks = <&pll>; |
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clock-frequency = <DT_FREQ_M(480)>; |
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}; |
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&usart1 { |
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status = "okay"; |
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pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pb7>; |
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pinctrl-names = "default"; |
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current-speed = <115200>; |
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}; |
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&usart6 { |
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status = "disabled"; |
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pinctrl-0 = <&usart6_tx_pg14 &usart6_rx_pc7>; |
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pinctrl-names = "default"; |
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current-speed = <115200>; |
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}; |
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&uart4 { |
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status = "disabled"; |
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pinctrl-0 = <&uart4_tx_ph13 &uart4_rx_pi9>; |
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pinctrl-names = "default"; |
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current-speed = <115200>; |
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}; |
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&uart7 { |
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pinctrl-0 = <&uart7_tx_pf7 &uart7_rx_pa8 |
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&uart7_cts_pf9 &uart7_rts_pf8>; |
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pinctrl-names = "default"; |
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current-speed = <115200>; |
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status = "okay"; |
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hw-flow-control; |
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murata-1dx { |
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compatible = "infineon,cyw43xxx-bt-hci"; |
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bt-reg-on-gpios = <&gpioa 10 GPIO_ACTIVE_HIGH>; |
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bt-host-wake-gpios = <&gpiog 3 GPIO_ACTIVE_HIGH>; |
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bt-dev-wake-gpios = <&gpioh 7 GPIO_ACTIVE_HIGH>; |
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fw-download-speed = <115200>; |
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}; |
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}; |
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&i2c4 { |
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status = "okay"; |
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pinctrl-0 = <&i2c4_scl_pb6 &i2c4_sda_ph12>; |
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pinctrl-names = "default"; |
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clock-frequency = <I2C_BITRATE_STANDARD>; |
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}; |
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&i2c1 { |
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status = "disabled"; |
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pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>; |
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pinctrl-names = "default"; |
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clock-frequency = <I2C_BITRATE_FAST>; |
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}; |
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&i2c2 { |
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status = "disabled"; |
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pinctrl-0 = <&i2c2_scl_ph4 &i2c2_sda_pb11>; |
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pinctrl-names = "default"; |
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clock-frequency = <I2C_BITRATE_FAST>; |
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}; |
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&spi5 { |
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status = "okay"; |
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pinctrl-0 = <&spi5_nss_pk1 &spi5_sck_ph6 |
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&spi5_miso_pj11 &spi5_mosi_pj10>; |
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pinctrl-names = "default"; |
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}; |
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&fdcan2 { |
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status = "okay"; |
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pinctrl-0 = <&fdcan2_tx_pb13 &fdcan2_rx_pb5>; |
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pinctrl-names = "default"; |
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clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000100>, |
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<&rcc STM32_SRC_PLL1_Q FDCAN_SEL(1)>; |
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bus-speed = <125000>; |
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bus-speed-data = <1000000>; |
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}; |
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&flash0 { |
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partitions { |
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compatible = "fixed-partitions"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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boot_partition: partition@0 { |
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label = "bootloader"; |
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reg = <0x0 0x40000>; |
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read-only; |
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}; |
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slot0_partition: partition@40000 { |
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label = "image-0"; |
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reg = <0x40000 0x000c0000>; |
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}; |
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}; |
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}; |
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&quadspi { |
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pinctrl-0 = <&quadspi_clk_pf10 &quadspi_bk1_ncs_pg6 |
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&quadspi_bk1_io0_pd11 &quadspi_bk1_io1_pd12 |
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&quadspi_bk1_io2_pe2 &quadspi_bk1_io3_pf6>; |
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pinctrl-names = "default"; |
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status = "okay"; |
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n25q128a1: qspi-nor-flash@90000000 { |
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compatible = "st,stm32-qspi-nor"; |
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reg = <0x90000000 DT_SIZE_M(16)>; /* 128 Mbits */ |
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qspi-max-frequency = <72000000>; |
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status = "okay"; |
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partitions { |
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compatible = "fixed-partitions"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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slot1_partition: partition@0 { |
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label = "image-1"; |
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reg = <0x00000000 DT_SIZE_M(1)>; |
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}; |
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storage_partition: partition@100000 { |
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label = "storage"; |
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reg = <0x00100000 DT_SIZE_M(15)>; |
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}; |
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}; |
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}; |
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}; |
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&rng { |
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status = "okay"; |
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}; |
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&dac1 { |
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status = "okay"; |
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pinctrl-0 = <&dac1_out1_pa4 &dac1_out2_pa5>; |
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pinctrl-names = "default"; |
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}; |
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&fmc { |
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status = "okay"; |
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pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1 |
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&fmc_sdclk_pg8 &fmc_sdnwe_ph5 &fmc_sdcke0_ph2 |
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&fmc_sdne0_ph3 &fmc_sdnras_pf11 &fmc_sdncas_pg15 |
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&fmc_a0_pf0 &fmc_a1_pf1 &fmc_a2_pf2 &fmc_a3_pf3 &fmc_a4_pf4 |
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&fmc_a5_pf5 &fmc_a6_pf12 &fmc_a7_pf13 &fmc_a8_pf14 |
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&fmc_a9_pf15 &fmc_a10_pg0 &fmc_a11_pg1 &fmc_a12_pg2 |
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&fmc_a14_pg4 &fmc_a15_pg5 |
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&fmc_d0_pd14 &fmc_d1_pd15 &fmc_d2_pd0 &fmc_d3_pd1 |
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&fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9 &fmc_d7_pe10 |
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&fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13 &fmc_d11_pe14 |
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&fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9 &fmc_d15_pd10>; |
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pinctrl-names = "default"; |
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sdram { |
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status = "okay"; |
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power-up-delay = <100>; |
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num-auto-refresh = <8>; |
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mode-register = <0x220>; |
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refresh-rate = <603>; |
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bank@0 { |
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reg = <0>; |
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st,sdram-control = <STM32_FMC_SDRAM_NC_8 |
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STM32_FMC_SDRAM_NR_12 |
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STM32_FMC_SDRAM_MWID_16 |
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STM32_FMC_SDRAM_NB_4 |
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STM32_FMC_SDRAM_CAS_2 |
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STM32_FMC_SDRAM_SDCLK_PERIOD_2 |
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STM32_FMC_SDRAM_RBURST_ENABLE |
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STM32_FMC_SDRAM_RPIPE_0>; |
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st,sdram-timing = <2 6 4 6 2 2 2>; |
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}; |
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}; |
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}; |
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zephyr_udc0: &usbotg_fs { |
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status = "okay"; |
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pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>; |
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pinctrl-names = "default"; |
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};
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