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310 lines
6.2 KiB
310 lines
6.2 KiB
/* |
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* Copyright (c) 2023 STMicroelectronics |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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/dts-v1/; |
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#include <st/l4/stm32l4r9Xi.dtsi> |
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#include <st/l4/stm32l4r9a(g-i)ix-pinctrl.dtsi> |
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#include <zephyr/dt-bindings/input/input-event-codes.h> |
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#include "arduino_r3_connector.dtsi" |
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/ { |
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model = "STMicroelectronics STM32L4R9I-DISCO board"; |
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compatible = "st,stm32l4r9i-disco"; |
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chosen { |
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zephyr,console = &usart2; |
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zephyr,shell-uart = &usart2; |
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zephyr,sram = &sram0; |
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zephyr,flash = &flash0; |
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}; |
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leds { |
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compatible = "gpio-leds"; |
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orange_led: led_1 { |
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gpios = <&mfx 0 GPIO_ACTIVE_LOW>; |
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label = "User LD1"; |
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}; |
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green_led: led_2 { |
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gpios = <&gpioh 4 GPIO_ACTIVE_LOW>; |
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label = "User LD2"; |
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}; |
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}; |
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gpio_keys { |
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compatible = "gpio-keys"; |
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joy_sel: joystick_selection { |
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label = "joystick selection"; |
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gpios = <&gpioc 13 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; |
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zephyr,code = <INPUT_KEY_ENTER>; |
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}; |
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joy_up: joystick_up { |
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label = "joystick up"; |
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gpios = <&mfx 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; |
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zephyr,code = <INPUT_KEY_UP>; |
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}; |
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joy_down: joystick_down { |
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label = "joystick down"; |
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gpios = <&mfx 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; |
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zephyr,code = <INPUT_KEY_DOWN>; |
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}; |
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joy_right: joystick_right { |
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label = "joystick right"; |
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gpios = <&mfx 3 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; |
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zephyr,code = <INPUT_KEY_RIGHT>; |
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}; |
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joy_left: joystick_left { |
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label = "joystick left"; |
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gpios = <&mfx 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; |
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zephyr,code = <INPUT_KEY_LEFT>; |
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}; |
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}; |
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aliases { |
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led0 = &green_led; |
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led1 = &orange_led; |
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sw0 = &joy_sel; |
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sw1 = &joy_up; |
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sw2 = &joy_down; |
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sw3 = &joy_right; |
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sw4 = &joy_left; |
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die-temp0 = &die_temp; |
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volt-sensor0 = &vref; |
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volt-sensor1 = &vbat; |
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}; |
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}; |
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&clk_lse { |
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status = "okay"; |
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}; |
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&clk_lsi { |
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status = "okay"; |
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}; |
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&clk_hsi48 { |
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status = "okay"; |
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}; |
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&clk_hsi { |
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status = "okay"; |
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}; |
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&clk_msi { |
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status = "okay"; |
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msi-range = <6>; |
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msi-pll-mode; |
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}; |
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&pll { |
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status = "okay"; |
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div-m = <1>; |
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mul-n = <60>; |
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/* |
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* WORKAROUND: stm32l4-pll-clock does not allow arbitrary PLLP dividers. |
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* Disable PLLP completely since it only feeds SAI, which is not active either. |
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*/ |
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/* div-p = <5>; */ |
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div-q = <2>; |
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div-r = <2>; |
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clocks = <&clk_msi>; |
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}; |
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&rcc { |
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clocks = <&pll>; |
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ahb-prescaler = <1>; |
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clock-frequency = <DT_FREQ_M(120)>; |
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apb1-prescaler = <1>; |
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apb2-prescaler = <1>; |
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}; |
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&usart2 { |
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status = "okay"; |
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pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>; |
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pinctrl-names = "default"; |
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current-speed = <115200>; |
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}; |
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&lpuart1 { |
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status = "okay"; |
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pinctrl-0 = <&lpuart1_tx_pc1 &lpuart1_rx_pc0>; |
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pinctrl-names = "default"; |
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current-speed = <115200>; |
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}; |
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&timers3 { |
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status = "okay"; |
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pwm3: pwm { |
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status = "okay"; |
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/* |
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* N.B.: Datasheet indicates that ARD_D11 (wired to PB15) is connected to TIM3_CH2. |
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* However, this is incorrect as PB15 cannot be muxed to TIM3 (see DS12023). |
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* Moved ARD_D11 to TIM15_CH2 instead. |
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*/ |
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pinctrl-0 = <&tim3_ch1_pb4>; |
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pinctrl-names = "default"; |
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}; |
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}; |
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&timers5 { |
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status = "okay"; |
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pwm5: pwm { |
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status = "okay"; |
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pinctrl-0 = <&tim5_ch2_pa1 &tim5_ch4_pi0>; |
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pinctrl-names = "default"; |
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}; |
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}; |
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&timers8 { |
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status = "okay"; |
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pwm8: pwm { |
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status = "okay"; |
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pinctrl-0 = <&tim8_ch1n_ph13>; |
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pinctrl-names = "default"; |
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}; |
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}; |
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&timers15 { |
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status = "okay"; |
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pwm15: pwm { |
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status = "okay"; |
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pinctrl-0 = <&tim15_ch2_pf10 &tim15_ch2_pb15>; |
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pinctrl-names = "default"; |
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}; |
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}; |
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&i2c1 { |
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status = "okay"; |
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pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pg13>; |
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pinctrl-names = "default"; |
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clock-frequency = <I2C_BITRATE_STANDARD>; |
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mfx: gpio@42 { |
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compatible = "st,mfxstm32l152"; |
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reg = <0x42>; |
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ngpios = <24>; |
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int-gpios = <&gpioi 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; |
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gpio-controller; |
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#gpio-cells = <2>; |
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}; |
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}; |
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&i2c3 { |
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status = "okay"; |
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pinctrl-0 = <&i2c3_scl_pg7 &i2c3_sda_pg8>; |
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pinctrl-names = "default"; |
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clock-frequency = <I2C_BITRATE_STANDARD>; |
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}; |
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&spi2 { |
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status = "okay"; |
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pinctrl-0 = <&spi2_sck_pb13 &spi2_miso_pb14 &spi2_mosi_pb15>; |
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pinctrl-names = "default"; |
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cs-gpios = <&gpioi 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; |
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}; |
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&rtc { |
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, |
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<&rcc STM32_SRC_LSE RTC_SEL(1)>; |
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status = "okay"; |
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}; |
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&sdmmc1 { |
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status = "okay"; |
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pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9 |
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&sdmmc1_d2_pc10 &sdmmc1_d3_pc11 |
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&sdmmc1_ck_pc12 &sdmmc1_cmd_pd2>; |
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pinctrl-names = "default"; |
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disk-name = "SD"; |
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}; |
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&adc1 { |
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status = "okay"; |
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pinctrl-0 = <&adc1_in5_pa0 &adc1_in12_pa7 &adc1_in15_pb0 |
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&adc1_in4_pc3 &adc1_in13_pc4>; |
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pinctrl-names = "default"; |
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st,adc-clock-source = "SYNC"; |
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st,adc-prescaler = <1>; |
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}; |
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zephyr_udc0: &usbotg_fs { |
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status = "okay"; |
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pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12 |
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&usb_otg_fs_id_pa10>; |
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pinctrl-names = "default"; |
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}; |
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&die_temp { |
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status = "okay"; |
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}; |
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&vref { |
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status = "okay"; |
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}; |
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&vbat { |
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status = "okay"; |
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}; |
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&octospi2 { |
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status = "okay"; |
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pinctrl-0 = <&octospim_p2_clk_pi6 &octospim_p2_ncs_pg12 |
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&octospim_p2_io0_pi11 &octospim_p2_io1_pi10 |
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&octospim_p2_io2_pi9 &octospim_p2_io3_ph8 |
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&octospim_p2_io4_ph9 &octospim_p2_io5_ph10 |
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&octospim_p2_io6_pg9 &octospim_p2_io7_pg10 |
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&octospim_p2_dqs_pg15>; |
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pinctrl-names = "default"; |
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mx25lm51245: ospi-nor-flash@90000000 { |
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status = "okay"; |
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compatible = "st,stm32-ospi-nor"; |
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reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */ |
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ospi-max-frequency = <DT_FREQ_M(25)>; |
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spi-bus-width = <OSPI_OPI_MODE>; |
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data-rate = <OSPI_STR_TRANSFER>; |
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four-byte-opcodes; |
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sfdp-bfp = [ |
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53 46 44 50 06 01 02 ff |
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00 06 01 10 30 00 00 ff |
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c2 00 01 04 10 01 00 ff |
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84 00 01 02 c0 00 00 ff |
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00 00 00 00 00 00 00 00 |
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00 00 00 00 00 00 00 00 |
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e5 20 fb ff ff ff ff 1f |
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44 eb 08 6b 08 3b 04 bb |
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fe ff ff ff ff ff 00 ff |
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ff ff 44 eb 0c 20 0f 52 |
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10 d8 00 ff d6 49 c5 00 |
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81 df 04 e3 44 03 67 38 |
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30 b0 30 b0 f7 bd d5 5c |
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4a 9e 29 ff f0 50 f9 85 |
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00 00 00 00 00 00 00 00 |
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00 00 00 00 00 00 00 00 |
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00 00 00 00 00 00 00 00 |
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00 00 00 00 00 00 00 00 |
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00 00 00 00 00 00 00 00 |
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00 00 00 00 00 00 00 00 |
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00 00 00 00 00 00 00 00 |
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00 00 00 00 00 00 00 00 |
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00 00 00 00 00 00 00 00 |
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00 00 00 00 00 00 00 00 |
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7f ef ff ff 21 5c dc ff |
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]; |
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partitions { |
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compatible = "fixed-partitions"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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partition@0 { |
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reg = <0x00000000 DT_SIZE_M(64)>; |
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}; |
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}; |
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}; |
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};
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