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186 lines
4.0 KiB
186 lines
4.0 KiB
/* |
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* Copyright (c) 2018-2020 Nordic Semiconductor ASA |
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* Copyright (c) 2020 Circuit Dojo LLC |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#include "sparkfun_thing_plus_nrf9160_common-pinctrl.dtsi" |
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#include <zephyr/dt-bindings/input/input-event-codes.h> |
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/ { |
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model = "Sparkfun nRF9160 Thing Plus"; |
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compatible = "sparkfun,thing-plus-nrf9160"; |
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chosen { |
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zephyr,console = &uart0; |
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zephyr,shell-uart = &uart0; |
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zephyr,uart-mcumgr = &uart0; |
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}; |
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leds { |
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compatible = "gpio-leds"; |
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blue_led: led_0 { |
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gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; |
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label = "Blue LED (D7)"; |
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}; |
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}; |
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pwmleds { |
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compatible = "pwm-leds"; |
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pwm_led0: pwm_led_0 { |
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pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>; |
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}; |
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}; |
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buttons { |
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compatible = "gpio-keys"; |
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button0: button_0 { |
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gpios = <&gpio0 12 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; |
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label = "Switch 1"; |
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zephyr,code = <INPUT_KEY_0>; |
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}; |
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}; |
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/* TPS63031 Buck/Boost converter (provides 3.3V) */ |
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pwr-3v3 { |
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compatible = "regulator-fixed"; |
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regulator-name = "pwr-3v3"; |
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enable-gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>; |
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regulator-always-on; |
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}; |
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/* These aliases are provided for compatibility with samples */ |
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aliases { |
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led0 = &blue_led; |
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bootloader-led0 = &blue_led; |
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pwm-led0 = &pwm_led0; |
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sw0 = &button0; |
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mcuboot-button0 = &button0; |
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mcuboot-led0 = &blue_led; |
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watchdog0 = &wdt0; |
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accel0 = &lis2dh; |
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}; |
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/* Used for accessing other pins */ |
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feather_header: feather_connector { |
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compatible = "adafruit-feather-header"; |
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#gpio-cells = <2>; |
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gpio-map-mask = <0xffffffff 0xffffffc0>; |
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gpio-map-pass-thru = <0 0x3f>; |
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gpio-map = <12 0 &gpio0 26 0>, /* SDA */ |
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<13 0 &gpio0 27 0>, /* SCL */ |
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<14 0 &gpio0 29 0>, /* PWM3 */ |
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<15 0 &gpio0 30 0>, /* PWM3 */ |
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<16 0 &gpio0 0 0>, /* PWM1 */ |
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<17 0 &gpio0 1 0>, /* PWM1 */ |
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<18 0 &gpio0 2 0>, /* PWM1 */ |
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<19 0 &gpio0 3 0>, /* PWM0 */ |
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<20 0 &gpio0 4 0>, /* PWM1 */ |
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/* 11 not connected */ |
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<10 0 &gpio0 24 0>, /* TX */ |
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<9 0 &gpio0 23 0>, /* RX */ |
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<8 0 &gpio0 22 0>, /* MISO */ |
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<7 0 &gpio0 21 0>, /* MOSI */ |
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<6 0 &gpio0 19 0>, /* SCK */ |
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<5 0 &gpio0 18 0>, /* SS */ |
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<4 0 &gpio0 17 0>, /* ADC4 = AIN6 */ |
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<3 0 &gpio0 16 0>, /* ADC3 = AIN5 */ |
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<2 0 &gpio0 15 0>, /* ADC2 = AIN4 */ |
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<1 0 &gpio0 14 0>, /* ADC1 = AIN2 */ |
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<0 0 &gpio0 13 0>; /* ADC0 = AIN1 */ |
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}; |
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}; |
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&adc { |
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status = "okay"; |
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}; |
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&gpiote { |
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status = "okay"; |
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}; |
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&gpio0 { |
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status = "okay"; |
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}; |
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&uart0 { |
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status = "okay"; |
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current-speed = <115200>; |
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pinctrl-0 = <&uart0_default>; |
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pinctrl-1 = <&uart0_sleep>; |
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pinctrl-names = "default", "sleep"; |
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}; |
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&uart1 { |
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current-speed = <115200>; |
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pinctrl-0 = <&uart1_default>; |
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pinctrl-1 = <&uart1_sleep>; |
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pinctrl-names = "default", "sleep"; |
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}; |
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&uart2 { |
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pinctrl-0 = <&uart2_default>; |
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pinctrl-1 = <&uart2_sleep>; |
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pinctrl-names = "default", "sleep"; |
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}; |
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&i2c1 { |
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compatible = "nordic,nrf-twim"; |
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status = "okay"; |
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pinctrl-0 = <&i2c1_default>; |
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pinctrl-1 = <&i2c1_sleep>; |
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pinctrl-names = "default", "sleep"; |
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pcf85063a@51 { |
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compatible = "nxp,pcf85063a"; |
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reg = <0x51>; |
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}; |
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lis2dh: lis2dh@18 { |
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compatible = "st,lis2dh"; |
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reg = <0x18>; |
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irq-gpios = <&gpio0 29 0>; |
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}; |
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}; |
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&pwm0 { |
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status = "okay"; |
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pinctrl-0 = <&pwm0_default>; |
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pinctrl-1 = <&pwm0_sleep>; |
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pinctrl-names = "default", "sleep"; |
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}; |
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&spi3 { |
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compatible = "nordic,nrf-spim"; |
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status = "okay"; |
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cs-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; |
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pinctrl-0 = <&spi3_default>; |
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pinctrl-1 = <&spi3_sleep>; |
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pinctrl-names = "default", "sleep"; |
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w25q32jv: w25q32jv@0 { |
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compatible = "jedec,spi-nor"; |
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reg = <0>; |
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spi-max-frequency = <40000000>; |
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wp-gpios = <&gpio0 8 GPIO_ACTIVE_LOW>; |
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hold-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; |
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size = <0x2000000>; |
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has-dpd; |
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t-enter-dpd = <3000>; |
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t-exit-dpd = <30000>; |
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jedec-id = [ ef 40 16 ]; |
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}; |
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}; |
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/ { |
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vbatt { |
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compatible = "voltage-divider"; |
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io-channels = <&adc 7>; |
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output-ohms = <100000>; |
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full-ohms = <(100000 + 100000)>; |
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power-gpios = <&gpio0 25 0>; |
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}; |
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}; |
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/* Include default memory partition configuration file */ |
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#include <nordic/nrf91xx_partition.dtsi>
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