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356 lines
12 KiB
356 lines
12 KiB
.. zephyr:board:: stm32n6570_dk |
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Overview |
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The STM32N6570_DK Discovery kit is a complete demonstration and development platform |
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for the Arm® Cortex®‑M55 core‑based STM32N657X0H3Q microcontroller. |
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The STM32N6570_DK Discovery kit includes a full range of hardware features that help |
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the user evaluate many peripherals, such as USB Type-C®, Octo‑SPI flash memory and |
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Hexadeca‑SPI PSRAM devices, Ethernet, camera module, LCD, microSD™, audio codec, |
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digital microphones, ADC, flexible extension connectors, and user button. |
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The four flexible extension connectors feature easy and unlimited expansion capabilities |
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for specific applications such as wireless connectivity, analog applications, and sensors. |
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The STM32N657X0H3Q microcontroller features one USB 2.0 high‑speed/full‑speed |
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Device/Host/OTG controller, one USB 2.0 high‑speed/full‑speed Device/Host/OTG controller |
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with UCPD (USB Type-C® Power Delivery), one Ethernet with TSN (time-sensitive networking), |
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four I2Cs, two I3Cs, six SPIs (of which four I2S‑capable), two SAIs, with four DMIC support, |
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five USARTs, five UARTs (ISO78916 interface, LIN, IrDA, up to 12.5 Mbit/s), one LPUART, |
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two SDMMCs (MMC version 4.0, CE-ATA version 1.0, and SD version 1.0.1), three CAN FD |
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with TTCAN capability, JTAG and SWD debugging support, and Embedded Trace Macrocell™ (ETM). |
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The STM32N6570_DK Discovery kit integrates an STLINK-V3EC embedded in-circuit debugger and |
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programmer for the STM32 MCU, with a USB Virtual COM port bridge and the comprehensive MCU Package. |
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Hardware |
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******** |
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- STM32N657X0H3Q Arm® Cortex®‑M55‑based microcontroller featuring ST Neural-ART Accelerator, |
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H264 encoder, NeoChrom 2.5D GPU, and 4.2 Mbytes of contiguous SRAM, in a VFBGA264 package |
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- 5" LCD module with capacitive touch panel |
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- USB Type-C® with USB 2.0 HS interface, dual‑role‑power (DRP) |
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- USB Type-A with USB 2.0 HS interface, host, 0.5 A max |
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- 1‑Gbit Ethernet with TSN (time-sensitive networking) compliant with IEEE‑802.3‑2002 |
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- SAI audio codec |
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- One MEMS digital microphone |
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- 1‑Gbit Octo‑SPI flash memory |
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- 256-Mbit Hexadeca‑SPI PSRAM |
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- Two user LEDs |
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- User, tamper, and reset push-buttons |
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- Board connectors: |
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- USB Type-C® |
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- USB Type-A |
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- Ethernet RJ45 |
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- Camera module |
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- microSD™ card |
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- LCD |
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- Stereo headset jack including analog microphone input |
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- Audio MEMS daughterboard expansion connector |
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- ARDUINO® Uno R3 expansion connector |
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- STMod+ expansion connector |
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- On-board STLINK-V3EC debugger/programmer with USB re-enumeration capability: |
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Virtual COM port, and debug port |
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For more details, please refer to: |
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* `STM32N6570_DK website`_ |
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* `STM32N657X0 on www.st.com`_ |
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* `STM32N657 reference manual`_ |
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Supported Features |
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================== |
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.. zephyr:board-supported-hw:: |
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USB |
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=== |
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The USB pin assignments on the STM32N657XX microcontroller are immutable. This means that the specific |
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pins designated for USB functionality are fixed and cannot be changed or reassigned to other functions, |
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ensuring consistent and reliable USB communication. |
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USB PIN (IOs) |
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============= |
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+------------------+--------------------------------------+ |
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| Name | Description | |
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+==================+======================================+ |
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| OTG1_HSDM | USB OTG1 High-Speed Data- (negative) | |
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+------------------+--------------------------------------+ |
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| OTG1_HSDP | USB OTG1 High-Speed Data+ (positive) | |
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+------------------+--------------------------------------+ |
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| OTG1_ID | USB OTG1 ID Pin | |
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+------------------+--------------------------------------+ |
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| OTG1_TXRTUNE | USB OTG1 Transmit Retune | |
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+------------------+--------------------------------------+ |
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| OTG2_HSDM | USB OTG2 High-Speed Data- (negative) | |
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+------------------+--------------------------------------+ |
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| OTG2_HSDP | USB OTG2 High-Speed Data+ (positive) | |
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+------------------+--------------------------------------+ |
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| OTG2_ID | USB OTG2 ID Pin | |
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+------------------+--------------------------------------+ |
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| OTG2_TXRTUNE | USB OTG2 Transmit Retune | |
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+------------------+--------------------------------------+ |
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Connections and IOs |
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=================== |
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STM32N6570_DK Board has 12 GPIO controllers. These controllers are responsible |
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for pin muxing, input/output, pull-up, etc. |
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For more details please refer to `STM32N6570_DK User Manual`_. |
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Default Zephyr Peripheral Mapping: |
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---------------------------------- |
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- ADC1_INP10 : PA9 |
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- ADC1_INP11 : PA10 |
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- FDCAN1_TX : PH2 |
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- FDCAN1_RX : PD0 |
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- I2C1_SCL : PH9 |
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- I2C1_SDA : PC1 |
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- I2C4_SCL : PE13 |
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- I2C4_SDA : PE14 |
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- LD1 : PO1 |
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- LD2 : PG10 |
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- SDMMC2_CK : PC2 |
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- SDMMC2_CMD : PC3 |
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- SDMMC2_D0 : PC4 |
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- SDMMC2_D1 : PC5 |
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- SDMMC2_D2 : PC0 |
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- SDMMC2_D3 : PE4 |
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- SPI5_SCK : PE15 |
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- SPI5_MOSI : PG2 |
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- SPI5_MISO : PH8 |
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- SPI5_NSS : PA3 |
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- USART_1_TX : PE5 |
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- USART_1_RX : PE6 |
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- USART_2_TX : PD5 |
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- USART_2_RX : PF6 |
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- XSPI1_NCS1 : PO0 |
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- XSPI1_DQS0 : PO2 |
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- XSPI1_DQS1 : PO3 |
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- XSPI1_CLK : PO4 |
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- XSPI1_IO0 : PP0 |
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- XSPI1_IO1 : PP1 |
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- XSPI1_IO2 : PP2 |
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- XSPI1_IO3 : PP3 |
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- XSPI1_IO4 : PP4 |
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- XSPI1_IO5 : PP5 |
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- XSPI1_IO6 : PP6 |
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- XSPI1_IO7 : PP7 |
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- XSPI1_IO8 : PP8 |
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- XSPI1_IO9 : PP9 |
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- XSPI1_IO10 : PP10 |
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- XSPI1_IO11 : PP11 |
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- XSPI1_IO12 : PP12 |
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- XSPI1_IO13 : PP13 |
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- XSPI1_IO14 : PP14 |
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- XSPI1_IO15 : PP15 |
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- XSPI2_NCS1 : PN1 |
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- XSPI2_DQS0 : PN0 |
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- XSPI2_CLK : PN6 |
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- XSPI2_IO0 : PN2 |
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- XSPI2_IO1 : PN3 |
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- XSPI2_IO2 : PN4 |
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- XSPI2_IO3 : PN5 |
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- XSPI2_IO4 : PN8 |
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- XSPI2_IO5 : PN9 |
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- XSPI2_IO6 : PN10 |
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- XSPI2_IO7 : PN11 |
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System Clock |
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------------ |
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STM32N6570_DK System Clock could be driven by internal or external oscillator, |
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as well as main PLL clock. By default System clock is driven by PLL clock at |
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400MHz, driven by 64MHz high speed internal oscillator. |
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Serial Port |
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----------- |
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STM32N6570_DK board has 10 U(S)ARTs. The Zephyr console output is assigned to |
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USART1. Default settings are 115200 8N1. |
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Board variants |
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************** |
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Three variants are available with STM32N6570_DK: |
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- Default variant. Available as a chainloaded application which should be loaded by a |
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bootloader, it has access to the whole AXISRAM1 and AXISRAM2 regions. It is expected to |
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be built using ``--sysbuild`` option exclusively. |
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- ``fsbl``: First Stage Boot Loader (FSBL) which is available as an application loaded by the |
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Boot ROM and flashed using ST-Link. This is typically a bootloader image. It runs |
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in RAM LOAD mode on second half of AXISRAM2. 511K are available for the whole image. |
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- ``sb``: First Stage Boot Loader - Serial Boot. Equivalent to the FSBL image, but could be |
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loaded using USB and doesn't require switching the bootpins. This is the most practical |
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for developments steps. |
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Programming and Debugging |
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************************* |
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.. zephyr:board-supported-runners:: |
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STM32N6570_DK board includes an ST-LINK/V3 embedded debug tool interface. |
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This probe allows to flash and debug the board using various tools. |
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Flashing or loading |
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=================== |
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The board is configured to be programmed using west `STM32CubeProgrammer`_ runner, |
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so its :ref:`installation <stm32cubeprog-flash-host-tools>` is needed. |
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Version 2.18.0 or later of `STM32CubeProgrammer`_ is required. |
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.. note:: |
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Firmware is run in secure mode of execution, which requires a signature. |
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After build, the build system will automatically generate a signed version of the |
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binary using `STM32CubeProgrammer`_ utility ``STM32_SigningTool_CLI``. |
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This utility is installed along with `STM32CubeProgrammer`_, but make sure it is |
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available in your ``PATH`` variable. |
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To program the board, there are two options: |
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- Program the firmware in external flash. At boot, it will then be loaded on RAM |
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and executed from there. |
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- Optionally, it can also be taken advantage from the serial boot interface provided |
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by the boot ROM. In that case, firmware is directly loaded in RAM and executed from |
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there. It is not retained. |
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Programming an application to STM32N6570_DK |
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------------------------------------------- |
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Here is an example to build and run :zephyr:code-sample:`hello_world` application. |
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First, connect the STM32N6570_DK to your host computer using the ST-Link USB port. |
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.. tabs:: |
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.. group-tab:: Application image |
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Build and flash an application loaded by MCUBoot. |
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.. zephyr-app-commands:: |
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:zephyr-app: samples/hello_world |
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:board: stm32n6570_dk |
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:west-args: --sysbuild |
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:goals: build flash |
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By default, application runs in XIP mode. Add ``-DSB_CONFIG_MCUBOOT_MODE_RAM_LOAD=y`` |
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to use RAMLOAD mode. |
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.. group-tab:: FSBL - ST-Link |
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Build and flash an application using ``stm32n6570_dk/stm32n657xx/fsbl`` target. |
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.. zephyr-app-commands:: |
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:zephyr-app: samples/hello_world |
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:board: stm32n6570_dk//fsbl |
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:goals: build flash |
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.. note:: |
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For flashing, before powering the board, set the boot pins in the following configuration: |
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* BOOT0: 0 |
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* BOOT1: 1 |
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After flashing, to run the application, set the boot pins in the following configuration: |
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* BOOT1: 0 |
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Power off and on the board again. |
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.. group-tab:: FSBL - Serial Boot Loader (USB) |
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Additionally, connect the STM32N6570_DK to your host computer using the USB port. |
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In this configuration, ST-Link is used to power the board and for serial communication |
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over the Virtual COM Port. |
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.. note:: |
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Before powering the board, set the boot pins in the following configuration: |
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* BOOT0: 1 |
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* BOOT1: 0 |
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Build and load an application using ``stm32n6570_dk/stm32n657xx/sb`` target (you |
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can also use the shortened form: ``stm32n6570_dk//sb``) |
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.. zephyr-app-commands:: |
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:zephyr-app: samples/hello_world |
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:board: stm32n6570_dk//sb |
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:goals: build flash |
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Run a serial host program to connect with your Disco board: |
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.. code-block:: console |
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$ minicom -D /dev/ttyACM0 |
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You should see the following message on the console: |
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.. code-block:: console |
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Hello World! stm32n6570_dk/stm32n657xx |
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Debugging |
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========= |
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You can debug an application in the usual way using the :ref:`ST-LINK GDB Server <runner_stlink_gdbserver>`. |
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Here is an example for the :zephyr:code-sample:`hello_world` application. |
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.. zephyr-app-commands:: |
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:zephyr-app: samples/hello_world |
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:board: stm32n6570_dk |
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:maybe-skip-config: |
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:goals: debug |
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.. note:: |
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To enable debugging, before powering on the board, set the boot pins in the following configuration: |
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* BOOT0: 0 |
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* BOOT1: 1 |
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Another solution for debugging is to use STM32CubeIDE: |
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* Go to :menuselection:`File --> Import` and select :menuselection:`C/C++ --> STM32 Cortex-M Executable`. |
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* In the :guilabel:`Executable` field, browse to your ``<ZEPHYR_PATH>/build/zephyr/zephyr.elf``. |
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* In :guilabel:`MCU` field, select ``STM32N657X0HxQ``. |
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* Click on :guilabel:`Finish`. |
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* Finally, click on :guilabel:`Debug` to start the debugging session. |
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Running tests with twister |
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========================== |
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Due to the BOOT switches manipulation required when flashing the board using ``stm32n6570_dk`` |
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board target, it is only possible to run twister tests campaign on ``stm32n6570_dk/stm32n657xx/sb`` |
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board target which doesn't require BOOT pins changes to load and execute binaries. |
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To do so, it is advised to use Twister's hardware map feature with the following settings: |
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.. code-block:: yaml |
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- platform: stm32n6570_dk/stm32n657xx/sb |
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product: BOOT-SERIAL |
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pre_script: <path_to_zephyr>/boards/st/common/scripts/board_power_reset.sh |
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runner: stm32cubeprogrammer |
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.. _STM32N6570_DK website: |
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https://www.st.com/en/evaluation-tools/stm32n6570-dk.html |
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.. _STM32N6570_DK User Manual: |
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https://www.st.com/resource/en/user_manual/um3300-discovery-kit-with-stm32n657x0-mcu-stmicroelectronics.pdf |
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.. _STM32N657X0 on www.st.com: |
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https://www.st.com/en/microcontrollers-microprocessors/stm32n657x0.html |
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.. _STM32N657 reference manual: |
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https://www.st.com/resource/en/reference_manual/rm0486-stm32n647657xx-armbased-32bit-mcus-stmicroelectronics.pdf |
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.. _STM32CubeProgrammer: |
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https://www.st.com/en/development-tools/stm32cubeprog.html
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