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281 lines
8.8 KiB
281 lines
8.8 KiB
.. _mps2_an385_board: |
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ARM V2M MPS2 |
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############ |
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Overview |
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******** |
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The mps2/an385 board configuration is used by Zephyr applications that run on |
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the V2M MPS2 board. It provides support for the ARM Cortex-M3 (AN385) CPU and |
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the following devices: |
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- Nested Vectored Interrupt Controller (NVIC) |
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- System Tick System Clock (SYSTICK) |
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- Cortex-M System Design Kit UART |
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.. image:: img/mps2_an385.jpg |
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:align: center |
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:alt: ARM V2M MPS2 |
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In addition to enabling actual hardware usage, this board configuration can |
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also use QEMU to emulate the AN385 platform running on the MPS2+. |
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More information about the board can be found at the `V2M MPS2 Website`_. |
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The Application Note AN385 can be found at `Application Note AN385`_. |
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.. note:: |
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This board configuration makes no claims about its suitability for use |
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with actual MPS2 hardware systems using AN385, or any other hardware |
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system. It has been tested on actual hardware, but its primary purpose is |
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for use with QEMU and unit tests. |
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Hardware |
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ARM V2M MPS2 provides the following hardware components: |
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- ARM Cortex-M3 (AN385) |
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- ARM IoT Subsystem for Cortex-M |
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- Form factor: 140x120cm |
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- ZBTSRAM: 8MB single cycle SRAM, 16MB PSRAM |
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- Video: QSVGA touch screen panel, 4bit RGB VGA connector |
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- Audio: Audio Codec |
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- Debug: |
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- ARM JTAG20 connector |
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- ARM parallel trace connector (MICTOR38) |
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- 20 pin Cortex debug connector |
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- 10 pin Cortex debug connector |
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- ILA connector for FPGA debug |
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- Expansion |
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- GPIO |
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- SPI |
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.. note:: |
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4 MB of flash memory (in ZBTSRAM 1, starting at address 0x00400000) and 4 MB of RAM |
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(in ZBTSRAM 2 & 3, starting at address 0x20000000) are available. |
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Supported Features |
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================== |
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The mps2/an385 board configuration supports the following hardware features: |
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+-----------+------------+-------------------------------------+ |
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| Interface | Controller | Driver/Component | |
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+===========+============+=====================================+ |
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| NVIC | on-chip | nested vector interrupt controller | |
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+-----------+------------+-------------------------------------+ |
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| SYSTICK | on-chip | systick | |
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+-----------+------------+-------------------------------------+ |
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| UART | on-chip | serial port-polling; | |
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| | | serial port-interrupt | |
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+-----------+------------+-------------------------------------+ |
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| GPIO | on-chip | gpio | |
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+-----------+------------+-------------------------------------+ |
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| WATCHDOG | on-chip | watchdog | |
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+-----------+------------+-------------------------------------+ |
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| TIMER | on-chip | counter | |
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+-----------+------------+-------------------------------------+ |
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| DUALTIMER | on-chip | counter | |
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+-----------+------------+-------------------------------------+ |
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Other hardware features are not currently supported by the port. |
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See the `V2M MPS2 Website`_ for a complete list of V2M MPS2 board hardware |
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features. |
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The default configuration can be found in |
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:zephyr_file:`boards/arm/mps2/mps2_an385_defconfig` |
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Interrupt Controller |
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==================== |
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MPS2 is a Cortex-M3 based SoC and has 15 fixed exceptions and 45 IRQs. |
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A Cortex-M3/4-based board uses vectored exceptions. This means each exception |
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calls a handler directly from the vector table. |
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Handlers are provided for exceptions 1-6, 11-12, and 14-15. The table here |
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identifies the handlers used for each exception. |
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+------+------------+----------------+--------------------------+ |
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| Exc# | Name | Remarks | Used by Zephyr Kernel | |
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+======+============+================+==========================+ |
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| 1 | Reset | | system initialization | |
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+------+------------+----------------+--------------------------+ |
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| 2 | NMI | | system fatal error | |
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+------+------------+----------------+--------------------------+ |
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| 3 | Hard fault | | system fatal error | |
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+------+------------+----------------+--------------------------+ |
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| 4 | MemManage | MPU fault | system fatal error | |
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+------+------------+----------------+--------------------------+ |
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| 5 | Bus | | system fatal error | |
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+------+------------+----------------+--------------------------+ |
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| 6 | Usage | undefined | system fatal error | |
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| | fault | instruction, | | |
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| | | or switch | | |
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| | | attempt to ARM | | |
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| | | mode | | |
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+------+------------+----------------+--------------------------+ |
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| 11 | SVC | | system calls, kernel | |
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| | | | run-time exceptions, | |
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| | | | and IRQ offloading | |
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+------+------------+----------------+--------------------------+ |
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| 12 | Debug | | system fatal error | |
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| | monitor | | | |
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+------+------------+----------------+--------------------------+ |
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| 14 | PendSV | | context switch | |
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+------+------------+----------------+--------------------------+ |
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| 15 | SYSTICK | | system clock | |
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+------+------------+----------------+--------------------------+ |
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Pin Mapping |
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=========== |
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The ARM V2M MPS2 Board has 4 GPIO controllers. These controllers are responsible |
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for pin muxing, input/output, pull-up, etc. |
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All GPIO controller pins are exposed via the following sequence of pin numbers: |
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- Pins 0 - 15 are for GPIO 0 |
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- Pins 16 - 31 are for GPIO 1 |
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- Pins 32 - 47 are for GPIO 2 |
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- Pins 48 - 51 are for GPIO 3 |
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Mapping from the ARM MPS2 Board pins to GPIO controllers: |
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.. rst-class:: rst-columns |
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- D0 : EXT_0 |
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- D1 : EXT_4 |
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- D2 : EXT_2 |
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- D3 : EXT_3 |
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- D4 : EXT_1 |
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- D5 : EXT_6 |
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- D6 : EXT_7 |
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- D7 : EXT_8 |
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- D8 : EXT_9 |
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- D9 : EXT_10 |
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- D10 : EXT_12 |
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- D11 : EXT_13 |
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- D12 : EXT_14 |
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- D13 : EXT_11 |
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- D14 : EXT_15 |
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- D15 : EXT_5 |
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- D16 : EXT_16 |
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- D17 : EXT_17 |
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- D18 : EXT_18 |
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- D19 : EXT_19 |
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- D20 : EXT_20 |
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- D21 : EXT_21 |
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- D22 : EXT_22 |
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- D23 : EXT_23 |
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- D24 : EXT_24 |
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- D25 : EXT_25 |
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- D26 : EXT_26 |
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- D27 : EXT_30 |
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- D28 : EXT_28 |
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- D29 : EXT_29 |
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- D30 : EXT_27 |
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- D31 : EXT_32 |
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- D32 : EXT_33 |
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- D33 : EXT_34 |
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- D34 : EXT_35 |
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- D35 : EXT_36 |
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- D36 : EXT_38 |
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- D37 : EXT_39 |
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- D38 : EXT_40 |
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- D39 : EXT_44 |
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- D40 : EXT_41 |
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- D41 : EXT_31 |
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- D42 : EXT_37 |
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- D43 : EXT_42 |
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- D44 : EXT_43 |
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- D45 : EXT_45 |
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- D46 : EXT_46 |
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- D47 : EXT_47 |
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- D48 : EXT_48 |
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- D49 : EXT_49 |
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- D50 : EXT_50 |
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- D51 : EXT_51 |
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Peripheral Mapping: |
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.. rst-class:: rst-columns |
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- UART_3_RX : D0 |
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- UART_3_TX : D1 |
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- SPI_3_CS : D10 |
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- SPI_3_MOSI : D11 |
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- SPI_3_MISO : D12 |
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- SPI_3_SCLK : D13 |
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- I2C_3_SDA : D14 |
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- I2C_3_SCL : D15 |
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- UART_4_RX : D26 |
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- UART_4_TX : D30 |
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- SPI_4_CS : D36 |
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- SPI_4_MOSI : D37 |
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- SPI_4_MISO : D38 |
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- SPI_4_SCK : D39 |
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- I2C_4_SDA : D40 |
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- I2C_4_SCL : D41 |
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For more details please refer to `MPS2 Technical Reference Manual (TRM)`_. |
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System Clock |
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============ |
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The V2M MPS2 main clock is 24 MHz. |
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Serial Port |
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=========== |
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The V2M MPS2 processor has five UARTs. Both the UARTs have only two wires for |
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RX/TX and no flow control (CTS/RTS) or FIFO. The Zephyr console output, by |
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default, is utilizing UART0. |
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Programming and Debugging |
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************************* |
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Flashing |
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======== |
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V2M MPS2 provides: |
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- A USB connection to the host computer, which exposes a Mass Storage and an |
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USB Serial Port. |
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- A Serial Flash device, which implements the USB flash disk file storage. |
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- A physical UART connection which is relayed over interface USB Serial port. |
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Flashing an application to V2M MPS2 |
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----------------------------------- |
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Here is an example for the :ref:`hello_world` application. |
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.. zephyr-app-commands:: |
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:zephyr-app: samples/hello_world |
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:board: mps2/an385 |
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:goals: build |
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Connect the V2M MPS2 to your host computer using the USB port and you should |
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see a USB connection which exposes a Mass Storage and a USB Serial Port. |
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Copy the generated zephyr.bin in the exposed drive. |
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Reset the board and you should be able to see on the corresponding Serial Port |
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the following message: |
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.. code-block:: console |
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Hello World! arm |
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.. _V2M MPS2 Website: |
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https://developer.mbed.org/platforms/ARM-MPS2/ |
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.. _MPS2 Technical Reference Manual (TRM): |
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http://infocenter.arm.com/help/topic/com.arm.doc.100112_0200_05_en/versatile_express_cortex_m_prototyping_systems_v2m_mps2_and_v2m_mps2plus_technical_reference_100112_0200_05_en.pdf |
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.. _Application Note AN385: |
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http://infocenter.arm.com/help/topic/com.arm.doc.dai0385c/DAI0385C_cortex_m3_on_v2m_mps2.pdf
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