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40 lines
1005 B
40 lines
1005 B
/* |
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* Copyright (c) 2013-2014 Wind River Systems, Inc. |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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/** |
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* @file |
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* @brief Linker command/script file |
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* |
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* Linker script for the Cortex-M platforms. |
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*/ |
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#include <zephyr/linker/sections.h> |
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#include <zephyr/devicetree.h> |
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#include <zephyr/linker/linker-defs.h> |
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#include <zephyr/linker/linker-tool.h> |
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/** enable CONFIG_SRAM2 or any other partition in soc Kconfig, |
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* this is just an example to show relocation of code/data/bss script |
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*/ |
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#if defined CONFIG_ARM |
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#define CONFIG_SRAM2 1 |
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#define _SRAM2_DATA_SECTION_NAME .sram2_data |
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#define _SRAM2_BSS_SECTION_NAME .sram2_bss |
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#define _SRAM2_TEXT_SECTION_NAME .sram2_text |
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#define SRAM2_ADDR (CONFIG_SRAM_BASE_ADDRESS + RAM_SIZE2) |
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#endif |
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#define RAM_SIZE2 (CONFIG_SRAM_SIZE * 512) |
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MEMORY |
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{ |
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#ifdef CONFIG_SRAM2 |
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SRAM2 (wx) : ORIGIN = (CONFIG_SRAM_BASE_ADDRESS + RAM_SIZE2), LENGTH = RAM_SIZE2 |
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#endif |
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} |
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/* Include the SoC-specific linker file */ |
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#include <linker.ld>
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