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40 lines
967 B
40 lines
967 B
/* |
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* Copyright 2022-2023, 2025 NXP |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#ifndef ZEPHYR_DRIVERS_SERIAL_UART_S32_LINFLEXD_H_ |
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#define ZEPHYR_DRIVERS_SERIAL_UART_S32_LINFLEXD_H_ |
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struct uart_nxp_s32_config { |
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uint32_t instance; |
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LINFLEXD_Type *base; |
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const struct pinctrl_dev_config *pincfg; |
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Linflexd_Uart_Ip_UserConfigType hw_cfg; |
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const struct device *clock_dev; |
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clock_control_subsys_t clock_subsys; |
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}; |
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN |
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struct uart_nxp_s32_int { |
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bool tx_fifo_busy; |
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bool rx_fifo_busy; |
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bool irq_tx_enable; |
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bool irq_rx_enable; |
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uint8_t rx_fifo_data; |
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}; |
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#endif |
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN |
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struct uart_nxp_s32_data { |
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struct uart_nxp_s32_int int_data; |
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uart_irq_callback_user_data_t callback; |
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void *cb_data; |
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}; |
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ |
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extern Linflexd_Uart_Ip_StateStructureType |
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Linflexd_Uart_Ip_apStateStructure[LINFLEXD_UART_IP_NUMBER_OF_INSTANCES]; |
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#endif /* ZEPHYR_DRIVERS_SERIAL_UART_S32_LINFLEXD_H_ */
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