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24 lines
940 B
24 lines
940 B
# Copyright (c) 2023 Intel Corporation |
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# SPDX-License-Identifier: Apache-2.0 |
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config UART_ALTERA |
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bool "ALTERA UART driver" |
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depends on DT_HAS_ALTR_UART_ENABLED |
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select SERIAL_HAS_DRIVER |
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select SERIAL_SUPPORT_INTERRUPT |
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help |
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Enable the Altera UART driver, that can be built into Intel NiosV CPU designs. |
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config UART_ALTERA_EOP |
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bool "ALTERA UART end of packet feature" |
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depends on UART_ALTERA && UART_DRV_CMD && UART_INTERRUPT_DRIVEN |
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help |
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Use driver command CMD_ENABLE_EOP and CMD_DISABLE_EOP to use the feature. |
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config UART_ALTERA_LINE_CTRL_WORKAROUND |
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bool "ALTERA UART flow control workaround" |
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depends on UART_ALTERA && UART_LINE_CTRL |
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help |
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Before enabling this, please try to optimise the ISR to fetch the receive data faster. |
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Enabling this will cause the transmitter to wait for rising edge of CTS before sending. |
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The receiver will deassert RTS as soon as a byte is received and reassert after the byte is fetched.
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