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270 lines
8.5 KiB
270 lines
8.5 KiB
/* |
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* Copyright (c) 2024 Felipe Neves. |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#define DT_DRV_COMPAT espressif_mbox_esp32 |
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#include "soc/dport_reg.h" |
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#include "soc/gpio_periph.h" |
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#include <stdint.h> |
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#include <string.h> |
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#include <zephyr/kernel.h> |
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#include <zephyr/device.h> |
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#include <zephyr/drivers/mbox.h> |
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#include <zephyr/drivers/interrupt_controller/intc_esp32.h> |
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#include <soc.h> |
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#include <zephyr/sys/atomic.h> |
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#include <zephyr/logging/log.h> |
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LOG_MODULE_REGISTER(mbox_esp32, CONFIG_MBOX_LOG_LEVEL); |
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#define ESP32_MBOX_LOCK_FREE_VAL 0xB33FFFFF |
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#define ESP32_MBOX_NOOP_VAL 0xFF |
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__packed struct esp32_mbox_control { |
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uint16_t dest_cpu_msg_id[2]; |
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atomic_t lock; |
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}; |
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struct esp32_mbox_memory { |
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volatile uint8_t *pro_cpu_shm; |
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volatile uint8_t *app_cpu_shm; |
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}; |
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struct esp32_mbox_config { |
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int irq_source_pro_cpu; |
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int irq_priority_pro_cpu; |
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int irq_flags_pro_cpu; |
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int irq_source_app_cpu; |
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int irq_priority_app_cpu; |
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int irq_flags_app_cpu; |
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}; |
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struct esp32_mbox_data { |
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mbox_callback_t cb; |
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void *user_data; |
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uint32_t this_core_id; |
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uint32_t other_core_id; |
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uint32_t shm_size; |
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struct esp32_mbox_memory shm; |
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struct esp32_mbox_control *control; |
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}; |
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IRAM_ATTR static void esp32_mbox_isr(const struct device *dev) |
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{ |
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struct esp32_mbox_data *dev_data = (struct esp32_mbox_data *)dev->data; |
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struct mbox_msg msg; |
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uint32_t core_id = dev_data->this_core_id; |
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/* clear interrupt flag */ |
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if (core_id == 0) { |
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#if defined(CONFIG_SOC_SERIES_ESP32) |
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DPORT_WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_0_REG, 0); |
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#elif defined(CONFIG_SOC_SERIES_ESP32S3) |
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WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_0_REG, 0); |
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#endif |
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} else { |
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#if defined(CONFIG_SOC_SERIES_ESP32) |
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DPORT_WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_1_REG, 0); |
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#elif defined(CONFIG_SOC_SERIES_ESP32S3) |
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WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_1_REG, 0); |
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#endif |
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} |
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/* first of all take the ownership of the shared memory */ |
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while (!atomic_cas(&dev_data->control->lock, ESP32_MBOX_LOCK_FREE_VAL, |
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dev_data->this_core_id)) { |
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} |
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if (dev_data->cb) { |
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/* For ESP32 soft mbox driver, the message parameter of the callback holds |
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* the portion of shared memory that belongs to the current core ID. |
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*/ |
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msg.data = (dev_data->this_core_id == 0) ? (const void *)dev_data->shm.pro_cpu_shm |
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: (const void *)dev_data->shm.app_cpu_shm; |
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msg.size = dev_data->shm_size; |
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dev_data->cb(dev, dev_data->other_core_id, dev_data->user_data, &msg); |
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} |
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/* unlock the shared memory */ |
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atomic_set(&dev_data->control->lock, ESP32_MBOX_LOCK_FREE_VAL); |
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} |
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static int esp32_mbox_send(const struct device *dev, mbox_channel_id_t channel, |
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const struct mbox_msg *msg) |
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{ |
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ARG_UNUSED(msg); |
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struct esp32_mbox_data *dev_data = (struct esp32_mbox_data *)dev->data; |
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if (channel > 0xFFFF) { |
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LOG_ERR("Invalid channel"); |
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return -EINVAL; |
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} |
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uint32_t key = irq_lock(); |
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/* try to lock the shared memory */ |
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while (!atomic_cas(&dev_data->control->lock, ESP32_MBOX_LOCK_FREE_VAL, |
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dev_data->this_core_id)) { |
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k_msleep(1); |
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} |
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/* Only the lower 16bits of id are used */ |
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dev_data->control->dest_cpu_msg_id[dev_data->other_core_id] = (uint16_t)(channel & 0xFFFF); |
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/* Generate interrupt in the remote core */ |
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if (dev_data->this_core_id == 0) { |
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atomic_set(&dev_data->control->lock, ESP32_MBOX_LOCK_FREE_VAL); |
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LOG_DBG("Generating interrupt on remote CPU 1 from CPU 0"); |
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#if defined(CONFIG_SOC_SERIES_ESP32) |
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DPORT_WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_1_REG, DPORT_CPU_INTR_FROM_CPU_1); |
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#elif defined(CONFIG_SOC_SERIES_ESP32S3) |
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WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_1_REG, SYSTEM_CPU_INTR_FROM_CPU_1); |
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#endif |
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} else { |
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atomic_set(&dev_data->control->lock, ESP32_MBOX_LOCK_FREE_VAL); |
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LOG_DBG("Generating interrupt on remote CPU 0 from CPU 1"); |
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#if defined(CONFIG_SOC_SERIES_ESP32) |
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DPORT_WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_0_REG, DPORT_CPU_INTR_FROM_CPU_0); |
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#elif defined(CONFIG_SOC_SERIES_ESP32S3) |
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WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_0_REG, SYSTEM_CPU_INTR_FROM_CPU_0); |
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#endif |
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} |
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irq_unlock(key); |
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return 0; |
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} |
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static int esp32_mbox_register_callback(const struct device *dev, mbox_channel_id_t channel, |
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mbox_callback_t cb, void *user_data) |
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{ |
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ARG_UNUSED(channel); |
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struct esp32_mbox_data *data = (struct esp32_mbox_data *)dev->data; |
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if (!cb) { |
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LOG_ERR("Must provide callback"); |
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return -EINVAL; |
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} |
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uint32_t key = irq_lock(); |
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data->cb = cb; |
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data->user_data = user_data; |
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irq_unlock(key); |
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return 0; |
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} |
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static int esp32_mbox_mtu_get(const struct device *dev) |
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{ |
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struct esp32_mbox_data *data = (struct esp32_mbox_data *)dev->data; |
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return data->shm_size; |
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} |
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static uint32_t esp32_mbox_max_channels_get(const struct device *dev) |
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{ |
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ARG_UNUSED(dev); |
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return 1; |
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} |
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static int esp32_mbox_set_enabled(const struct device *dev, mbox_channel_id_t channel, bool enable) |
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{ |
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/* The esp32 MBOX is always enabled |
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* but rpmsg backend needs MBOX set enabled to be |
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* implemented so just return success here |
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*/ |
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ARG_UNUSED(dev); |
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ARG_UNUSED(enable); |
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ARG_UNUSED(channel); |
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return 0; |
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} |
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static int esp32_mbox_init(const struct device *dev) |
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{ |
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struct esp32_mbox_data *data = (struct esp32_mbox_data *)dev->data; |
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struct esp32_mbox_config *cfg = (struct esp32_mbox_config *)dev->config; |
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int ret; |
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data->this_core_id = esp_core_id(); |
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data->other_core_id = (data->this_core_id == 0) ? 1 : 0; |
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LOG_DBG("Size of MBOX shared memory: %d", data->shm_size); |
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LOG_DBG("Address of PRO_CPU MBOX shared memory: %p", data->shm.pro_cpu_shm); |
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LOG_DBG("Address of APP_CPU MBOX shared memory: %p", data->shm.app_cpu_shm); |
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LOG_DBG("Address of MBOX control structure: %p", data->control); |
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/* pro_cpu is responsible to initialize the lock of shared memory */ |
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if (data->this_core_id == 0) { |
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ret = esp_intr_alloc(cfg->irq_source_pro_cpu, |
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ESP_PRIO_TO_FLAGS(cfg->irq_priority_pro_cpu) | |
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ESP_INT_FLAGS_CHECK(cfg->irq_flags_pro_cpu) | |
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ESP_INTR_FLAG_IRAM, |
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(intr_handler_t)esp32_mbox_isr, (void *)dev, NULL); |
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atomic_set(&data->control->lock, ESP32_MBOX_LOCK_FREE_VAL); |
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} else { |
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/* app_cpu wait for initialization from pro_cpu, then takes it, |
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* after that releases |
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*/ |
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ret = esp_intr_alloc(cfg->irq_source_app_cpu, |
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ESP_PRIO_TO_FLAGS(cfg->irq_priority_app_cpu) | |
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ESP_INT_FLAGS_CHECK(cfg->irq_flags_app_cpu) | |
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ESP_INTR_FLAG_IRAM, |
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(intr_handler_t)esp32_mbox_isr, (void *)dev, NULL); |
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LOG_DBG("Waiting CPU0 to sync"); |
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while (!atomic_cas(&data->control->lock, ESP32_MBOX_LOCK_FREE_VAL, |
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data->this_core_id)) { |
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} |
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atomic_set(&data->control->lock, ESP32_MBOX_LOCK_FREE_VAL); |
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LOG_DBG("Synchronization done"); |
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} |
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return ret; |
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} |
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static DEVICE_API(mbox, esp32_mbox_driver_api) = { |
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.send = esp32_mbox_send, |
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.register_callback = esp32_mbox_register_callback, |
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.mtu_get = esp32_mbox_mtu_get, |
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.max_channels_get = esp32_mbox_max_channels_get, |
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.set_enabled = esp32_mbox_set_enabled, |
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}; |
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#define ESP32_MBOX_SHM_SIZE_BY_IDX(idx) DT_INST_PROP(idx, shared_memory_size) |
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#define ESP32_MBOX_SHM_ADDR_BY_IDX(idx) DT_REG_ADDR(DT_PHANDLE(DT_DRV_INST(idx), shared_memory)) |
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#define ESP32_MBOX_INIT(idx) \ |
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static struct esp32_mbox_config esp32_mbox_device_cfg_##idx = { \ |
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.irq_source_pro_cpu = DT_INST_IRQ_BY_IDX(idx, 0, irq), \ |
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.irq_priority_pro_cpu = DT_INST_IRQ_BY_IDX(idx, 0, priority), \ |
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.irq_flags_pro_cpu = DT_INST_IRQ_BY_IDX(idx, 0, flags), \ |
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.irq_source_app_cpu = DT_INST_IRQ_BY_IDX(idx, 1, irq), \ |
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.irq_priority_app_cpu = DT_INST_IRQ_BY_IDX(idx, 1, priority), \ |
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.irq_flags_app_cpu = DT_INST_IRQ_BY_IDX(idx, 1, flags), \ |
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}; \ |
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static struct esp32_mbox_data esp32_mbox_device_data_##idx = { \ |
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.shm_size = ESP32_MBOX_SHM_SIZE_BY_IDX(idx), \ |
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.shm.pro_cpu_shm = (uint8_t *)ESP32_MBOX_SHM_ADDR_BY_IDX(idx), \ |
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.shm.app_cpu_shm = (uint8_t *)ESP32_MBOX_SHM_ADDR_BY_IDX(idx) + \ |
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ESP32_MBOX_SHM_SIZE_BY_IDX(idx) / 2, \ |
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.control = (struct esp32_mbox_control *)DT_INST_REG_ADDR(idx), \ |
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}; \ |
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DEVICE_DT_INST_DEFINE(idx, &esp32_mbox_init, NULL, &esp32_mbox_device_data_##idx, \ |
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&esp32_mbox_device_cfg_##idx, PRE_KERNEL_2, \ |
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CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, &esp32_mbox_driver_api); |
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DT_INST_FOREACH_STATUS_OKAY(ESP32_MBOX_INIT);
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