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51 lines
1.5 KiB
51 lines
1.5 KiB
.. zephyr:board:: titanium_ti60_f225 |
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Overview |
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The Efinix Titanium Ti60 F225 development kit contains a Ti60 FPGA, which is fabricated on a 16nm process and deliver |
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high performance with the lowest possible power on a small physical size. In addition, Efinix offers Sapphire SoC IP, |
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which is a user-configurable RISC-V SoC based on the VexRiscv core with configurable feature set and extension. |
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Using the Efinity IP Manager, you can configure the SoC to include only the peripherals that you require. |
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Board block diagram |
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.. figure:: img/Ti60-BGA225-board-block-diagram.jpg |
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:align: center |
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:alt: titanium_ti60_f225_board-block-diagram |
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More information can be found on `Ti60F225`_ website. |
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Sapphire SoC setup on the FPGA guide |
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Guide to setup the SoC found at `Efinix-Zephyr`_ |
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Building |
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Build applications as usual (see :ref:`build_an_application` and |
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:ref:`application_run` for more details). |
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.. zephyr-app-commands:: |
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:zephyr-app: samples/hello_world |
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:board: titanium_ti60_f225 |
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:goals: build |
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Flashing |
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Flashing the binary into SPI NOR flash requires Efinity programmer, Please find the guide at `Efinix-Zephyr`_ |
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.. note:: |
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The Zephyr RTOS has been verified using the SoC bitstream generated by Efinity IDE v2022.2.322. |
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References |
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.. target-notes:: |
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.. _Ti60F225: https://www.efinixinc.com/products-devkits-titaniumti60f225.html |
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.. _Efinix-Zephyr: https://github.com/Efinix-Inc/zephyr-efinix
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